tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY
8
9maintainers:
10 - Christian Bruel <christian.bruel@foss.st.com>
11
12description:
13 Single lane PHY shared (exclusive) between the USB3 and PCIe controllers.
14 Supports 5Gbit/s for USB3 and PCIe gen2 or 2.5Gbit/s for PCIe gen1.
15
16properties:
17 compatible:
18 const: st,stm32mp25-combophy
19
20 reg:
21 maxItems: 1
22
23 "#phy-cells":
24 const: 1
25
26 clocks:
27 minItems: 2
28 items:
29 - description: apb Bus clock mandatory to access registers.
30 - description: ker Internal RCC reference clock for USB3 or PCIe
31 - description: pad Optional on board clock input for PCIe only. Typically an
32 external 100Mhz oscillator wired on dedicated CLKIN pad. Used as reference
33 clock input instead of the ker
34
35 clock-names:
36 minItems: 2
37 items:
38 - const: apb
39 - const: ker
40 - const: pad
41
42 resets:
43 maxItems: 1
44
45 reset-names:
46 const: phy
47
48 power-domains:
49 maxItems: 1
50
51 wakeup-source: true
52
53 interrupts:
54 maxItems: 1
55 description: interrupt used for wakeup
56
57 access-controllers:
58 maxItems: 1
59 description: Phandle to the rifsc device to check access right.
60
61 st,ssc-on:
62 $ref: /schemas/types.yaml#/definitions/flag
63 description:
64 A property whose presence indicates that the Spread Spectrum Clocking is active.
65
66 st,rx-equalizer:
67 $ref: /schemas/types.yaml#/definitions/uint32
68 minimum: 0
69 maximum: 7
70 default: 2
71 description:
72 A 3 bit value to tune the RX fixed equalizer setting for optimal eye compliance
73
74 st,output-micro-ohms:
75 minimum: 3999000
76 maximum: 6090000
77 default: 4968000
78 description:
79 A value property to tune the Single Ended Output Impedance, simulations results
80 at 25C for a VDDP=0.8V. The hardware accepts discrete values in this range.
81
82 st,output-vswing-microvolt:
83 minimum: 442000
84 maximum: 803000
85 default: 803000
86 description:
87 A value property in microvolt to tune the Single Ended Output Voltage Swing to change the
88 Vlo, Vhi for a VDDP = 0.8V. The hardware accepts discrete values in this range.
89
90required:
91 - compatible
92 - reg
93 - "#phy-cells"
94 - clocks
95 - clock-names
96 - resets
97 - reset-names
98
99additionalProperties: false
100
101examples:
102 - |
103 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
106
107 phy@480c0000 {
108 compatible = "st,stm32mp25-combophy";
109 reg = <0x480c0000 0x1000>;
110 #phy-cells = <1>;
111 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
112 clock-names = "apb", "ker";
113 resets = <&rcc USB3PCIEPHY_R>;
114 reset-names = "phy";
115 access-controllers = <&rifsc 67>;
116 power-domains = <&CLUSTER_PD>;
117 wakeup-source;
118 interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
119 };