tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Last Level Cache Controller
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11
12description: |
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
14 that can be shared by multiple clients. Clients here are different cores in the
15 SoC, the idea is to minimize the local caches at the clients and migrate to
16 common pool of memory. Cache memory is divided into partitions called slices
17 which are assigned to clients. Clients can query the slice details, activate
18 and deactivate them.
19
20properties:
21 compatible:
22 enum:
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
27 - qcom,sa8775p-llcc
28 - qcom,sar1130p-llcc
29 - qcom,sar2130p-llcc
30 - qcom,sc7180-llcc
31 - qcom,sc7280-llcc
32 - qcom,sc8180x-llcc
33 - qcom,sc8280xp-llcc
34 - qcom,sdm845-llcc
35 - qcom,sm6350-llcc
36 - qcom,sm7150-llcc
37 - qcom,sm8150-llcc
38 - qcom,sm8250-llcc
39 - qcom,sm8350-llcc
40 - qcom,sm8450-llcc
41 - qcom,sm8550-llcc
42 - qcom,sm8650-llcc
43 - qcom,x1e80100-llcc
44
45 reg:
46 minItems: 1
47 maxItems: 10
48
49 reg-names:
50 minItems: 1
51 maxItems: 10
52
53 interrupts:
54 maxItems: 1
55
56 nvmem-cells:
57 items:
58 - description: Reference to an nvmem node for multi channel DDR
59
60 nvmem-cell-names:
61 items:
62 - const: multi-chan-ddr
63
64required:
65 - compatible
66 - reg
67 - reg-names
68
69allOf:
70 - if:
71 properties:
72 compatible:
73 contains:
74 enum:
75 - qcom,ipq5424-llcc
76 then:
77 properties:
78 reg:
79 items:
80 - description: LLCC0 base register region
81 reg-names:
82 items:
83 - const: llcc0_base
84
85 - if:
86 properties:
87 compatible:
88 contains:
89 enum:
90 - qcom,sar1130p-llcc
91 - qcom,sar2130p-llcc
92 then:
93 properties:
94 reg:
95 items:
96 - description: LLCC0 base register region
97 - description: LLCC1 base register region
98 - description: LLCC broadcast OR register region
99 - description: LLCC broadcast AND register region
100 - description: LLCC scratchpad broadcast OR register region
101 - description: LLCC scratchpad broadcast AND register region
102 reg-names:
103 items:
104 - const: llcc0_base
105 - const: llcc1_base
106 - const: llcc_broadcast_base
107 - const: llcc_broadcast_and_base
108 - const: llcc_scratchpad_broadcast_base
109 - const: llcc_scratchpad_broadcast_and_base
110
111 - if:
112 properties:
113 compatible:
114 contains:
115 enum:
116 - qcom,qcs615-llcc
117 - qcom,sc7180-llcc
118 - qcom,sm6350-llcc
119 then:
120 properties:
121 reg:
122 items:
123 - description: LLCC0 base register region
124 - description: LLCC broadcast base register region
125 reg-names:
126 items:
127 - const: llcc0_base
128 - const: llcc_broadcast_base
129
130 - if:
131 properties:
132 compatible:
133 contains:
134 enum:
135 - qcom,sa8775p-llcc
136 then:
137 properties:
138 reg:
139 items:
140 - description: LLCC0 base register region
141 - description: LLCC1 base register region
142 - description: LLCC2 base register region
143 - description: LLCC3 base register region
144 - description: LLCC4 base register region
145 - description: LLCC5 base register region
146 - description: LLCC broadcast base register region
147 reg-names:
148 items:
149 - const: llcc0_base
150 - const: llcc1_base
151 - const: llcc2_base
152 - const: llcc3_base
153 - const: llcc4_base
154 - const: llcc5_base
155 - const: llcc_broadcast_base
156
157 - if:
158 properties:
159 compatible:
160 contains:
161 enum:
162 - qcom,sc7280-llcc
163 then:
164 properties:
165 reg:
166 items:
167 - description: LLCC0 base register region
168 - description: LLCC1 base register region
169 - description: LLCC broadcast base register region
170 reg-names:
171 items:
172 - const: llcc0_base
173 - const: llcc1_base
174 - const: llcc_broadcast_base
175
176 - if:
177 properties:
178 compatible:
179 contains:
180 enum:
181 - qcom,qdu1000-llcc
182 - qcom,sc8180x-llcc
183 - qcom,sc8280xp-llcc
184 then:
185 properties:
186 reg:
187 items:
188 - description: LLCC0 base register region
189 - description: LLCC1 base register region
190 - description: LLCC2 base register region
191 - description: LLCC3 base register region
192 - description: LLCC4 base register region
193 - description: LLCC5 base register region
194 - description: LLCC6 base register region
195 - description: LLCC7 base register region
196 - description: LLCC broadcast base register region
197 reg-names:
198 items:
199 - const: llcc0_base
200 - const: llcc1_base
201 - const: llcc2_base
202 - const: llcc3_base
203 - const: llcc4_base
204 - const: llcc5_base
205 - const: llcc6_base
206 - const: llcc7_base
207 - const: llcc_broadcast_base
208
209 - if:
210 properties:
211 compatible:
212 contains:
213 enum:
214 - qcom,x1e80100-llcc
215 then:
216 properties:
217 reg:
218 items:
219 - description: LLCC0 base register region
220 - description: LLCC1 base register region
221 - description: LLCC2 base register region
222 - description: LLCC3 base register region
223 - description: LLCC4 base register region
224 - description: LLCC5 base register region
225 - description: LLCC6 base register region
226 - description: LLCC7 base register region
227 - description: LLCC broadcast base register region
228 - description: LLCC broadcast AND register region
229 reg-names:
230 items:
231 - const: llcc0_base
232 - const: llcc1_base
233 - const: llcc2_base
234 - const: llcc3_base
235 - const: llcc4_base
236 - const: llcc5_base
237 - const: llcc6_base
238 - const: llcc7_base
239 - const: llcc_broadcast_base
240 - const: llcc_broadcast_and_base
241
242 - if:
243 properties:
244 compatible:
245 contains:
246 enum:
247 - qcom,qcs8300-llcc
248 - qcom,sdm845-llcc
249 - qcom,sm8150-llcc
250 - qcom,sm8250-llcc
251 - qcom,sm8350-llcc
252 then:
253 properties:
254 reg:
255 items:
256 - description: LLCC0 base register region
257 - description: LLCC1 base register region
258 - description: LLCC2 base register region
259 - description: LLCC3 base register region
260 - description: LLCC broadcast base register region
261 reg-names:
262 items:
263 - const: llcc0_base
264 - const: llcc1_base
265 - const: llcc2_base
266 - const: llcc3_base
267 - const: llcc_broadcast_base
268
269 - if:
270 properties:
271 compatible:
272 contains:
273 enum:
274 - qcom,sm8450-llcc
275 - qcom,sm8550-llcc
276 - qcom,sm8650-llcc
277 then:
278 properties:
279 reg:
280 items:
281 - description: LLCC0 base register region
282 - description: LLCC1 base register region
283 - description: LLCC2 base register region
284 - description: LLCC3 base register region
285 - description: LLCC broadcast OR register region
286 - description: LLCC broadcast AND register region
287 reg-names:
288 items:
289 - const: llcc0_base
290 - const: llcc1_base
291 - const: llcc2_base
292 - const: llcc3_base
293 - const: llcc_broadcast_base
294 - const: llcc_broadcast_and_base
295
296additionalProperties: false
297
298examples:
299 - |
300 #include <dt-bindings/interrupt-controller/arm-gic.h>
301
302 soc {
303 #address-cells = <2>;
304 #size-cells = <2>;
305
306 system-cache-controller@1100000 {
307 compatible = "qcom,sdm845-llcc";
308 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
309 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
310 <0 0x01300000 0 0x50000>;
311 reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
312 "llcc3_base", "llcc_broadcast_base";
313 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
314 };
315 };