tjh.dev
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1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SuperSpeed DWC3 USB SoC controller
8
9maintainers:
10 - Heiko Stuebner <heiko@sntech.de>
11
12description:
13 The common content of the node is defined in snps,dwc3.yaml.
14
15 Phy documentation is provided in the following places.
16
17 USB2.0 PHY
18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
19
20 Type-C PHY
21 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
22
23select:
24 properties:
25 compatible:
26 contains:
27 enum:
28 - rockchip,rk3328-dwc3
29 - rockchip,rk3568-dwc3
30 - rockchip,rk3576-dwc3
31 - rockchip,rk3588-dwc3
32 required:
33 - compatible
34
35properties:
36 compatible:
37 items:
38 - enum:
39 - rockchip,rk3328-dwc3
40 - rockchip,rk3568-dwc3
41 - rockchip,rk3576-dwc3
42 - rockchip,rk3588-dwc3
43 - const: snps,dwc3
44
45 reg:
46 maxItems: 1
47
48 interrupts:
49 maxItems: 1
50
51 clocks:
52 minItems: 3
53 items:
54 - description:
55 Controller reference clock, must to be 24 MHz
56 - description:
57 Controller suspend clock, must to be 24 MHz or 32 KHz
58 - description:
59 Master/Core clock, must to be >= 62.5 MHz for SS
60 operation and >= 30MHz for HS operation
61 - description:
62 Controller grf clock OR UTMI clock
63 - description:
64 PIPE clock
65
66 clock-names:
67 minItems: 3
68 items:
69 - const: ref_clk
70 - const: suspend_clk
71 - const: bus_clk
72 - enum:
73 - grf_clk
74 - utmi
75 - const: pipe
76
77 power-domains:
78 maxItems: 1
79
80 resets:
81 maxItems: 1
82
83 reset-names:
84 const: usb3-otg
85
86unevaluatedProperties: false
87
88required:
89 - compatible
90 - reg
91 - interrupts
92 - clocks
93 - clock-names
94
95allOf:
96 - $ref: snps,dwc3.yaml#
97 - if:
98 properties:
99 compatible:
100 contains:
101 const: rockchip,rk3328-dwc3
102 then:
103 properties:
104 clocks:
105 minItems: 3
106 maxItems: 4
107 clock-names:
108 minItems: 3
109 items:
110 - const: ref_clk
111 - const: suspend_clk
112 - const: bus_clk
113 - const: grf_clk
114 - if:
115 properties:
116 compatible:
117 contains:
118 enum:
119 - rockchip,rk3568-dwc3
120 - rockchip,rk3576-dwc3
121 then:
122 properties:
123 clocks:
124 maxItems: 3
125 clock-names:
126 maxItems: 3
127 - if:
128 properties:
129 compatible:
130 contains:
131 const: rockchip,rk3588-dwc3
132 then:
133 properties:
134 clock-names:
135 minItems: 3
136 items:
137 - const: ref_clk
138 - const: suspend_clk
139 - const: bus_clk
140 - const: utmi
141 - const: pipe
142
143examples:
144 - |
145 #include <dt-bindings/clock/rk3328-cru.h>
146 #include <dt-bindings/interrupt-controller/arm-gic.h>
147
148 bus {
149 #address-cells = <2>;
150 #size-cells = <2>;
151
152 usbdrd3_0: usb@fe800000 {
153 compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
154 reg = <0x0 0xfe800000 0x0 0x100000>;
155 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
156 clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
157 <&cru ACLK_USB3OTG>;
158 clock-names = "ref_clk", "suspend_clk",
159 "bus_clk", "grf_clk";
160 dr_mode = "otg";
161 };
162 };