tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Nuvoton NPCM Reset controller
8
9maintainers:
10 - Tomer Maimon <tmaimon77@gmail.com>
11
12properties:
13 compatible:
14 enum:
15 - nuvoton,npcm750-reset # Poleg NPCM7XX SoC
16 - nuvoton,npcm845-reset # Arbel NPCM8XX SoC
17
18 reg:
19 maxItems: 1
20
21 '#reset-cells':
22 const: 2
23
24 '#clock-cells':
25 const: 1
26
27 clocks:
28 items:
29 - description: specify external 25MHz reference clock.
30
31 nuvoton,sysgcr:
32 $ref: /schemas/types.yaml#/definitions/phandle
33 description: a phandle to access GCR registers.
34
35 nuvoton,sw-reset-number:
36 $ref: /schemas/types.yaml#/definitions/uint32
37 minimum: 1
38 maximum: 4
39 description: |
40 Contains the software reset number to restart the SoC.
41 If not specified, software reset is disabled.
42
43required:
44 - compatible
45 - reg
46 - '#reset-cells'
47 - nuvoton,sysgcr
48
49if:
50 properties:
51 compatible:
52 contains:
53 enum:
54 - nuvoton,npcm845-reset
55then:
56 required:
57 - '#clock-cells'
58 - clocks
59
60additionalProperties: false
61
62examples:
63 - |
64 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
65 rstc: rstc@f0801000 {
66 compatible = "nuvoton,npcm750-reset";
67 reg = <0xf0801000 0x70>;
68 #reset-cells = <2>;
69 nuvoton,sysgcr = <&gcr>;
70 nuvoton,sw-reset-number = <2>;
71 };
72
73 // Specifying reset lines connected to IP NPCM7XX modules
74 spi0: spi {
75 resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
76 };