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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2020,2021 Intel Corporation
4 */
5
6#include "i915_drv.h"
7#include "intel_step.h"
8
9/*
10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display
11 * steppings. E.g., in some cases a higher PCI revision may translate to a
12 * lower stepping of the GT and/or display IP. This file provides lookup
13 * tables to map the PCI revision into a standard set of stepping values that
14 * can be compared numerically.
15 *
16 * Also note that some revisions/steppings may have been set aside as
17 * placeholders but never materialized in real hardware; in those cases there
18 * may be jumps in the revision IDs or stepping values in the tables below.
19 */
20
21/*
22 * Some platforms always have the same stepping value for GT and display;
23 * use a macro to define these to make it easier to identify the platforms
24 * where the two steppings can deviate.
25 */
26#define COMMON_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x
27
28static const struct intel_step_info skl_revids[] = {
29 [0x6] = { COMMON_STEP(G0) },
30 [0x7] = { COMMON_STEP(H0) },
31 [0x9] = { COMMON_STEP(J0) },
32 [0xA] = { COMMON_STEP(I1) },
33};
34
35static const struct intel_step_info kbl_revids[] = {
36 [1] = { COMMON_STEP(B0) },
37 [2] = { COMMON_STEP(C0) },
38 [3] = { COMMON_STEP(D0) },
39 [4] = { COMMON_STEP(F0) },
40 [5] = { COMMON_STEP(C0) },
41 [6] = { COMMON_STEP(D1) },
42 [7] = { COMMON_STEP(G0) },
43};
44
45static const struct intel_step_info bxt_revids[] = {
46 [0xA] = { COMMON_STEP(C0) },
47 [0xB] = { COMMON_STEP(C0) },
48 [0xC] = { COMMON_STEP(D0) },
49 [0xD] = { COMMON_STEP(E0) },
50};
51
52static const struct intel_step_info glk_revids[] = {
53 [3] = { COMMON_STEP(B0) },
54};
55
56static const struct intel_step_info icl_revids[] = {
57 [7] = { COMMON_STEP(D0) },
58};
59
60static const struct intel_step_info jsl_ehl_revids[] = {
61 [0] = { COMMON_STEP(A0) },
62 [1] = { COMMON_STEP(B0) },
63};
64
65static const struct intel_step_info tgl_uy_revids[] = {
66 [0] = { COMMON_STEP(A0) },
67 [1] = { COMMON_STEP(B0) },
68 [2] = { COMMON_STEP(B1) },
69 [3] = { COMMON_STEP(C0) },
70};
71
72/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
73static const struct intel_step_info tgl_revids[] = {
74 [0] = { COMMON_STEP(A0) },
75 [1] = { COMMON_STEP(B0) },
76};
77
78static const struct intel_step_info rkl_revids[] = {
79 [0] = { COMMON_STEP(A0) },
80 [1] = { COMMON_STEP(B0) },
81 [4] = { COMMON_STEP(C0) },
82};
83
84static const struct intel_step_info dg1_revids[] = {
85 [0] = { COMMON_STEP(A0) },
86 [1] = { COMMON_STEP(B0) },
87};
88
89static const struct intel_step_info adls_revids[] = {
90 [0x0] = { COMMON_STEP(A0) },
91 [0x1] = { COMMON_STEP(A0) },
92 [0x4] = { COMMON_STEP(B0) },
93 [0x8] = { COMMON_STEP(C0) },
94 [0xC] = { COMMON_STEP(D0) },
95};
96
97static const struct intel_step_info adlp_revids[] = {
98 [0x0] = { COMMON_STEP(A0) },
99 [0x4] = { COMMON_STEP(B0) },
100 [0x8] = { COMMON_STEP(C0) },
101 [0xC] = { COMMON_STEP(C0) },
102};
103
104static const struct intel_step_info dg2_g10_revid_step_tbl[] = {
105 [0x0] = { COMMON_STEP(A0) },
106 [0x1] = { COMMON_STEP(A1) },
107 [0x4] = { COMMON_STEP(B0) },
108 [0x8] = { COMMON_STEP(C0) },
109};
110
111static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
112 [0x0] = { COMMON_STEP(A0) },
113 [0x4] = { COMMON_STEP(B0) },
114 [0x5] = { COMMON_STEP(B1) },
115};
116
117static const struct intel_step_info dg2_g12_revid_step_tbl[] = {
118 [0x0] = { COMMON_STEP(A0) },
119 [0x1] = { COMMON_STEP(A1) },
120};
121
122static const struct intel_step_info adls_rpls_revids[] = {
123 [0x4] = { COMMON_STEP(D0) },
124 [0xC] = { COMMON_STEP(D0) },
125};
126
127static const struct intel_step_info adlp_rplp_revids[] = {
128 [0x4] = { COMMON_STEP(C0) },
129};
130
131static const struct intel_step_info adlp_n_revids[] = {
132 [0x0] = { COMMON_STEP(A0) },
133};
134
135static u8 gmd_to_intel_step(struct drm_i915_private *i915,
136 struct intel_ip_version *gmd)
137{
138 u8 step = gmd->step + STEP_A0;
139
140 if (step >= STEP_FUTURE) {
141 drm_dbg(&i915->drm, "Using future steppings\n");
142 return STEP_FUTURE;
143 }
144
145 return step;
146}
147
148void intel_step_init(struct drm_i915_private *i915)
149{
150 const struct intel_step_info *revids = NULL;
151 int size = 0;
152 int revid = INTEL_REVID(i915);
153 struct intel_step_info step = {};
154
155 if (HAS_GMD_ID(i915)) {
156 step.graphics_step = gmd_to_intel_step(i915,
157 &RUNTIME_INFO(i915)->graphics.ip);
158 step.media_step = gmd_to_intel_step(i915,
159 &RUNTIME_INFO(i915)->media.ip);
160
161 RUNTIME_INFO(i915)->step = step;
162
163 return;
164 }
165
166 if (IS_DG2_G10(i915)) {
167 revids = dg2_g10_revid_step_tbl;
168 size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
169 } else if (IS_DG2_G11(i915)) {
170 revids = dg2_g11_revid_step_tbl;
171 size = ARRAY_SIZE(dg2_g11_revid_step_tbl);
172 } else if (IS_DG2_G12(i915)) {
173 revids = dg2_g12_revid_step_tbl;
174 size = ARRAY_SIZE(dg2_g12_revid_step_tbl);
175 } else if (IS_ALDERLAKE_P_N(i915)) {
176 revids = adlp_n_revids;
177 size = ARRAY_SIZE(adlp_n_revids);
178 } else if (IS_RAPTORLAKE_P(i915)) {
179 revids = adlp_rplp_revids;
180 size = ARRAY_SIZE(adlp_rplp_revids);
181 } else if (IS_ALDERLAKE_P(i915)) {
182 revids = adlp_revids;
183 size = ARRAY_SIZE(adlp_revids);
184 } else if (IS_RAPTORLAKE_S(i915)) {
185 revids = adls_rpls_revids;
186 size = ARRAY_SIZE(adls_rpls_revids);
187 } else if (IS_ALDERLAKE_S(i915)) {
188 revids = adls_revids;
189 size = ARRAY_SIZE(adls_revids);
190 } else if (IS_DG1(i915)) {
191 revids = dg1_revids;
192 size = ARRAY_SIZE(dg1_revids);
193 } else if (IS_ROCKETLAKE(i915)) {
194 revids = rkl_revids;
195 size = ARRAY_SIZE(rkl_revids);
196 } else if (IS_TIGERLAKE_UY(i915)) {
197 revids = tgl_uy_revids;
198 size = ARRAY_SIZE(tgl_uy_revids);
199 } else if (IS_TIGERLAKE(i915)) {
200 revids = tgl_revids;
201 size = ARRAY_SIZE(tgl_revids);
202 } else if (IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) {
203 revids = jsl_ehl_revids;
204 size = ARRAY_SIZE(jsl_ehl_revids);
205 } else if (IS_ICELAKE(i915)) {
206 revids = icl_revids;
207 size = ARRAY_SIZE(icl_revids);
208 } else if (IS_GEMINILAKE(i915)) {
209 revids = glk_revids;
210 size = ARRAY_SIZE(glk_revids);
211 } else if (IS_BROXTON(i915)) {
212 revids = bxt_revids;
213 size = ARRAY_SIZE(bxt_revids);
214 } else if (IS_KABYLAKE(i915)) {
215 revids = kbl_revids;
216 size = ARRAY_SIZE(kbl_revids);
217 } else if (IS_SKYLAKE(i915)) {
218 revids = skl_revids;
219 size = ARRAY_SIZE(skl_revids);
220 }
221
222 /* Not using the stepping scheme for the platform yet. */
223 if (!revids)
224 return;
225
226 if (revid < size && revids[revid].graphics_step != STEP_NONE) {
227 step = revids[revid];
228 } else {
229 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid);
230
231 /*
232 * If we hit a gap in the revid array, use the information for
233 * the next revid.
234 *
235 * This may be wrong in all sorts of ways, especially if the
236 * steppings in the array are not monotonically increasing, but
237 * it's better than defaulting to 0.
238 */
239 while (revid < size && revids[revid].graphics_step == STEP_NONE)
240 revid++;
241
242 if (revid < size) {
243 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
244 revid);
245 step = revids[revid];
246 } else {
247 drm_dbg(&i915->drm, "Using future steppings\n");
248 step.graphics_step = STEP_FUTURE;
249 }
250 }
251
252 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE))
253 return;
254
255 RUNTIME_INFO(i915)->step = step;
256}
257
258#define STEP_NAME_CASE(name) \
259 case STEP_##name: \
260 return #name;
261
262const char *intel_step_name(enum intel_step step)
263{
264 switch (step) {
265 STEP_NAME_LIST(STEP_NAME_CASE);
266
267 default:
268 return "**";
269 }
270}