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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#ifndef __IVPU_MMU_CONTEXT_H__
7#define __IVPU_MMU_CONTEXT_H__
8
9#include <drm/drm_mm.h>
10
11struct ivpu_device;
12struct ivpu_file_priv;
13struct ivpu_addr_range;
14
15#define IVPU_MMU_PGTABLE_ENTRIES 512ull
16
17struct ivpu_mmu_pgtable {
18 u64 ***pte_ptrs[IVPU_MMU_PGTABLE_ENTRIES];
19 u64 **pmd_ptrs[IVPU_MMU_PGTABLE_ENTRIES];
20 u64 *pud_ptrs[IVPU_MMU_PGTABLE_ENTRIES];
21 u64 *pgd_dma_ptr;
22 dma_addr_t pgd_dma;
23};
24
25struct ivpu_mmu_context {
26 struct mutex lock; /* Protects: mm, pgtable, is_cd_valid */
27 struct drm_mm mm;
28 struct ivpu_mmu_pgtable pgtable;
29 bool is_cd_valid;
30 u32 id;
31};
32
33void ivpu_mmu_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 context_id);
34void ivpu_mmu_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx);
35void ivpu_mmu_global_context_init(struct ivpu_device *vdev);
36void ivpu_mmu_global_context_fini(struct ivpu_device *vdev);
37int ivpu_mmu_reserved_context_init(struct ivpu_device *vdev);
38void ivpu_mmu_reserved_context_fini(struct ivpu_device *vdev);
39
40void ivpu_mmu_user_context_mark_invalid(struct ivpu_device *vdev, u32 ssid);
41
42int ivpu_mmu_context_insert_node(struct ivpu_mmu_context *ctx, const struct ivpu_addr_range *range,
43 u64 size, struct drm_mm_node *node);
44void ivpu_mmu_context_remove_node(struct ivpu_mmu_context *ctx, struct drm_mm_node *node);
45
46int ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,
47 u64 vpu_addr, struct sg_table *sgt, bool llc_coherent);
48void ivpu_mmu_context_unmap_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,
49 u64 vpu_addr, struct sg_table *sgt);
50int ivpu_mmu_context_set_pages_ro(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,
51 u64 vpu_addr, size_t size);
52
53#endif /* __IVPU_MMU_CONTEXT_H__ */