tjh.dev
Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on SM8450
8
9maintainers:
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Jagadeesh Kona <quic_jkona@quicinc.com>
12
13description: |
14 Qualcomm video clock control module provides the clocks, resets and power
15 domains on SM8450.
16
17 See also:
18 include/dt-bindings/clock/qcom,sm8450-videocc.h
19 include/dt-bindings/clock/qcom,sm8650-videocc.h
20
21properties:
22 compatible:
23 enum:
24 - qcom,sm8450-videocc
25 - qcom,sm8550-videocc
26 - qcom,sm8650-videocc
27
28 clocks:
29 items:
30 - description: Board XO source
31 - description: Video AHB clock from GCC
32
33 power-domains:
34 maxItems: 1
35 description:
36 MMCX power domain.
37
38 required-opps:
39 maxItems: 1
40 description:
41 A phandle to an OPP node describing required MMCX performance point.
42
43required:
44 - compatible
45 - clocks
46 - power-domains
47 - '#power-domain-cells'
48
49allOf:
50 - $ref: qcom,gcc.yaml#
51 - if:
52 properties:
53 compatible:
54 contains:
55 enum:
56 - qcom,sm8450-videocc
57 - qcom,sm8550-videocc
58 then:
59 required:
60 - required-opps
61
62unevaluatedProperties: false
63
64examples:
65 - |
66 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
67 #include <dt-bindings/clock/qcom,rpmh.h>
68 #include <dt-bindings/power/qcom,rpmhpd.h>
69 videocc: clock-controller@aaf0000 {
70 compatible = "qcom,sm8450-videocc";
71 reg = <0x0aaf0000 0x10000>;
72 clocks = <&rpmhcc RPMH_CXO_CLK>,
73 <&gcc GCC_VIDEO_AHB_CLK>;
74 power-domains = <&rpmhpd RPMHPD_MMCX>;
75 required-opps = <&rpmhpd_opp_low_svs>;
76 #clock-cells = <1>;
77 #reset-cells = <1>;
78 #power-domain-cells = <1>;
79 };
80...