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at v6.12-rc5 315 lines 11 kB view raw
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Common definitions for Cirrus Logic CS35L56 smart amp 4 * 5 * Copyright (C) 2023 Cirrus Logic, Inc. and 6 * Cirrus Logic International Semiconductor Ltd. 7 */ 8 9#ifndef __CS35L56_H 10#define __CS35L56_H 11 12#include <linux/firmware/cirrus/cs_dsp.h> 13#include <linux/regulator/consumer.h> 14#include <linux/regmap.h> 15#include <sound/cs-amp-lib.h> 16 17#define CS35L56_DEVID 0x0000000 18#define CS35L56_REVID 0x0000004 19#define CS35L56_RELID 0x000000C 20#define CS35L56_OTPID 0x0000010 21#define CS35L56_SFT_RESET 0x0000020 22#define CS35L56_GLOBAL_ENABLES 0x0002014 23#define CS35L56_BLOCK_ENABLES 0x0002018 24#define CS35L56_BLOCK_ENABLES2 0x000201C 25#define CS35L56_REFCLK_INPUT 0x0002C04 26#define CS35L56_GLOBAL_SAMPLE_RATE 0x0002C0C 27#define CS35L56_OTP_MEM_53 0x00300D4 28#define CS35L56_OTP_MEM_54 0x00300D8 29#define CS35L56_OTP_MEM_55 0x00300DC 30#define CS35L56_ASP1_ENABLES1 0x0004800 31#define CS35L56_ASP1_CONTROL1 0x0004804 32#define CS35L56_ASP1_CONTROL2 0x0004808 33#define CS35L56_ASP1_CONTROL3 0x000480C 34#define CS35L56_ASP1_FRAME_CONTROL1 0x0004810 35#define CS35L56_ASP1_FRAME_CONTROL5 0x0004820 36#define CS35L56_ASP1_DATA_CONTROL1 0x0004830 37#define CS35L56_ASP1_DATA_CONTROL5 0x0004840 38#define CS35L56_DACPCM1_INPUT 0x0004C00 39#define CS35L56_DACPCM2_INPUT 0x0004C08 40#define CS35L56_ASP1TX1_INPUT 0x0004C20 41#define CS35L56_ASP1TX2_INPUT 0x0004C24 42#define CS35L56_ASP1TX3_INPUT 0x0004C28 43#define CS35L56_ASP1TX4_INPUT 0x0004C2C 44#define CS35L56_DSP1RX1_INPUT 0x0004C40 45#define CS35L56_DSP1RX2_INPUT 0x0004C44 46#define CS35L56_SWIRE_DP3_CH1_INPUT 0x0004C70 47#define CS35L56_SWIRE_DP3_CH2_INPUT 0x0004C74 48#define CS35L56_SWIRE_DP3_CH3_INPUT 0x0004C78 49#define CS35L56_SWIRE_DP3_CH4_INPUT 0x0004C7C 50#define CS35L56_IRQ1_CFG 0x000E000 51#define CS35L56_IRQ1_STATUS 0x000E004 52#define CS35L56_IRQ1_EINT_1 0x000E010 53#define CS35L56_IRQ1_EINT_2 0x000E014 54#define CS35L56_IRQ1_EINT_4 0x000E01C 55#define CS35L56_IRQ1_EINT_8 0x000E02C 56#define CS35L56_IRQ1_EINT_18 0x000E054 57#define CS35L56_IRQ1_EINT_20 0x000E05C 58#define CS35L56_IRQ1_MASK_1 0x000E090 59#define CS35L56_IRQ1_MASK_2 0x000E094 60#define CS35L56_IRQ1_MASK_4 0x000E09C 61#define CS35L56_IRQ1_MASK_8 0x000E0AC 62#define CS35L56_IRQ1_MASK_18 0x000E0D4 63#define CS35L56_IRQ1_MASK_20 0x000E0DC 64#define CS35L56_DSP_VIRTUAL1_MBOX_1 0x0011020 65#define CS35L56_DSP_VIRTUAL1_MBOX_2 0x0011024 66#define CS35L56_DSP_VIRTUAL1_MBOX_3 0x0011028 67#define CS35L56_DSP_VIRTUAL1_MBOX_4 0x001102C 68#define CS35L56_DSP_VIRTUAL1_MBOX_5 0x0011030 69#define CS35L56_DSP_VIRTUAL1_MBOX_6 0x0011034 70#define CS35L56_DSP_VIRTUAL1_MBOX_7 0x0011038 71#define CS35L56_DSP_VIRTUAL1_MBOX_8 0x001103C 72#define CS35L56_DSP_RESTRICT_STS1 0x00190F0 73#define CS35L56_DSP1_XMEM_PACKED_0 0x2000000 74#define CS35L56_DSP1_XMEM_PACKED_6143 0x2005FFC 75#define CS35L56_DSP1_XMEM_UNPACKED32_0 0x2400000 76#define CS35L56_DSP1_XMEM_UNPACKED32_4095 0x2403FFC 77#define CS35L56_DSP1_SYS_INFO_ID 0x25E0000 78#define CS35L56_DSP1_SYS_INFO_END 0x25E004C 79#define CS35L56_DSP1_AHBM_WINDOW_DEBUG_0 0x25E2040 80#define CS35L56_DSP1_AHBM_WINDOW_DEBUG_1 0x25E2044 81#define CS35L56_DSP1_XMEM_UNPACKED24_0 0x2800000 82#define CS35L56_DSP1_FW_VER 0x2800010 83#define CS35L56_DSP1_HALO_STATE 0x28021E0 84#define CS35L56_DSP1_PM_CUR_STATE 0x2804308 85#define CS35L56_DSP1_XMEM_UNPACKED24_8191 0x2807FFC 86#define CS35L56_DSP1_CORE_BASE 0x2B80000 87#define CS35L56_DSP1_SCRATCH1 0x2B805C0 88#define CS35L56_DSP1_SCRATCH2 0x2B805C8 89#define CS35L56_DSP1_SCRATCH3 0x2B805D0 90#define CS35L56_DSP1_SCRATCH4 0x2B805D8 91#define CS35L56_DSP1_YMEM_PACKED_0 0x2C00000 92#define CS35L56_DSP1_YMEM_PACKED_4604 0x2C047F0 93#define CS35L56_DSP1_YMEM_UNPACKED32_0 0x3000000 94#define CS35L56_DSP1_YMEM_UNPACKED32_3070 0x3002FF8 95#define CS35L56_DSP1_YMEM_UNPACKED24_0 0x3400000 96#define CS35L56_MAIN_RENDER_USER_MUTE 0x3400024 97#define CS35L56_MAIN_RENDER_USER_VOLUME 0x340002C 98#define CS35L56_MAIN_POSTURE_NUMBER 0x3400094 99#define CS35L56_PROTECTION_STATUS 0x34000D8 100#define CS35L56_TRANSDUCER_ACTUAL_PS 0x3400150 101#define CS35L56_DSP1_YMEM_UNPACKED24_6141 0x3405FF4 102#define CS35L56_DSP1_PMEM_0 0x3800000 103#define CS35L56_DSP1_PMEM_5114 0x3804FE8 104 105/* DEVID */ 106#define CS35L56_DEVID_MASK 0x00FFFFFF 107 108/* REVID */ 109#define CS35L56_AREVID_MASK 0x000000F0 110#define CS35L56_MTLREVID_MASK 0x0000000F 111#define CS35L56_REVID_B0 0x000000B0 112 113/* ASP_ENABLES1 */ 114#define CS35L56_ASP_RX2_EN_SHIFT 17 115#define CS35L56_ASP_RX1_EN_SHIFT 16 116#define CS35L56_ASP_TX4_EN_SHIFT 3 117#define CS35L56_ASP_TX3_EN_SHIFT 2 118#define CS35L56_ASP_TX2_EN_SHIFT 1 119#define CS35L56_ASP_TX1_EN_SHIFT 0 120 121/* ASP_CONTROL1 */ 122#define CS35L56_ASP_BCLK_FREQ_MASK 0x0000003F 123#define CS35L56_ASP_BCLK_FREQ_SHIFT 0 124 125/* ASP_CONTROL2 */ 126#define CS35L56_ASP_RX_WIDTH_MASK 0xFF000000 127#define CS35L56_ASP_RX_WIDTH_SHIFT 24 128#define CS35L56_ASP_TX_WIDTH_MASK 0x00FF0000 129#define CS35L56_ASP_TX_WIDTH_SHIFT 16 130#define CS35L56_ASP_FMT_MASK 0x00000700 131#define CS35L56_ASP_FMT_SHIFT 8 132#define CS35L56_ASP_BCLK_INV_MASK 0x00000040 133#define CS35L56_ASP_FSYNC_INV_MASK 0x00000004 134 135/* ASP_CONTROL3 */ 136#define CS35L56_ASP1_DOUT_HIZ_CTRL_MASK 0x00000003 137 138/* ASP_DATA_CONTROL1 */ 139#define CS35L56_ASP_TX_WL_MASK 0x0000003F 140 141/* ASP_DATA_CONTROL5 */ 142#define CS35L56_ASP_RX_WL_MASK 0x0000003F 143 144/* ASPTXn_INPUT */ 145#define CS35L56_ASP_TXn_SRC_MASK 0x0000007F 146 147/* SWIRETX[1..7]_SRC SDWTXn INPUT */ 148#define CS35L56_SWIRETXn_SRC_MASK 0x0000007F 149 150/* IRQ1_STATUS */ 151#define CS35L56_IRQ1_STS_MASK 0x00000001 152 153/* IRQ1_EINT_1 */ 154#define CS35L56_AMP_SHORT_ERR_EINT1_MASK 0x80000000 155 156/* IRQ1_EINT_2 */ 157#define CS35L56_DSP_VIRTUAL2_MBOX_WR_EINT1_MASK 0x00200000 158 159/* IRQ1_EINT_4 */ 160#define CS35L56_OTP_BOOT_DONE_MASK 0x00000002 161 162/* IRQ1_EINT_8 */ 163#define CS35L56_TEMP_ERR_EINT1_MASK 0x80000000 164 165/* Mixer input sources */ 166#define CS35L56_INPUT_SRC_NONE 0x00 167#define CS35L56_INPUT_SRC_ASP1RX1 0x08 168#define CS35L56_INPUT_SRC_ASP1RX2 0x09 169#define CS35L56_INPUT_SRC_VMON 0x18 170#define CS35L56_INPUT_SRC_IMON 0x19 171#define CS35L56_INPUT_SRC_ERR_VOL 0x20 172#define CS35L56_INPUT_SRC_CLASSH 0x21 173#define CS35L56_INPUT_SRC_VDDBMON 0x28 174#define CS35L56_INPUT_SRC_VBSTMON 0x29 175#define CS35L56_INPUT_SRC_DSP1TX1 0x32 176#define CS35L56_INPUT_SRC_DSP1TX2 0x33 177#define CS35L56_INPUT_SRC_DSP1TX3 0x34 178#define CS35L56_INPUT_SRC_DSP1TX4 0x35 179#define CS35L56_INPUT_SRC_DSP1TX5 0x36 180#define CS35L56_INPUT_SRC_DSP1TX6 0x37 181#define CS35L56_INPUT_SRC_DSP1TX7 0x38 182#define CS35L56_INPUT_SRC_DSP1TX8 0x39 183#define CS35L56_INPUT_SRC_TEMPMON 0x3A 184#define CS35L56_INPUT_SRC_INTERPOLATOR 0x40 185#define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL1 0x44 186#define CS35L56_INPUT_SRC_SWIRE_DP1_CHANNEL2 0x45 187#define CS35L56_INPUT_MASK 0x7F 188 189#define CS35L56_NUM_INPUT_SRC 21 190 191/* ASP formats */ 192#define CS35L56_ASP_FMT_DSP_A 0 193#define CS35L56_ASP_FMT_I2S 2 194 195/* ASP HiZ modes */ 196#define CS35L56_ASP_UNUSED_HIZ_OFF_HIZ 3 197 198/* MAIN_RENDER_ACTUAL_PS */ 199#define CS35L56_PS0 0 200#define CS35L56_PS3 3 201 202/* CS35L56_DSP_RESTRICT_STS1 */ 203#define CS35L56_RESTRICTED_MASK 0x7 204 205/* CS35L56_MAIN_RENDER_USER_MUTE */ 206#define CS35L56_MAIN_RENDER_USER_MUTE_MASK 1 207 208/* CS35L56_MAIN_RENDER_USER_VOLUME */ 209#define CS35L56_MAIN_RENDER_USER_VOLUME_MIN -400 210#define CS35L56_MAIN_RENDER_USER_VOLUME_MAX 48 211#define CS35L56_MAIN_RENDER_USER_VOLUME_MASK 0x0000FFC0 212#define CS35L56_MAIN_RENDER_USER_VOLUME_SHIFT 6 213#define CS35L56_MAIN_RENDER_USER_VOLUME_SIGNBIT 9 214 215/* CS35L56_MAIN_POSTURE_NUMBER */ 216#define CS35L56_MAIN_POSTURE_MIN 0 217#define CS35L56_MAIN_POSTURE_MAX 255 218#define CS35L56_MAIN_POSTURE_MASK CS35L56_MAIN_POSTURE_MAX 219 220/* CS35L56_PROTECTION_STATUS */ 221#define CS35L56_FIRMWARE_MISSING BIT(0) 222 223/* Software Values */ 224#define CS35L56_HALO_STATE_SHUTDOWN 1 225#define CS35L56_HALO_STATE_BOOT_DONE 2 226 227#define CS35L56_MBOX_CMD_AUDIO_PLAY 0x0B000001 228#define CS35L56_MBOX_CMD_AUDIO_PAUSE 0x0B000002 229#define CS35L56_MBOX_CMD_AUDIO_REINIT 0x0B000003 230#define CS35L56_MBOX_CMD_HIBERNATE_NOW 0x02000001 231#define CS35L56_MBOX_CMD_WAKEUP 0x02000002 232#define CS35L56_MBOX_CMD_PREVENT_AUTO_HIBERNATE 0x02000003 233#define CS35L56_MBOX_CMD_ALLOW_AUTO_HIBERNATE 0x02000004 234#define CS35L56_MBOX_CMD_SHUTDOWN 0x02000005 235#define CS35L56_MBOX_CMD_SYSTEM_RESET 0x02000007 236 237#define CS35L56_MBOX_TIMEOUT_US 5000 238#define CS35L56_MBOX_POLL_US 250 239 240#define CS35L56_PS0_POLL_US 500 241#define CS35L56_PS0_TIMEOUT_US 50000 242#define CS35L56_PS3_POLL_US 500 243#define CS35L56_PS3_TIMEOUT_US 300000 244 245#define CS35L56_CONTROL_PORT_READY_US 2200 246#define CS35L56_HALO_STATE_POLL_US 1000 247#define CS35L56_HALO_STATE_TIMEOUT_US 250000 248#define CS35L56_RESET_PULSE_MIN_US 1100 249#define CS35L56_WAKE_HOLD_TIME_US 1000 250 251#define CS35L56_SDW1_PLAYBACK_PORT 1 252#define CS35L56_SDW1_CAPTURE_PORT 3 253 254#define CS35L56_NUM_BULK_SUPPLIES 3 255#define CS35L56_NUM_DSP_REGIONS 5 256 257struct cs35l56_base { 258 struct device *dev; 259 struct regmap *regmap; 260 int irq; 261 struct mutex irq_lock; 262 u8 type; 263 u8 rev; 264 bool init_done; 265 bool fw_patched; 266 bool secured; 267 bool can_hibernate; 268 bool cal_data_valid; 269 s8 cal_index; 270 struct cirrus_amp_cal_data cal_data; 271 struct gpio_desc *reset_gpio; 272}; 273 274/* Temporary to avoid a build break with the HDA driver */ 275static inline int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base) 276{ 277 return 0; 278} 279 280static inline bool cs35l56_is_otp_register(unsigned int reg) 281{ 282 return (reg >> 16) == 3; 283} 284 285extern const struct regmap_config cs35l56_regmap_i2c; 286extern const struct regmap_config cs35l56_regmap_spi; 287extern const struct regmap_config cs35l56_regmap_sdw; 288 289extern const struct cirrus_amp_cal_controls cs35l56_calibration_controls; 290 291extern const char * const cs35l56_tx_input_texts[CS35L56_NUM_INPUT_SRC]; 292extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC]; 293 294int cs35l56_set_patch(struct cs35l56_base *cs35l56_base); 295int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command); 296int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base); 297int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base); 298void cs35l56_wait_control_port_ready(void); 299void cs35l56_wait_min_reset_pulse(void); 300void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire); 301int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq); 302irqreturn_t cs35l56_irq(int irq, void *data); 303int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base); 304int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base); 305int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire); 306void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp); 307int cs35l56_get_calibration(struct cs35l56_base *cs35l56_base); 308int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base, 309 bool *fw_missing, unsigned int *fw_version); 310int cs35l56_hw_init(struct cs35l56_base *cs35l56_base); 311int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base); 312int cs35l56_get_bclk_freq_id(unsigned int freq); 313void cs35l56_fill_supply_names(struct regulator_bulk_data *data); 314 315#endif /* ifndef __CS35L56_H */