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linux
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SPI host driver using generic bitbanged GPIO
4 *
5 * Copyright (C) 2006,2008 David Brownell
6 * Copyright (C) 2017 Linus Walleij
7 */
8#include <linux/gpio/consumer.h>
9#include <linux/kernel.h>
10#include <linux/mod_devicetable.h>
11#include <linux/module.h>
12#include <linux/platform_device.h>
13#include <linux/property.h>
14
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_bitbang.h>
17#include <linux/spi/spi_gpio.h>
18
19/*
20 * This bitbanging SPI host driver should help make systems usable
21 * when a native hardware SPI engine is not available, perhaps because
22 * its driver isn't yet working or because the I/O pins it requires
23 * are used for other purposes.
24 *
25 * platform_device->driver_data ... points to spi_gpio
26 *
27 * spi->controller_state ... reserved for bitbang framework code
28 *
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
30 */
31
32struct spi_gpio {
33 struct spi_bitbang bitbang;
34 struct gpio_desc *sck;
35 struct gpio_desc *miso;
36 struct gpio_desc *mosi;
37 struct gpio_desc **cs_gpios;
38};
39
40/*----------------------------------------------------------------------*/
41
42/*
43 * Because the overhead of going through four GPIO procedure calls
44 * per transferred bit can make performance a problem, this code
45 * is set up so that you can use it in either of two ways:
46 *
47 * - The slow generic way: set up platform_data to hold the GPIO
48 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
49 * each of them. This driver can handle several such busses.
50 *
51 * - The quicker inlined way: only helps with platform GPIO code
52 * that inlines operations for constant GPIOs. This can give
53 * you tight (fast!) inner loops, but each such bus needs a
54 * new driver. You'll define a new C file, with Makefile and
55 * Kconfig support; the C code can be a total of six lines:
56 *
57 * #define DRIVER_NAME "myboard_spi2"
58 * #define SPI_MISO_GPIO 119
59 * #define SPI_MOSI_GPIO 120
60 * #define SPI_SCK_GPIO 121
61 * #define SPI_N_CHIPSEL 4
62 * #include "spi-gpio.c"
63 */
64
65#ifndef DRIVER_NAME
66#define DRIVER_NAME "spi_gpio"
67
68#define GENERIC_BITBANG /* vs tight inlines */
69
70#endif
71
72/*----------------------------------------------------------------------*/
73
74static inline struct spi_gpio *__pure
75spi_to_spi_gpio(const struct spi_device *spi)
76{
77 const struct spi_bitbang *bang;
78 struct spi_gpio *spi_gpio;
79
80 bang = spi_controller_get_devdata(spi->controller);
81 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
82 return spi_gpio;
83}
84
85/* These helpers are in turn called by the bitbang inlines */
86static inline void setsck(const struct spi_device *spi, int is_on)
87{
88 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
89
90 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
91}
92
93static inline void setmosi(const struct spi_device *spi, int is_on)
94{
95 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
96
97 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
98}
99
100static inline int getmiso(const struct spi_device *spi)
101{
102 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
103
104 if (spi->mode & SPI_3WIRE)
105 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
106 else
107 return !!gpiod_get_value_cansleep(spi_gpio->miso);
108}
109
110/*
111 * NOTE: this clocks "as fast as we can". It "should" be a function of the
112 * requested device clock. Software overhead means we usually have trouble
113 * reaching even one Mbit/sec (except when we can inline bitops), so for now
114 * we'll just assume we never need additional per-bit slowdowns.
115 */
116#define spidelay(nsecs) do {} while (0)
117
118#include "spi-bitbang-txrx.h"
119
120/*
121 * These functions can leverage inline expansion of GPIO calls to shrink
122 * costs for a txrx bit, often by factors of around ten (by instruction
123 * count). That is particularly visible for larger word sizes, but helps
124 * even with default 8-bit words.
125 *
126 * REVISIT overheads calling these functions for each word also have
127 * significant performance costs. Having txrx_bufs() calls that inline
128 * the txrx_word() logic would help performance, e.g. on larger blocks
129 * used with flash storage or MMC/SD. There should also be ways to make
130 * GCC be less stupid about reloading registers inside the I/O loops,
131 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
132 */
133
134static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
135 unsigned nsecs, u32 word, u8 bits, unsigned flags)
136{
137 if (unlikely(spi->mode & SPI_LSB_FIRST))
138 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
139 else
140 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
141}
142
143static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
144 unsigned nsecs, u32 word, u8 bits, unsigned flags)
145{
146 if (unlikely(spi->mode & SPI_LSB_FIRST))
147 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
148 else
149 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
150}
151
152static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
153 unsigned nsecs, u32 word, u8 bits, unsigned flags)
154{
155 if (unlikely(spi->mode & SPI_LSB_FIRST))
156 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
157 else
158 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
159}
160
161static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
162 unsigned nsecs, u32 word, u8 bits, unsigned flags)
163{
164 if (unlikely(spi->mode & SPI_LSB_FIRST))
165 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
166 else
167 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
168}
169
170/*
171 * These functions do not call setmosi or getmiso if respective flag
172 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
173 * call when such pin is not present or defined in the controller.
174 * A separate set of callbacks is defined to get highest possible
175 * speed in the generic case (when both MISO and MOSI lines are
176 * available), as optimiser will remove the checks when argument is
177 * constant.
178 */
179
180static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
181 unsigned nsecs, u32 word, u8 bits, unsigned flags)
182{
183 flags = spi->controller->flags;
184 if (unlikely(spi->mode & SPI_LSB_FIRST))
185 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
186 else
187 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
188}
189
190static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
191 unsigned nsecs, u32 word, u8 bits, unsigned flags)
192{
193 flags = spi->controller->flags;
194 if (unlikely(spi->mode & SPI_LSB_FIRST))
195 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
196 else
197 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
198}
199
200static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
201 unsigned nsecs, u32 word, u8 bits, unsigned flags)
202{
203 flags = spi->controller->flags;
204 if (unlikely(spi->mode & SPI_LSB_FIRST))
205 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
206 else
207 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
208}
209
210static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
211 unsigned nsecs, u32 word, u8 bits, unsigned flags)
212{
213 flags = spi->controller->flags;
214 if (unlikely(spi->mode & SPI_LSB_FIRST))
215 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
216 else
217 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
218}
219
220/*----------------------------------------------------------------------*/
221
222static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
223{
224 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
225
226 /* set initial clock line level */
227 if (is_active)
228 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
229
230 /* Drive chip select line, if we have one */
231 if (spi_gpio->cs_gpios) {
232 struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
233
234 /* SPI chip selects are normally active-low */
235 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
236 }
237}
238
239static int spi_gpio_setup(struct spi_device *spi)
240{
241 struct gpio_desc *cs;
242 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
243 int ret;
244
245 /*
246 * The CS GPIOs have already been
247 * initialized from the descriptor lookup.
248 */
249 if (spi_gpio->cs_gpios) {
250 cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
251 if (!spi->controller_state && cs) {
252 ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
253 if (ret)
254 return ret;
255 }
256 }
257
258 return spi_bitbang_setup(spi);
259}
260
261static int spi_gpio_set_direction(struct spi_device *spi, bool output)
262{
263 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
264 int ret;
265
266 if (output)
267 return gpiod_direction_output(spi_gpio->mosi, 1);
268
269 /*
270 * Only change MOSI to an input if using 3WIRE mode.
271 * Otherwise, MOSI could be left floating if there is
272 * no pull resistor connected to the I/O pin, or could
273 * be left logic high if there is a pull-up. Transmitting
274 * logic high when only clocking MISO data in can put some
275 * SPI devices in to a bad state.
276 */
277 if (spi->mode & SPI_3WIRE) {
278 ret = gpiod_direction_input(spi_gpio->mosi);
279 if (ret)
280 return ret;
281 }
282 /*
283 * Send a turnaround high impedance cycle when switching
284 * from output to input. Theoretically there should be
285 * a clock delay here, but as has been noted above, the
286 * nsec delay function for bit-banged GPIO is simply
287 * {} because bit-banging just doesn't get fast enough
288 * anyway.
289 */
290 if (spi->mode & SPI_3WIRE_HIZ) {
291 gpiod_set_value_cansleep(spi_gpio->sck,
292 !(spi->mode & SPI_CPOL));
293 gpiod_set_value_cansleep(spi_gpio->sck,
294 !!(spi->mode & SPI_CPOL));
295 }
296 return 0;
297}
298
299static void spi_gpio_cleanup(struct spi_device *spi)
300{
301 spi_bitbang_cleanup(spi);
302}
303
304/*
305 * It can be convenient to use this driver with pins that have alternate
306 * functions associated with a "native" SPI controller if a driver for that
307 * controller is not available, or is missing important functionality.
308 *
309 * On platforms which can do so, configure MISO with a weak pullup unless
310 * there's an external pullup on that signal. That saves power by avoiding
311 * floating signals. (A weak pulldown would save power too, but many
312 * drivers expect to see all-ones data as the no target "response".)
313 */
314static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
315{
316 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
317 if (IS_ERR(spi_gpio->mosi))
318 return PTR_ERR(spi_gpio->mosi);
319
320 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
321 if (IS_ERR(spi_gpio->miso))
322 return PTR_ERR(spi_gpio->miso);
323
324 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
325 return PTR_ERR_OR_ZERO(spi_gpio->sck);
326}
327
328static int spi_gpio_probe_pdata(struct platform_device *pdev,
329 struct spi_controller *host)
330{
331 struct device *dev = &pdev->dev;
332 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
333 struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
334 int i;
335
336#ifdef GENERIC_BITBANG
337 if (!pdata || !pdata->num_chipselect)
338 return -ENODEV;
339#endif
340 /*
341 * The host needs to think there is a chipselect even if not
342 * connected
343 */
344 host->num_chipselect = pdata->num_chipselect ?: 1;
345
346 spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
347 sizeof(*spi_gpio->cs_gpios),
348 GFP_KERNEL);
349 if (!spi_gpio->cs_gpios)
350 return -ENOMEM;
351
352 for (i = 0; i < host->num_chipselect; i++) {
353 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
354 GPIOD_OUT_HIGH);
355 if (IS_ERR(spi_gpio->cs_gpios[i]))
356 return PTR_ERR(spi_gpio->cs_gpios[i]);
357 }
358
359 return 0;
360}
361
362static int spi_gpio_probe(struct platform_device *pdev)
363{
364 int status;
365 struct spi_controller *host;
366 struct spi_gpio *spi_gpio;
367 struct device *dev = &pdev->dev;
368 struct fwnode_handle *fwnode = dev_fwnode(dev);
369 struct spi_bitbang *bb;
370
371 host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
372 if (!host)
373 return -ENOMEM;
374
375 if (fwnode) {
376 device_set_node(&host->dev, fwnode);
377 host->use_gpio_descriptors = true;
378 } else {
379 status = spi_gpio_probe_pdata(pdev, host);
380 if (status)
381 return status;
382 }
383
384 spi_gpio = spi_controller_get_devdata(host);
385
386 status = spi_gpio_request(dev, spi_gpio);
387 if (status)
388 return status;
389
390 host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
391 host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
392 SPI_CS_HIGH | SPI_LSB_FIRST;
393 if (!spi_gpio->mosi) {
394 /* HW configuration without MOSI pin
395 *
396 * No setting SPI_CONTROLLER_NO_RX here - if there is only
397 * a MOSI pin connected the host can still do RX by
398 * changing the direction of the line.
399 */
400 host->flags = SPI_CONTROLLER_NO_TX;
401 }
402
403 host->bus_num = pdev->id;
404 host->setup = spi_gpio_setup;
405 host->cleanup = spi_gpio_cleanup;
406
407 bb = &spi_gpio->bitbang;
408 bb->ctlr = host;
409 /*
410 * There is some additional business, apart from driving the CS GPIO
411 * line, that we need to do on selection. This makes the local
412 * callback for chipselect always get called.
413 */
414 host->flags |= SPI_CONTROLLER_GPIO_SS;
415 bb->chipselect = spi_gpio_chipselect;
416 bb->set_line_direction = spi_gpio_set_direction;
417
418 if (host->flags & SPI_CONTROLLER_NO_TX) {
419 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
420 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
421 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
422 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
423 } else {
424 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
425 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
426 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
427 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
428 }
429 bb->setup_transfer = spi_bitbang_setup_transfer;
430
431 status = spi_bitbang_init(&spi_gpio->bitbang);
432 if (status)
433 return status;
434
435 return devm_spi_register_controller(&pdev->dev, host);
436}
437
438MODULE_ALIAS("platform:" DRIVER_NAME);
439
440static const struct of_device_id spi_gpio_dt_ids[] = {
441 { .compatible = "spi-gpio" },
442 {}
443};
444MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
445
446static struct platform_driver spi_gpio_driver = {
447 .driver = {
448 .name = DRIVER_NAME,
449 .of_match_table = spi_gpio_dt_ids,
450 },
451 .probe = spi_gpio_probe,
452};
453module_platform_driver(spi_gpio_driver);
454
455MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
456MODULE_AUTHOR("David Brownell");
457MODULE_LICENSE("GPL");