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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2019 Solarflare Communications Inc. 5 * Copyright 2020-2022 Xilinx Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation, incorporated herein by reference. 10 */ 11 12#ifndef EFX_TC_H 13#define EFX_TC_H 14#include <net/flow_offload.h> 15#include <linux/rhashtable.h> 16#include "net_driver.h" 17 18/* Error reporting: convenience macros. For indicating why a given filter 19 * insertion is not supported; errors in internal operation or in the 20 * hardware should be netif_err()s instead. 21 */ 22/* Used when error message is constant. */ 23#define EFX_TC_ERR_MSG(efx, extack, message) do { \ 24 NL_SET_ERR_MSG_MOD(extack, message); \ 25 if (efx->log_tc_errs) \ 26 netif_info(efx, drv, efx->net_dev, "%s\n", message); \ 27} while (0) 28/* Used when error message is not constant; caller should also supply a 29 * constant extack message with NL_SET_ERR_MSG_MOD(). 30 */ 31#define efx_tc_err(efx, fmt, args...) do { \ 32if (efx->log_tc_errs) \ 33 netif_info(efx, drv, efx->net_dev, fmt, ##args);\ 34} while (0) 35 36struct efx_tc_action_set { 37 u16 deliver:1; 38 u32 dest_mport; 39 u32 fw_id; /* index of this entry in firmware actions table */ 40 struct list_head list; 41}; 42 43struct efx_tc_match_fields { 44 /* L1 */ 45 u32 ingress_port; 46 u8 recirc_id; 47}; 48 49struct efx_tc_match { 50 struct efx_tc_match_fields value; 51 struct efx_tc_match_fields mask; 52}; 53 54struct efx_tc_action_set_list { 55 struct list_head list; 56 u32 fw_id; 57}; 58 59struct efx_tc_flow_rule { 60 unsigned long cookie; 61 struct rhash_head linkage; 62 struct efx_tc_match match; 63 struct efx_tc_action_set_list acts; 64 u32 fw_id; 65}; 66 67enum efx_tc_rule_prios { 68 EFX_TC_PRIO_TC, /* Rule inserted by TC */ 69 EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */ 70 EFX_TC_PRIO__NUM 71}; 72 73/** 74 * struct efx_tc_state - control plane data for TC offload 75 * 76 * @caps: MAE capabilities reported by MCDI 77 * @block_list: List of &struct efx_tc_block_binding 78 * @mutex: Used to serialise operations on TC hashtables 79 * @match_action_ht: Hashtable of TC match-action rules 80 * @reps_mport_id: MAE port allocated for representor RX 81 * @reps_filter_uc: VNIC filter for representor unicast RX (promisc) 82 * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti) 83 * @reps_mport_vport_id: vport_id for representor RX filters 84 * @dflt: Match-action rules for default switching; at priority 85 * %EFX_TC_PRIO_DFLT. Named by *ingress* port 86 * @dflt.pf: rule for traffic ingressing from PF (egresses to wire) 87 * @dflt.wire: rule for traffic ingressing from wire (egresses to PF) 88 * @up: have TC datastructures been set up? 89 */ 90struct efx_tc_state { 91 struct mae_caps *caps; 92 struct list_head block_list; 93 struct mutex mutex; 94 struct rhashtable match_action_ht; 95 u32 reps_mport_id, reps_mport_vport_id; 96 s32 reps_filter_uc, reps_filter_mc; 97 struct { 98 struct efx_tc_flow_rule pf; 99 struct efx_tc_flow_rule wire; 100 } dflt; 101 bool up; 102}; 103 104struct efx_rep; 105 106int efx_tc_configure_default_rule_rep(struct efx_rep *efv); 107void efx_tc_deconfigure_default_rule(struct efx_nic *efx, 108 struct efx_tc_flow_rule *rule); 109int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev, 110 struct flow_cls_offload *tc, struct efx_rep *efv); 111 112int efx_tc_insert_rep_filters(struct efx_nic *efx); 113void efx_tc_remove_rep_filters(struct efx_nic *efx); 114 115int efx_init_tc(struct efx_nic *efx); 116void efx_fini_tc(struct efx_nic *efx); 117 118int efx_init_struct_tc(struct efx_nic *efx); 119void efx_fini_struct_tc(struct efx_nic *efx); 120 121#endif /* EFX_TC_H */