tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Shunli Wang <shunli.wang@mediatek.com>
5 */
6
7#include <linux/clk-provider.h>
8#include <linux/platform_device.h>
9
10#include "clk-mtk.h"
11#include "clk-gate.h"
12
13#include <dt-bindings/clock/mt2701-clk.h>
14
15static const struct mtk_gate_regs eth_cg_regs = {
16 .sta_ofs = 0x0030,
17};
18
19#define GATE_ETH(_id, _name, _parent, _shift) { \
20 .id = _id, \
21 .name = _name, \
22 .parent_name = _parent, \
23 .regs = ð_cg_regs, \
24 .shift = _shift, \
25 .ops = &mtk_clk_gate_ops_no_setclr_inv, \
26 }
27
28static const struct mtk_gate eth_clks[] = {
29 GATE_ETH(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5),
30 GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
31 GATE_ETH(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7),
32 GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
33 GATE_ETH(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11),
34 GATE_ETH(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14),
35 GATE_ETH(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17),
36 GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),
37};
38
39static u16 rst_ofs[] = { 0x34, };
40
41static const struct mtk_clk_rst_desc clk_rst_desc = {
42 .version = MTK_RST_SIMPLE,
43 .rst_bank_ofs = rst_ofs,
44 .rst_bank_nr = ARRAY_SIZE(rst_ofs),
45};
46
47static const struct of_device_id of_match_clk_mt2701_eth[] = {
48 { .compatible = "mediatek,mt2701-ethsys", },
49 {}
50};
51
52static int clk_mt2701_eth_probe(struct platform_device *pdev)
53{
54 struct clk_hw_onecell_data *clk_data;
55 int r;
56 struct device_node *node = pdev->dev.of_node;
57
58 clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR);
59
60 mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks),
61 clk_data);
62
63 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
64 if (r)
65 dev_err(&pdev->dev,
66 "could not register clock provider: %s: %d\n",
67 pdev->name, r);
68
69 mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
70
71 return r;
72}
73
74static struct platform_driver clk_mt2701_eth_drv = {
75 .probe = clk_mt2701_eth_probe,
76 .driver = {
77 .name = "clk-mt2701-eth",
78 .of_match_table = of_match_clk_mt2701_eth,
79 },
80};
81
82builtin_platform_driver(clk_mt2701_eth_drv);