tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef __SOC_MEDIATEK_MTK_PM_DOMAINS_H
4#define __SOC_MEDIATEK_MTK_PM_DOMAINS_H
5
6#define MTK_SCPD_ACTIVE_WAKEUP BIT(0)
7#define MTK_SCPD_FWAIT_SRAM BIT(1)
8#define MTK_SCPD_SRAM_ISO BIT(2)
9#define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
10#define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
11/* can't set MTK_SCPD_KEEP_DEFAULT_OFF at the same time */
12#define MTK_SCPD_ALWAYS_ON BIT(5)
13#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
14
15#define SPM_VDE_PWR_CON 0x0210
16#define SPM_MFG_PWR_CON 0x0214
17#define SPM_VEN_PWR_CON 0x0230
18#define SPM_ISP_PWR_CON 0x0238
19#define SPM_DIS_PWR_CON 0x023c
20#define SPM_CONN_PWR_CON 0x0280
21#define SPM_VEN2_PWR_CON 0x0298
22#define SPM_AUDIO_PWR_CON 0x029c
23#define SPM_MFG_2D_PWR_CON 0x02c0
24#define SPM_MFG_ASYNC_PWR_CON 0x02c4
25#define SPM_USB_PWR_CON 0x02cc
26
27#define SPM_PWR_STATUS 0x060c
28#define SPM_PWR_STATUS_2ND 0x0610
29
30#define PWR_STATUS_CONN BIT(1)
31#define PWR_STATUS_DISP BIT(3)
32#define PWR_STATUS_MFG BIT(4)
33#define PWR_STATUS_ISP BIT(5)
34#define PWR_STATUS_VDEC BIT(7)
35#define PWR_STATUS_VENC_LT BIT(20)
36#define PWR_STATUS_VENC BIT(21)
37#define PWR_STATUS_MFG_2D BIT(22)
38#define PWR_STATUS_MFG_ASYNC BIT(23)
39#define PWR_STATUS_AUDIO BIT(24)
40#define PWR_STATUS_USB BIT(25)
41
42#define SPM_MAX_BUS_PROT_DATA 6
43
44#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
45 .bus_prot_mask = (_mask), \
46 .bus_prot_set = _set, \
47 .bus_prot_clr = _clr, \
48 .bus_prot_sta = _sta, \
49 .bus_prot_reg_update = _update, \
50 .ignore_clr_ack = _ignore, \
51 }
52
53#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
54 _BUS_PROT(_mask, _set, _clr, _sta, false, false)
55
56#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
57 _BUS_PROT(_mask, _set, _clr, _sta, false, true)
58
59#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
60 _BUS_PROT(_mask, _set, _clr, _sta, true, false)
61
62#define BUS_PROT_UPDATE_TOPAXI(_mask) \
63 BUS_PROT_UPDATE(_mask, \
64 INFRA_TOPAXI_PROTECTEN, \
65 INFRA_TOPAXI_PROTECTEN, \
66 INFRA_TOPAXI_PROTECTSTA1)
67
68struct scpsys_bus_prot_data {
69 u32 bus_prot_mask;
70 u32 bus_prot_set;
71 u32 bus_prot_clr;
72 u32 bus_prot_sta;
73 bool bus_prot_reg_update;
74 bool ignore_clr_ack;
75};
76
77/**
78 * struct scpsys_domain_data - scp domain data for power on/off flow
79 * @name: The name of the power domain.
80 * @sta_mask: The mask for power on/off status bit.
81 * @ctl_offs: The offset for main power control register.
82 * @sram_pdn_bits: The mask for sram power control bits.
83 * @sram_pdn_ack_bits: The mask for sram power control acked bits.
84 * @caps: The flag for active wake-up action.
85 * @bp_infracfg: bus protection for infracfg subsystem
86 * @bp_smi: bus protection for smi subsystem
87 */
88struct scpsys_domain_data {
89 const char *name;
90 u32 sta_mask;
91 int ctl_offs;
92 u32 sram_pdn_bits;
93 u32 sram_pdn_ack_bits;
94 u8 caps;
95 const struct scpsys_bus_prot_data bp_infracfg[SPM_MAX_BUS_PROT_DATA];
96 const struct scpsys_bus_prot_data bp_smi[SPM_MAX_BUS_PROT_DATA];
97 int pwr_sta_offs;
98 int pwr_sta2nd_offs;
99};
100
101struct scpsys_soc_data {
102 const struct scpsys_domain_data *domains_data;
103 int num_domains;
104};
105
106#endif /* __SOC_MEDIATEK_MTK_PM_DOMAINS_H */