tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2015, Sony Mobile Communications AB
5 */
6
7#include <linux/hwspinlock.h>
8#include <linux/io.h>
9#include <linux/kernel.h>
10#include <linux/mfd/syscon.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_device.h>
14#include <linux/platform_device.h>
15#include <linux/regmap.h>
16
17#include "hwspinlock_internal.h"
18
19#define QCOM_MUTEX_APPS_PROC_ID 1
20#define QCOM_MUTEX_NUM_LOCKS 32
21
22struct qcom_hwspinlock_of_data {
23 u32 offset;
24 u32 stride;
25};
26
27static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
28{
29 struct regmap_field *field = lock->priv;
30 u32 lock_owner;
31 int ret;
32
33 ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
34 if (ret)
35 return ret;
36
37 ret = regmap_field_read(field, &lock_owner);
38 if (ret)
39 return ret;
40
41 return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
42}
43
44static void qcom_hwspinlock_unlock(struct hwspinlock *lock)
45{
46 struct regmap_field *field = lock->priv;
47 u32 lock_owner;
48 int ret;
49
50 ret = regmap_field_read(field, &lock_owner);
51 if (ret) {
52 pr_err("%s: unable to query spinlock owner\n", __func__);
53 return;
54 }
55
56 if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
57 pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
58 __func__, lock_owner);
59 }
60
61 ret = regmap_field_write(field, 0);
62 if (ret)
63 pr_err("%s: failed to unlock spinlock\n", __func__);
64}
65
66static const struct hwspinlock_ops qcom_hwspinlock_ops = {
67 .trylock = qcom_hwspinlock_trylock,
68 .unlock = qcom_hwspinlock_unlock,
69};
70
71static const struct qcom_hwspinlock_of_data of_sfpb_mutex = {
72 .offset = 0x4,
73 .stride = 0x4,
74};
75
76/* All modern platform has offset 0 and stride of 4k */
77static const struct qcom_hwspinlock_of_data of_tcsr_mutex = {
78 .offset = 0,
79 .stride = 0x1000,
80};
81
82static const struct of_device_id qcom_hwspinlock_of_match[] = {
83 { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex },
84 { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex },
85 { }
86};
87MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
88
89static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev,
90 u32 *base, u32 *stride)
91{
92 struct device_node *syscon;
93 struct regmap *regmap;
94 int ret;
95
96 syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
97 if (!syscon)
98 return ERR_PTR(-ENODEV);
99
100 regmap = syscon_node_to_regmap(syscon);
101 of_node_put(syscon);
102 if (IS_ERR(regmap))
103 return regmap;
104
105 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base);
106 if (ret < 0) {
107 dev_err(&pdev->dev, "no offset in syscon\n");
108 return ERR_PTR(-EINVAL);
109 }
110
111 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride);
112 if (ret < 0) {
113 dev_err(&pdev->dev, "no stride syscon\n");
114 return ERR_PTR(-EINVAL);
115 }
116
117 return regmap;
118}
119
120static const struct regmap_config tcsr_mutex_config = {
121 .reg_bits = 32,
122 .reg_stride = 4,
123 .val_bits = 32,
124 .max_register = 0x40000,
125 .fast_io = true,
126};
127
128static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
129 u32 *offset, u32 *stride)
130{
131 const struct qcom_hwspinlock_of_data *data;
132 struct device *dev = &pdev->dev;
133 void __iomem *base;
134
135 data = of_device_get_match_data(dev);
136
137 *offset = data->offset;
138 *stride = data->stride;
139
140 base = devm_platform_ioremap_resource(pdev, 0);
141 if (IS_ERR(base))
142 return ERR_CAST(base);
143
144 return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config);
145}
146
147static int qcom_hwspinlock_probe(struct platform_device *pdev)
148{
149 struct hwspinlock_device *bank;
150 struct reg_field field;
151 struct regmap *regmap;
152 size_t array_size;
153 u32 stride;
154 u32 base;
155 int i;
156
157 regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride);
158 if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV)
159 regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride);
160
161 if (IS_ERR(regmap))
162 return PTR_ERR(regmap);
163
164 array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
165 bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
166 if (!bank)
167 return -ENOMEM;
168
169 platform_set_drvdata(pdev, bank);
170
171 for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
172 field.reg = base + i * stride;
173 field.lsb = 0;
174 field.msb = 31;
175
176 bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
177 regmap, field);
178 }
179
180 return devm_hwspin_lock_register(&pdev->dev, bank, &qcom_hwspinlock_ops,
181 0, QCOM_MUTEX_NUM_LOCKS);
182}
183
184static struct platform_driver qcom_hwspinlock_driver = {
185 .probe = qcom_hwspinlock_probe,
186 .driver = {
187 .name = "qcom_hwspinlock",
188 .of_match_table = qcom_hwspinlock_of_match,
189 },
190};
191
192static int __init qcom_hwspinlock_init(void)
193{
194 return platform_driver_register(&qcom_hwspinlock_driver);
195}
196/* board init code might need to reserve hwspinlocks for predefined purposes */
197postcore_initcall(qcom_hwspinlock_init);
198
199static void __exit qcom_hwspinlock_exit(void)
200{
201 platform_driver_unregister(&qcom_hwspinlock_driver);
202}
203module_exit(qcom_hwspinlock_exit);
204
205MODULE_LICENSE("GPL v2");
206MODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");