tjh.dev / kernel
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kernel / arch / m68k / Kconfig.cpu
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1# SPDX-License-Identifier: GPL-2.0 2comment "Processor Type" 3 4choice 5 prompt "CPU family support" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 8 help 9 The Freescale (was Motorola) M68K family of processors implements 10 the full 68000 processor instruction set. 11 The Freescale ColdFire family of processors is a modern derivative 12 of the 68000 processor family. They are mainly targeted at embedded 13 applications, and are all System-On-Chip (SOC) devices, as opposed 14 to stand alone CPUs. They implement a subset of the original 68000 15 processor instruction set. 16 If you anticipate running this kernel on a computer with a classic 17 MC68xxx processor, select M68KCLASSIC. 18 If you anticipate running this kernel on a computer with a ColdFire 19 processor, select COLDFIRE. 20 21config M68KCLASSIC 22 bool "Classic M68K CPU family support" 23 select HAVE_ARCH_PFN_VALID 24 25config COLDFIRE 26 bool "Coldfire CPU family support" 27 select ARCH_HAVE_CUSTOM_GPIO_H 28 select CPU_HAS_NO_BITFIELDS 29 select CPU_HAS_NO_CAS 30 select CPU_HAS_NO_MULDIV64 31 select GENERIC_CSUM 32 select GPIOLIB 33 select HAVE_LEGACY_CLK 34 35endchoice 36 37if M68KCLASSIC 38 39config M68000 40 def_bool y 41 depends on !MMU 42 select CPU_HAS_NO_BITFIELDS 43 select CPU_HAS_NO_CAS 44 select CPU_HAS_NO_MULDIV64 45 select CPU_HAS_NO_UNALIGNED 46 select GENERIC_CSUM 47 select CPU_NO_EFFICIENT_FFS 48 select HAVE_ARCH_HASH 49 help 50 The Freescale (was Motorola) 68000 CPU is the first generation of 51 the well known M68K family of processors. The CPU core as well as 52 being available as a stand alone CPU was also used in many 53 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 54 a paging MMU. 55 56config M68020 57 bool "68020 support" 58 depends on MMU 59 select FPU 60 select CPU_HAS_ADDRESS_SPACES 61 help 62 If you anticipate running this kernel on a computer with a MC68020 63 processor, say Y. Otherwise, say N. Note that the 68020 requires a 64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 65 Sun 3, which provides its own version. 66 67config M68030 68 bool "68030 support" 69 depends on MMU && !MMU_SUN3 70 select FPU 71 select CPU_HAS_ADDRESS_SPACES 72 help 73 If you anticipate running this kernel on a computer with a MC68030 74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 75 work, as it does not include an MMU (Memory Management Unit). 76 77config M68040 78 bool "68040 support" 79 depends on MMU && !MMU_SUN3 80 select FPU 81 select CPU_HAS_ADDRESS_SPACES 82 help 83 If you anticipate running this kernel on a computer with a MC68LC040 84 or MC68040 processor, say Y. Otherwise, say N. Note that an 85 MC68EC040 will not work, as it does not include an MMU (Memory 86 Management Unit). 87 88config M68060 89 bool "68060 support" 90 depends on MMU && !MMU_SUN3 91 select FPU 92 select CPU_HAS_ADDRESS_SPACES 93 help 94 If you anticipate running this kernel on a computer with a MC68060 95 processor, say Y. Otherwise, say N. 96 97config M68328 98 bool 99 depends on !MMU 100 select LEGACY_TIMER_TICK 101 select M68000 102 help 103 Motorola 68328 processor support. 104 105config M68EZ328 106 bool 107 depends on !MMU 108 select LEGACY_TIMER_TICK 109 select M68000 110 help 111 Motorola 68EX328 processor support. 112 113config M68VZ328 114 bool 115 depends on !MMU 116 select LEGACY_TIMER_TICK 117 select M68000 118 help 119 Motorola 68VZ328 processor support. 120 121endif # M68KCLASSIC 122 123if COLDFIRE 124 125choice 126 prompt "ColdFire SoC type" 127 default M520x 128 help 129 Select the type of ColdFire System-on-Chip (SoC) that you want 130 to build for. 131 132config M5206 133 bool "MCF5206" 134 depends on !MMU 135 select COLDFIRE_SW_A7 136 select COLDFIRE_TIMERS 137 select HAVE_MBAR 138 select CPU_NO_EFFICIENT_FFS 139 help 140 Motorola ColdFire 5206 processor support. 141 142config M5206e 143 bool "MCF5206e" 144 depends on !MMU 145 select COLDFIRE_SW_A7 146 select COLDFIRE_TIMERS 147 select HAVE_MBAR 148 select CPU_NO_EFFICIENT_FFS 149 help 150 Motorola ColdFire 5206e processor support. 151 152config M520x 153 bool "MCF520x" 154 depends on !MMU 155 select COLDFIRE_PIT_TIMER 156 select HAVE_CACHE_SPLIT 157 help 158 Freescale Coldfire 5207/5208 processor support. 159 160config M523x 161 bool "MCF523x" 162 depends on !MMU 163 select COLDFIRE_PIT_TIMER 164 select HAVE_CACHE_SPLIT 165 select HAVE_IPSBAR 166 help 167 Freescale Coldfire 5230/1/2/4/5 processor support 168 169config M5249 170 bool "MCF5249" 171 depends on !MMU 172 select COLDFIRE_SW_A7 173 select COLDFIRE_TIMERS 174 select HAVE_MBAR 175 select CPU_NO_EFFICIENT_FFS 176 help 177 Motorola ColdFire 5249 processor support. 178 179config M525x 180 bool "MCF525x" 181 depends on !MMU 182 select COLDFIRE_SW_A7 183 select COLDFIRE_TIMERS 184 select HAVE_MBAR 185 select CPU_NO_EFFICIENT_FFS 186 help 187 Freescale (Motorola) Coldfire 5251/5253 processor support. 188 189config M5271 190 bool "MCF5271" 191 depends on !MMU 192 select COLDFIRE_PIT_TIMER 193 select M527x 194 select HAVE_CACHE_SPLIT 195 select HAVE_IPSBAR 196 help 197 Freescale (Motorola) ColdFire 5270/5271 processor support. 198 199config M5272 200 bool "MCF5272" 201 depends on !MMU 202 select COLDFIRE_SW_A7 203 select COLDFIRE_TIMERS 204 select HAVE_MBAR 205 select CPU_NO_EFFICIENT_FFS 206 help 207 Motorola ColdFire 5272 processor support. 208 209config M5275 210 bool "MCF5275" 211 depends on !MMU 212 select COLDFIRE_PIT_TIMER 213 select M527x 214 select HAVE_CACHE_SPLIT 215 select HAVE_IPSBAR 216 help 217 Freescale (Motorola) ColdFire 5274/5275 processor support. 218 219config M528x 220 bool "MCF528x" 221 depends on !MMU 222 select COLDFIRE_PIT_TIMER 223 select HAVE_CACHE_SPLIT 224 select HAVE_IPSBAR 225 help 226 Motorola ColdFire 5280/5282 processor support. 227 228config M5307 229 bool "MCF5307" 230 depends on !MMU 231 select COLDFIRE_TIMERS 232 select COLDFIRE_SW_A7 233 select HAVE_CACHE_CB 234 select HAVE_MBAR 235 select CPU_NO_EFFICIENT_FFS 236 help 237 Motorola ColdFire 5307 processor support. 238 239config M532x 240 bool "MCF532x" 241 depends on !MMU 242 select COLDFIRE_TIMERS 243 select M53xx 244 select HAVE_CACHE_CB 245 help 246 Freescale (Motorola) ColdFire 532x processor support. 247 248config M537x 249 bool "MCF537x" 250 depends on !MMU 251 select COLDFIRE_TIMERS 252 select M53xx 253 select HAVE_CACHE_CB 254 help 255 Freescale ColdFire 537x processor support. 256 257config M5407 258 bool "MCF5407" 259 depends on !MMU 260 select COLDFIRE_SW_A7 261 select COLDFIRE_TIMERS 262 select HAVE_CACHE_CB 263 select HAVE_MBAR 264 select CPU_NO_EFFICIENT_FFS 265 help 266 Motorola ColdFire 5407 processor support. 267 268config M547x 269 bool "MCF547x" 270 select M54xx 271 select COLDFIRE_SLTIMERS 272 select MMU_COLDFIRE if MMU 273 select FPU if MMU 274 select HAVE_CACHE_CB 275 select HAVE_MBAR 276 select CPU_NO_EFFICIENT_FFS 277 help 278 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 279 280config M548x 281 bool "MCF548x" 282 select COLDFIRE_SLTIMERS 283 select MMU_COLDFIRE if MMU 284 select FPU if MMU 285 select M54xx 286 select HAVE_CACHE_CB 287 select HAVE_MBAR 288 select CPU_NO_EFFICIENT_FFS 289 help 290 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 291 292config M5441x 293 bool "MCF5441x" 294 select COLDFIRE_PIT_TIMER 295 select MMU_COLDFIRE if MMU 296 select HAVE_CACHE_CB 297 help 298 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 299 300endchoice 301 302config M527x 303 bool 304 305config M53xx 306 bool 307 308config M54xx 309 select HAVE_PCI 310 bool 311 312config COLDFIRE_PIT_TIMER 313 bool 314 315config COLDFIRE_TIMERS 316 bool 317 select LEGACY_TIMER_TICK 318 319config COLDFIRE_SLTIMERS 320 bool 321 select LEGACY_TIMER_TICK 322 323endif # COLDFIRE 324 325comment "Processor Specific Options" 326 327config M68KFPU_EMU 328 bool "Math emulation support" 329 depends on M68KCLASSIC && FPU 330 help 331 At some point in the future, this will cause floating-point math 332 instructions to be emulated by the kernel on machines that lack a 333 floating-point math coprocessor. Thrill-seekers and chronically 334 sleep-deprived psychotic hacker types can say Y now, everyone else 335 should probably wait a while. 336 337config M68KFPU_EMU_EXTRAPREC 338 bool "Math emulation extra precision" 339 depends on M68KFPU_EMU 340 help 341 The fpu uses normally a few bit more during calculations for 342 correct rounding, the emulator can (often) do the same but this 343 extra calculation can cost quite some time, so you can disable 344 it here. The emulator will then "only" calculate with a 64 bit 345 mantissa and round slightly incorrect, what is more than enough 346 for normal usage. 347 348config M68KFPU_EMU_ONLY 349 bool "Math emulation only kernel" 350 depends on M68KFPU_EMU 351 help 352 This option prevents any floating-point instructions from being 353 compiled into the kernel, thereby the kernel doesn't save any 354 floating point context anymore during task switches, so this 355 kernel will only be usable on machines without a floating-point 356 math coprocessor. This makes the kernel a bit faster as no tests 357 needs to be executed whether a floating-point instruction in the 358 kernel should be executed or not. 359 360config ADVANCED 361 bool "Advanced configuration options" 362 depends on MMU 363 help 364 This gives you access to some advanced options for the CPU. The 365 defaults should be fine for most users, but these options may make 366 it possible for you to improve performance somewhat if you know what 367 you are doing. 368 369 Note that the answer to this question won't directly affect the 370 kernel: saying N will just cause the configurator to skip all 371 the questions about these options. 372 373 Most users should say N to this question. 374 375config RMW_INSNS 376 bool "Use read-modify-write instructions" 377 depends on ADVANCED && !CPU_HAS_NO_CAS 378 help 379 This allows to use certain instructions that work with indivisible 380 read-modify-write bus cycles. While this is faster than the 381 workaround of disabling interrupts, it can conflict with DMA 382 ( = direct memory access) on many Amiga systems, and it is also said 383 to destabilize other machines. It is very likely that this will 384 cause serious problems on any Amiga or Atari Medusa if set. The only 385 configuration where it should work are 68030-based Ataris, where it 386 apparently improves performance. But you've been warned! Unless you 387 really know what you are doing, say N. Try Y only if you're quite 388 adventurous. 389 390config SINGLE_MEMORY_CHUNK 391 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 392 depends on MMU 393 default y if SUN3 || MMU_COLDFIRE 394 help 395 Ignore all but the first contiguous chunk of physical memory for VM 396 purposes. This will save a few bytes kernel size and may speed up 397 some operations. 398 When this option os set to N, you may want to lower "Maximum zone 399 order" to save memory that could be wasted for unused memory map. 400 Say N if not sure. 401 402config FORCE_MAX_ZONEORDER 403 int "Maximum zone order" if ADVANCED 404 depends on !SINGLE_MEMORY_CHUNK 405 default "11" 406 help 407 The kernel memory allocator divides physically contiguous memory 408 blocks into "zones", where each zone is a power of two number of 409 pages. This option selects the largest power of two that the kernel 410 keeps in the memory allocator. If you need to allocate very large 411 blocks of physically contiguous memory, then you may need to 412 increase this value. 413 414 For systems that have holes in their physical address space this 415 value also defines the minimal size of the hole that allows 416 freeing unused memory map. 417 418 This config option is actually maximum order plus one. For example, 419 a value of 11 means that the largest free memory block is 2^10 pages. 420 421config 060_WRITETHROUGH 422 bool "Use write-through caching for 68060 supervisor accesses" 423 depends on ADVANCED && M68060 424 help 425 The 68060 generally uses copyback caching of recently accessed data. 426 Copyback caching means that memory writes will be held in an on-chip 427 cache and only written back to memory some time later. Saying Y 428 here will force supervisor (kernel) accesses to use writethrough 429 caching. Writethrough caching means that data is written to memory 430 straight away, so that cache and memory data always agree. 431 Writethrough caching is less efficient, but is needed for some 432 drivers on 68060 based systems where the 68060 bus snooping signal 433 is hardwired on. The 53c710 SCSI driver is known to suffer from 434 this problem. 435 436config M68K_L2_CACHE 437 bool 438 depends on MAC 439 default y 440 441config CPU_HAS_NO_BITFIELDS 442 bool 443 444config CPU_HAS_NO_CAS 445 bool 446 447config CPU_HAS_NO_MULDIV64 448 bool 449 450config CPU_HAS_NO_UNALIGNED 451 bool 452 453config CPU_HAS_ADDRESS_SPACES 454 bool 455 select ALTERNATE_USER_ADDRESS_SPACE 456 457config FPU 458 bool 459 460config COLDFIRE_SW_A7 461 bool 462 463config HAVE_CACHE_SPLIT 464 bool 465 466config HAVE_CACHE_CB 467 bool 468 469config HAVE_MBAR 470 bool 471 472config HAVE_IPSBAR 473 bool 474 475config CLOCK_FREQ 476 int "Set the core clock frequency" 477 default "25000000" if M5206 478 default "54000000" if M5206e 479 default "166666666" if M520x 480 default "140000000" if M5249 481 default "150000000" if M527x || M523x 482 default "90000000" if M5307 483 default "50000000" if M5407 484 default "266000000" if M54xx 485 default "66666666" 486 depends on COLDFIRE 487 help 488 Define the CPU clock frequency in use. This is the core clock 489 frequency, it may or may not be the same as the external clock 490 crystal fitted to your board. Some processors have an internal 491 PLL and can have their frequency programmed at run time, others 492 use internal dividers. In general the kernel won't setup a PLL 493 if it is fitted (there are some exceptions). This value will be 494 specific to the exact CPU that you are using. 495 496config OLDMASK 497 bool "Old mask 5307 (1H55J) silicon" 498 depends on M5307 499 help 500 Build support for the older revision ColdFire 5307 silicon. 501 Specifically this is the 1H55J mask revision. 502 503if HAVE_CACHE_SPLIT 504choice 505 prompt "Split Cache Configuration" 506 default CACHE_I 507 508config CACHE_I 509 bool "Instruction" 510 help 511 Use all of the ColdFire CPU cache memory as an instruction cache. 512 513config CACHE_D 514 bool "Data" 515 help 516 Use all of the ColdFire CPU cache memory as a data cache. 517 518config CACHE_BOTH 519 bool "Both" 520 help 521 Split the ColdFire CPU cache, and use half as an instruction cache 522 and half as a data cache. 523endchoice 524endif # HAVE_CACHE_SPLIT 525 526if HAVE_CACHE_CB 527choice 528 prompt "Data cache mode" 529 default CACHE_WRITETHRU 530 531config CACHE_WRITETHRU 532 bool "Write-through" 533 help 534 The ColdFire CPU cache is set into Write-through mode. 535 536config CACHE_COPYBACK 537 bool "Copy-back" 538 help 539 The ColdFire CPU cache is set into Copy-back mode. 540endchoice 541endif # HAVE_CACHE_CB