Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2006, Intel Corporation.
4 *
5 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
6 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
7 */
8
9#ifndef __DMAR_H__
10#define __DMAR_H__
11
12#include <linux/acpi.h>
13#include <linux/types.h>
14#include <linux/msi.h>
15#include <linux/irqreturn.h>
16#include <linux/rwsem.h>
17#include <linux/rculist.h>
18
19struct acpi_dmar_header;
20
21#define DMAR_UNITS_SUPPORTED 1024
22
23/* DMAR Flags */
24#define DMAR_INTR_REMAP 0x1
25#define DMAR_X2APIC_OPT_OUT 0x2
26#define DMAR_PLATFORM_OPT_IN 0x4
27
28struct intel_iommu;
29
30struct dmar_dev_scope {
31 struct device __rcu *dev;
32 u8 bus;
33 u8 devfn;
34};
35
36#ifdef CONFIG_DMAR_TABLE
37extern struct acpi_table_header *dmar_tbl;
38struct dmar_drhd_unit {
39 struct list_head list; /* list of drhd units */
40 struct acpi_dmar_header *hdr; /* ACPI header */
41 u64 reg_base_addr; /* register base address*/
42 struct dmar_dev_scope *devices;/* target device array */
43 int devices_cnt; /* target device count */
44 u16 segment; /* PCI domain */
45 u8 ignored:1; /* ignore drhd */
46 u8 include_all:1;
47 u8 gfx_dedicated:1; /* graphic dedicated */
48 struct intel_iommu *iommu;
49};
50
51struct dmar_pci_path {
52 u8 bus;
53 u8 device;
54 u8 function;
55};
56
57struct dmar_pci_notify_info {
58 struct pci_dev *dev;
59 unsigned long event;
60 int bus;
61 u16 seg;
62 u16 level;
63 struct dmar_pci_path path[];
64} __attribute__((packed));
65
66extern struct rw_semaphore dmar_global_lock;
67extern struct list_head dmar_drhd_units;
68extern int intel_iommu_enabled;
69
70#define for_each_drhd_unit(drhd) \
71 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
72 dmar_rcu_check())
73
74#define for_each_active_drhd_unit(drhd) \
75 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
76 dmar_rcu_check()) \
77 if (drhd->ignored) {} else
78
79#define for_each_active_iommu(i, drhd) \
80 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
81 dmar_rcu_check()) \
82 if (i=drhd->iommu, drhd->ignored) {} else
83
84#define for_each_iommu(i, drhd) \
85 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
86 dmar_rcu_check()) \
87 if (i=drhd->iommu, 0) {} else
88
89static inline bool dmar_rcu_check(void)
90{
91 return rwsem_is_locked(&dmar_global_lock) ||
92 system_state == SYSTEM_BOOTING ||
93 (IS_ENABLED(CONFIG_INTEL_IOMMU) && !intel_iommu_enabled);
94}
95
96#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
97
98#define for_each_dev_scope(devs, cnt, i, tmp) \
99 for ((i) = 0; ((tmp) = (i) < (cnt) ? \
100 dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \
101 (i)++)
102
103#define for_each_active_dev_scope(devs, cnt, i, tmp) \
104 for_each_dev_scope((devs), (cnt), (i), (tmp)) \
105 if (!(tmp)) { continue; } else
106
107extern int dmar_table_init(void);
108extern int dmar_dev_scope_init(void);
109extern void dmar_register_bus_notifier(void);
110extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
111 struct dmar_dev_scope **devices, u16 segment);
112extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
113extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
114extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
115 void *start, void*end, u16 segment,
116 struct dmar_dev_scope *devices,
117 int devices_cnt);
118extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
119 u16 segment, struct dmar_dev_scope *devices,
120 int count);
121/* Intel IOMMU detection */
122void detect_intel_iommu(void);
123extern int enable_drhd_fault_handling(void);
124extern int dmar_device_add(acpi_handle handle);
125extern int dmar_device_remove(acpi_handle handle);
126
127static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
128{
129 return 0;
130}
131
132#ifdef CONFIG_DMAR_DEBUG
133void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id,
134 unsigned long long addr, u32 pasid);
135#else
136static inline void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id,
137 unsigned long long addr, u32 pasid) {}
138#endif
139
140#ifdef CONFIG_INTEL_IOMMU
141extern int iommu_detected, no_iommu;
142extern int intel_iommu_init(void);
143extern void intel_iommu_shutdown(void);
144extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
145extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
146extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
147extern int dmar_parse_one_satc(struct acpi_dmar_header *hdr, void *arg);
148extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
149extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
150extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
151#else /* !CONFIG_INTEL_IOMMU: */
152static inline int intel_iommu_init(void) { return -ENODEV; }
153static inline void intel_iommu_shutdown(void) { }
154
155#define dmar_parse_one_rmrr dmar_res_noop
156#define dmar_parse_one_atsr dmar_res_noop
157#define dmar_check_one_atsr dmar_res_noop
158#define dmar_release_one_atsr dmar_res_noop
159#define dmar_parse_one_satc dmar_res_noop
160
161static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
162{
163 return 0;
164}
165
166static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
167{
168 return 0;
169}
170#endif /* CONFIG_INTEL_IOMMU */
171
172#ifdef CONFIG_IRQ_REMAP
173extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
174#else /* CONFIG_IRQ_REMAP */
175static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
176{ return 0; }
177#endif /* CONFIG_IRQ_REMAP */
178
179extern bool dmar_platform_optin(void);
180
181#else /* CONFIG_DMAR_TABLE */
182
183static inline int dmar_device_add(void *handle)
184{
185 return 0;
186}
187
188static inline int dmar_device_remove(void *handle)
189{
190 return 0;
191}
192
193static inline bool dmar_platform_optin(void)
194{
195 return false;
196}
197
198static inline void detect_intel_iommu(void)
199{
200}
201
202#endif /* CONFIG_DMAR_TABLE */
203
204struct irte {
205 union {
206 /* Shared between remapped and posted mode*/
207 struct {
208 __u64 present : 1, /* 0 */
209 fpd : 1, /* 1 */
210 __res0 : 6, /* 2 - 6 */
211 avail : 4, /* 8 - 11 */
212 __res1 : 3, /* 12 - 14 */
213 pst : 1, /* 15 */
214 vector : 8, /* 16 - 23 */
215 __res2 : 40; /* 24 - 63 */
216 };
217
218 /* Remapped mode */
219 struct {
220 __u64 r_present : 1, /* 0 */
221 r_fpd : 1, /* 1 */
222 dst_mode : 1, /* 2 */
223 redir_hint : 1, /* 3 */
224 trigger_mode : 1, /* 4 */
225 dlvry_mode : 3, /* 5 - 7 */
226 r_avail : 4, /* 8 - 11 */
227 r_res0 : 4, /* 12 - 15 */
228 r_vector : 8, /* 16 - 23 */
229 r_res1 : 8, /* 24 - 31 */
230 dest_id : 32; /* 32 - 63 */
231 };
232
233 /* Posted mode */
234 struct {
235 __u64 p_present : 1, /* 0 */
236 p_fpd : 1, /* 1 */
237 p_res0 : 6, /* 2 - 7 */
238 p_avail : 4, /* 8 - 11 */
239 p_res1 : 2, /* 12 - 13 */
240 p_urgent : 1, /* 14 */
241 p_pst : 1, /* 15 */
242 p_vector : 8, /* 16 - 23 */
243 p_res2 : 14, /* 24 - 37 */
244 pda_l : 26; /* 38 - 63 */
245 };
246 __u64 low;
247 };
248
249 union {
250 /* Shared between remapped and posted mode*/
251 struct {
252 __u64 sid : 16, /* 64 - 79 */
253 sq : 2, /* 80 - 81 */
254 svt : 2, /* 82 - 83 */
255 __res3 : 44; /* 84 - 127 */
256 };
257
258 /* Posted mode*/
259 struct {
260 __u64 p_sid : 16, /* 64 - 79 */
261 p_sq : 2, /* 80 - 81 */
262 p_svt : 2, /* 82 - 83 */
263 p_res3 : 12, /* 84 - 95 */
264 pda_h : 32; /* 96 - 127 */
265 };
266 __u64 high;
267 };
268};
269
270static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
271{
272 dst->present = src->present;
273 dst->fpd = src->fpd;
274 dst->avail = src->avail;
275 dst->pst = src->pst;
276 dst->vector = src->vector;
277 dst->sid = src->sid;
278 dst->sq = src->sq;
279 dst->svt = src->svt;
280}
281
282#define PDA_LOW_BIT 26
283#define PDA_HIGH_BIT 32
284
285/* Can't use the common MSI interrupt functions
286 * since DMAR is not a pci device
287 */
288struct irq_data;
289extern void dmar_msi_unmask(struct irq_data *data);
290extern void dmar_msi_mask(struct irq_data *data);
291extern void dmar_msi_read(int irq, struct msi_msg *msg);
292extern void dmar_msi_write(int irq, struct msi_msg *msg);
293extern int dmar_set_interrupt(struct intel_iommu *iommu);
294extern irqreturn_t dmar_fault(int irq, void *dev_id);
295extern int dmar_alloc_hwirq(int id, int node, void *arg);
296extern void dmar_free_hwirq(int irq);
297
298#endif /* __DMAR_H__ */