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1/* SPDX-License-Identifier: GPL-2.0 */
2/**
3 * PCI Endpoint *Controller* (EPC) header file
4 *
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
7 */
8
9#ifndef __LINUX_PCI_EPC_H
10#define __LINUX_PCI_EPC_H
11
12#include <linux/pci-epf.h>
13
14struct pci_epc;
15
16enum pci_epc_irq_type {
17 PCI_EPC_IRQ_UNKNOWN,
18 PCI_EPC_IRQ_LEGACY,
19 PCI_EPC_IRQ_MSI,
20 PCI_EPC_IRQ_MSIX,
21};
22
23/**
24 * struct pci_epc_ops - set of function pointers for performing EPC operations
25 * @write_header: ops to populate configuration space header
26 * @set_bar: ops to configure the BAR
27 * @clear_bar: ops to reset the BAR
28 * @map_addr: ops to map CPU address to PCI address
29 * @unmap_addr: ops to unmap CPU address and PCI address
30 * @set_msi: ops to set the requested number of MSI interrupts in the MSI
31 * capability register
32 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
33 * the MSI capability register
34 * @set_msix: ops to set the requested number of MSI-X interrupts in the
35 * MSI-X capability register
36 * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
37 * from the MSI-X capability register
38 * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
39 * @start: ops to start the PCI link
40 * @stop: ops to stop the PCI link
41 * @owner: the module owner containing the ops
42 */
43struct pci_epc_ops {
44 int (*write_header)(struct pci_epc *epc, u8 func_no,
45 struct pci_epf_header *hdr);
46 int (*set_bar)(struct pci_epc *epc, u8 func_no,
47 struct pci_epf_bar *epf_bar);
48 void (*clear_bar)(struct pci_epc *epc, u8 func_no,
49 struct pci_epf_bar *epf_bar);
50 int (*map_addr)(struct pci_epc *epc, u8 func_no,
51 phys_addr_t addr, u64 pci_addr, size_t size);
52 void (*unmap_addr)(struct pci_epc *epc, u8 func_no,
53 phys_addr_t addr);
54 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
55 int (*get_msi)(struct pci_epc *epc, u8 func_no);
56 int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts,
57 enum pci_barno, u32 offset);
58 int (*get_msix)(struct pci_epc *epc, u8 func_no);
59 int (*raise_irq)(struct pci_epc *epc, u8 func_no,
60 enum pci_epc_irq_type type, u16 interrupt_num);
61 int (*start)(struct pci_epc *epc);
62 void (*stop)(struct pci_epc *epc);
63 const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
64 u8 func_no);
65 struct module *owner;
66};
67
68/**
69 * struct pci_epc_mem_window - address window of the endpoint controller
70 * @phys_base: physical base address of the PCI address window
71 * @size: the size of the PCI address window
72 * @page_size: size of each page
73 */
74struct pci_epc_mem_window {
75 phys_addr_t phys_base;
76 size_t size;
77 size_t page_size;
78};
79
80/**
81 * struct pci_epc_mem - address space of the endpoint controller
82 * @window: address window of the endpoint controller
83 * @bitmap: bitmap to manage the PCI address space
84 * @pages: number of bits representing the address region
85 * @lock: mutex to protect bitmap
86 */
87struct pci_epc_mem {
88 struct pci_epc_mem_window window;
89 unsigned long *bitmap;
90 int pages;
91 /* mutex to protect against concurrent access for memory allocation*/
92 struct mutex lock;
93};
94
95/**
96 * struct pci_epc - represents the PCI EPC device
97 * @dev: PCI EPC device
98 * @pci_epf: list of endpoint functions present in this EPC device
99 * @ops: function pointers for performing endpoint operations
100 * @windows: array of address space of the endpoint controller
101 * @mem: first window of the endpoint controller, which corresponds to
102 * default address space of the endpoint controller supporting
103 * single window.
104 * @num_windows: number of windows supported by device
105 * @max_functions: max number of functions that can be configured in this EPC
106 * @group: configfs group representing the PCI EPC device
107 * @lock: mutex to protect pci_epc ops
108 * @function_num_map: bitmap to manage physical function number
109 * @notifier: used to notify EPF of any EPC events (like linkup)
110 */
111struct pci_epc {
112 struct device dev;
113 struct list_head pci_epf;
114 const struct pci_epc_ops *ops;
115 struct pci_epc_mem **windows;
116 struct pci_epc_mem *mem;
117 unsigned int num_windows;
118 u8 max_functions;
119 struct config_group *group;
120 /* mutex to protect against concurrent access of EP controller */
121 struct mutex lock;
122 unsigned long function_num_map;
123 struct atomic_notifier_head notifier;
124};
125
126/**
127 * struct pci_epc_features - features supported by a EPC device per function
128 * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
129 * @msi_capable: indicate if the endpoint function has MSI capability
130 * @msix_capable: indicate if the endpoint function has MSI-X capability
131 * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
132 * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
133 * @bar_fixed_size: Array specifying the size supported by each BAR
134 * @align: alignment size required for BAR buffer allocation
135 */
136struct pci_epc_features {
137 unsigned int linkup_notifier : 1;
138 unsigned int core_init_notifier : 1;
139 unsigned int msi_capable : 1;
140 unsigned int msix_capable : 1;
141 u8 reserved_bar;
142 u8 bar_fixed_64bit;
143 u64 bar_fixed_size[PCI_STD_NUM_BARS];
144 size_t align;
145};
146
147#define to_pci_epc(device) container_of((device), struct pci_epc, dev)
148
149#define pci_epc_create(dev, ops) \
150 __pci_epc_create((dev), (ops), THIS_MODULE)
151#define devm_pci_epc_create(dev, ops) \
152 __devm_pci_epc_create((dev), (ops), THIS_MODULE)
153
154static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
155{
156 dev_set_drvdata(&epc->dev, data);
157}
158
159static inline void *epc_get_drvdata(struct pci_epc *epc)
160{
161 return dev_get_drvdata(&epc->dev);
162}
163
164static inline int
165pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb)
166{
167 return atomic_notifier_chain_register(&epc->notifier, nb);
168}
169
170struct pci_epc *
171__devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
172 struct module *owner);
173struct pci_epc *
174__pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
175 struct module *owner);
176void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
177void pci_epc_destroy(struct pci_epc *epc);
178int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf);
179void pci_epc_linkup(struct pci_epc *epc);
180void pci_epc_init_notify(struct pci_epc *epc);
181void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf);
182int pci_epc_write_header(struct pci_epc *epc, u8 func_no,
183 struct pci_epf_header *hdr);
184int pci_epc_set_bar(struct pci_epc *epc, u8 func_no,
185 struct pci_epf_bar *epf_bar);
186void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no,
187 struct pci_epf_bar *epf_bar);
188int pci_epc_map_addr(struct pci_epc *epc, u8 func_no,
189 phys_addr_t phys_addr,
190 u64 pci_addr, size_t size);
191void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
192 phys_addr_t phys_addr);
193int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
194int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
195int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts,
196 enum pci_barno, u32 offset);
197int pci_epc_get_msix(struct pci_epc *epc, u8 func_no);
198int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
199 enum pci_epc_irq_type type, u16 interrupt_num);
200int pci_epc_start(struct pci_epc *epc);
201void pci_epc_stop(struct pci_epc *epc);
202const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
203 u8 func_no);
204unsigned int pci_epc_get_first_free_bar(const struct pci_epc_features
205 *epc_features);
206struct pci_epc *pci_epc_get(const char *epc_name);
207void pci_epc_put(struct pci_epc *epc);
208
209int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base,
210 size_t size, size_t page_size);
211int pci_epc_multi_mem_init(struct pci_epc *epc,
212 struct pci_epc_mem_window *window,
213 unsigned int num_windows);
214void pci_epc_mem_exit(struct pci_epc *epc);
215void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
216 phys_addr_t *phys_addr, size_t size);
217void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
218 void __iomem *virt_addr, size_t size);
219#endif /* __LINUX_PCI_EPC_H */