at v5.9 21 kB view raw
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * linux/include/linux/mmc/host.h 4 * 5 * Host driver specific definitions. 6 */ 7#ifndef LINUX_MMC_HOST_H 8#define LINUX_MMC_HOST_H 9 10#include <linux/sched.h> 11#include <linux/device.h> 12#include <linux/fault-inject.h> 13 14#include <linux/mmc/core.h> 15#include <linux/mmc/card.h> 16#include <linux/mmc/pm.h> 17#include <linux/dma-direction.h> 18 19struct mmc_ios { 20 unsigned int clock; /* clock rate */ 21 unsigned short vdd; 22 unsigned int power_delay_ms; /* waiting for stable power */ 23 24/* vdd stores the bit number of the selected voltage range from below. */ 25 26 unsigned char bus_mode; /* command output mode */ 27 28#define MMC_BUSMODE_OPENDRAIN 1 29#define MMC_BUSMODE_PUSHPULL 2 30 31 unsigned char chip_select; /* SPI chip select */ 32 33#define MMC_CS_DONTCARE 0 34#define MMC_CS_HIGH 1 35#define MMC_CS_LOW 2 36 37 unsigned char power_mode; /* power supply mode */ 38 39#define MMC_POWER_OFF 0 40#define MMC_POWER_UP 1 41#define MMC_POWER_ON 2 42#define MMC_POWER_UNDEFINED 3 43 44 unsigned char bus_width; /* data bus width */ 45 46#define MMC_BUS_WIDTH_1 0 47#define MMC_BUS_WIDTH_4 2 48#define MMC_BUS_WIDTH_8 3 49 50 unsigned char timing; /* timing specification used */ 51 52#define MMC_TIMING_LEGACY 0 53#define MMC_TIMING_MMC_HS 1 54#define MMC_TIMING_SD_HS 2 55#define MMC_TIMING_UHS_SDR12 3 56#define MMC_TIMING_UHS_SDR25 4 57#define MMC_TIMING_UHS_SDR50 5 58#define MMC_TIMING_UHS_SDR104 6 59#define MMC_TIMING_UHS_DDR50 7 60#define MMC_TIMING_MMC_DDR52 8 61#define MMC_TIMING_MMC_HS200 9 62#define MMC_TIMING_MMC_HS400 10 63 64 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 65 66#define MMC_SIGNAL_VOLTAGE_330 0 67#define MMC_SIGNAL_VOLTAGE_180 1 68#define MMC_SIGNAL_VOLTAGE_120 2 69 70 unsigned char drv_type; /* driver type (A, B, C, D) */ 71 72#define MMC_SET_DRIVER_TYPE_B 0 73#define MMC_SET_DRIVER_TYPE_A 1 74#define MMC_SET_DRIVER_TYPE_C 2 75#define MMC_SET_DRIVER_TYPE_D 3 76 77 bool enhanced_strobe; /* hs400es selection */ 78}; 79 80struct mmc_host; 81 82struct mmc_host_ops { 83 /* 84 * It is optional for the host to implement pre_req and post_req in 85 * order to support double buffering of requests (prepare one 86 * request while another request is active). 87 * pre_req() must always be followed by a post_req(). 88 * To undo a call made to pre_req(), call post_req() with 89 * a nonzero err condition. 90 */ 91 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 92 int err); 93 void (*pre_req)(struct mmc_host *host, struct mmc_request *req); 94 void (*request)(struct mmc_host *host, struct mmc_request *req); 95 /* Submit one request to host in atomic context. */ 96 int (*request_atomic)(struct mmc_host *host, 97 struct mmc_request *req); 98 99 /* 100 * Avoid calling the next three functions too often or in a "fast 101 * path", since underlaying controller might implement them in an 102 * expensive and/or slow way. Also note that these functions might 103 * sleep, so don't call them in the atomic contexts! 104 */ 105 106 /* 107 * Notes to the set_ios callback: 108 * ios->clock might be 0. For some controllers, setting 0Hz 109 * as any other frequency works. However, some controllers 110 * explicitly need to disable the clock. Otherwise e.g. voltage 111 * switching might fail because the SDCLK is not really quiet. 112 */ 113 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 114 115 /* 116 * Return values for the get_ro callback should be: 117 * 0 for a read/write card 118 * 1 for a read-only card 119 * -ENOSYS when not supported (equal to NULL callback) 120 * or a negative errno value when something bad happened 121 */ 122 int (*get_ro)(struct mmc_host *host); 123 124 /* 125 * Return values for the get_cd callback should be: 126 * 0 for a absent card 127 * 1 for a present card 128 * -ENOSYS when not supported (equal to NULL callback) 129 * or a negative errno value when something bad happened 130 */ 131 int (*get_cd)(struct mmc_host *host); 132 133 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 134 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ 135 void (*ack_sdio_irq)(struct mmc_host *host); 136 137 /* optional callback for HC quirks */ 138 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 139 140 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 141 142 /* Check if the card is pulling dat[0:3] low */ 143 int (*card_busy)(struct mmc_host *host); 144 145 /* The tuning command opcode value is different for SD and eMMC cards */ 146 int (*execute_tuning)(struct mmc_host *host, u32 opcode); 147 148 /* Prepare HS400 target operating frequency depending host driver */ 149 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); 150 151 /* Prepare switch to DDR during the HS400 init sequence */ 152 int (*hs400_prepare_ddr)(struct mmc_host *host); 153 154 /* Prepare for switching from HS400 to HS200 */ 155 void (*hs400_downgrade)(struct mmc_host *host); 156 157 /* Complete selection of HS400 */ 158 void (*hs400_complete)(struct mmc_host *host); 159 160 /* Prepare enhanced strobe depending host driver */ 161 void (*hs400_enhanced_strobe)(struct mmc_host *host, 162 struct mmc_ios *ios); 163 int (*select_drive_strength)(struct mmc_card *card, 164 unsigned int max_dtr, int host_drv, 165 int card_drv, int *drv_type); 166 void (*hw_reset)(struct mmc_host *host); 167 void (*card_event)(struct mmc_host *host); 168 169 /* 170 * Optional callback to support controllers with HW issues for multiple 171 * I/O. Returns the number of supported blocks for the request. 172 */ 173 int (*multi_io_quirk)(struct mmc_card *card, 174 unsigned int direction, int blk_size); 175}; 176 177struct mmc_cqe_ops { 178 /* Allocate resources, and make the CQE operational */ 179 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card); 180 /* Free resources, and make the CQE non-operational */ 181 void (*cqe_disable)(struct mmc_host *host); 182 /* 183 * Issue a read, write or DCMD request to the CQE. Also deal with the 184 * effect of ->cqe_off(). 185 */ 186 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq); 187 /* Free resources (e.g. DMA mapping) associated with the request */ 188 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq); 189 /* 190 * Prepare the CQE and host controller to accept non-CQ commands. There 191 * is no corresponding ->cqe_on(), instead ->cqe_request() is required 192 * to deal with that. 193 */ 194 void (*cqe_off)(struct mmc_host *host); 195 /* 196 * Wait for all CQE tasks to complete. Return an error if recovery 197 * becomes necessary. 198 */ 199 int (*cqe_wait_for_idle)(struct mmc_host *host); 200 /* 201 * Notify CQE that a request has timed out. Return false if the request 202 * completed or true if a timeout happened in which case indicate if 203 * recovery is needed. 204 */ 205 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, 206 bool *recovery_needed); 207 /* 208 * Stop all CQE activity and prepare the CQE and host controller to 209 * accept recovery commands. 210 */ 211 void (*cqe_recovery_start)(struct mmc_host *host); 212 /* 213 * Clear the queue and call mmc_cqe_request_done() on all requests. 214 * Requests that errored will have the error set on the mmc_request 215 * (data->error or cmd->error for DCMD). Requests that did not error 216 * will have zero data bytes transferred. 217 */ 218 void (*cqe_recovery_finish)(struct mmc_host *host); 219}; 220 221struct mmc_async_req { 222 /* active mmc request */ 223 struct mmc_request *mrq; 224 /* 225 * Check error status of completed mmc request. 226 * Returns 0 if success otherwise non zero. 227 */ 228 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *); 229}; 230 231/** 232 * struct mmc_slot - MMC slot functions 233 * 234 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 235 * @handler_priv: MMC/SD-card slot context 236 * 237 * Some MMC/SD host controllers implement slot-functions like card and 238 * write-protect detection natively. However, a large number of controllers 239 * leave these functions to the CPU. This struct provides a hook to attach 240 * such slot-function drivers. 241 */ 242struct mmc_slot { 243 int cd_irq; 244 bool cd_wake_enabled; 245 void *handler_priv; 246}; 247 248/** 249 * mmc_context_info - synchronization details for mmc context 250 * @is_done_rcv wake up reason was done request 251 * @is_new_req wake up reason was new request 252 * @is_waiting_last_req mmc context waiting for single running request 253 * @wait wait queue 254 */ 255struct mmc_context_info { 256 bool is_done_rcv; 257 bool is_new_req; 258 bool is_waiting_last_req; 259 wait_queue_head_t wait; 260}; 261 262struct regulator; 263struct mmc_pwrseq; 264 265struct mmc_supply { 266 struct regulator *vmmc; /* Card power supply */ 267 struct regulator *vqmmc; /* Optional Vccq supply */ 268}; 269 270struct mmc_ctx { 271 struct task_struct *task; 272}; 273 274struct mmc_host { 275 struct device *parent; 276 struct device class_dev; 277 int index; 278 const struct mmc_host_ops *ops; 279 struct mmc_pwrseq *pwrseq; 280 unsigned int f_min; 281 unsigned int f_max; 282 unsigned int f_init; 283 u32 ocr_avail; 284 u32 ocr_avail_sdio; /* SDIO-specific OCR */ 285 u32 ocr_avail_sd; /* SD-specific OCR */ 286 u32 ocr_avail_mmc; /* MMC-specific OCR */ 287#ifdef CONFIG_PM_SLEEP 288 struct notifier_block pm_notify; 289#endif 290 struct wakeup_source *ws; /* Enable consume of uevents */ 291 u32 max_current_330; 292 u32 max_current_300; 293 u32 max_current_180; 294 295#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 296#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 297#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 298#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 299#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 300#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 301#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 302#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 303#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 304#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 305#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 306#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 307#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 308#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 309#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 310#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 311#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 312 313 u32 caps; /* Host capabilities */ 314 315#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 316#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 317#define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ 318#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ 319#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 320#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 321#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 322#define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ 323#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 324#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 325#define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */ 326#define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */ 327#define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */ 328#define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \ 329 MMC_CAP_1_2V_DDR) 330#define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */ 331#define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */ 332#define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */ 333#define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */ 334#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 335#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 336#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 337#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ 338 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ 339 MMC_CAP_UHS_DDR50) 340#define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */ 341#define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */ 342#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 343#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 344#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 345#define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */ 346#define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */ 347#define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ 348#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 349#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */ 350 351 u32 caps2; /* More host capabilities */ 352 353#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ 354#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ 355#define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */ 356#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ 357#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 358#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 359 MMC_CAP2_HS200_1_2V_SDR) 360#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 361#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 362#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ 363#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ 364#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 365#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 366 MMC_CAP2_HS400_1_2V) 367#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) 368#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) 369#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 370#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ 371#define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */ 372#define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */ 373#define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */ 374#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ 375#define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ 376#define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ 377#define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ 378#define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */ 379 380 int fixed_drv_type; /* fixed driver type for non-removable media */ 381 382 mmc_pm_flag_t pm_caps; /* supported pm features */ 383 384 /* host specific block data */ 385 unsigned int max_seg_size; /* see blk_queue_max_segment_size */ 386 unsigned short max_segs; /* see blk_queue_max_segments */ 387 unsigned short unused; 388 unsigned int max_req_size; /* maximum number of bytes in one req */ 389 unsigned int max_blk_size; /* maximum size of one mmc block */ 390 unsigned int max_blk_count; /* maximum number of blocks in one req */ 391 unsigned int max_busy_timeout; /* max busy timeout in ms */ 392 393 /* private data */ 394 spinlock_t lock; /* lock for claim and bus ops */ 395 396 struct mmc_ios ios; /* current io bus settings */ 397 398 /* group bitfields together to minimize padding */ 399 unsigned int use_spi_crc:1; 400 unsigned int claimed:1; /* host exclusively claimed */ 401 unsigned int bus_dead:1; /* bus has been released */ 402 unsigned int can_retune:1; /* re-tuning can be used */ 403 unsigned int doing_retune:1; /* re-tuning in progress */ 404 unsigned int retune_now:1; /* do re-tuning at next req */ 405 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ 406 unsigned int use_blk_mq:1; /* use blk-mq */ 407 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */ 408 unsigned int can_dma_map_merge:1; /* merging can be used */ 409 410 int rescan_disable; /* disable card detection */ 411 int rescan_entered; /* used with nonremovable devices */ 412 413 int need_retune; /* re-tuning is needed */ 414 int hold_retune; /* hold off re-tuning */ 415 unsigned int retune_period; /* re-tuning period in secs */ 416 struct timer_list retune_timer; /* for periodic re-tuning */ 417 418 bool trigger_card_event; /* card_event necessary */ 419 420 struct mmc_card *card; /* device attached to this host */ 421 422 wait_queue_head_t wq; 423 struct mmc_ctx *claimer; /* context that has host claimed */ 424 int claim_cnt; /* "claim" nesting count */ 425 struct mmc_ctx default_ctx; /* default context */ 426 427 struct delayed_work detect; 428 int detect_change; /* card detect flag */ 429 struct mmc_slot slot; 430 431 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 432 unsigned int bus_refs; /* reference counter */ 433 434 unsigned int sdio_irqs; 435 struct task_struct *sdio_irq_thread; 436 struct delayed_work sdio_irq_work; 437 bool sdio_irq_pending; 438 atomic_t sdio_irq_thread_abort; 439 440 mmc_pm_flag_t pm_flags; /* requested pm features */ 441 442 struct led_trigger *led; /* activity led */ 443 444#ifdef CONFIG_REGULATOR 445 bool regulator_enabled; /* regulator state */ 446#endif 447 struct mmc_supply supply; 448 449 struct dentry *debugfs_root; 450 451 /* Ongoing data transfer that allows commands during transfer */ 452 struct mmc_request *ongoing_mrq; 453 454#ifdef CONFIG_FAIL_MMC_REQUEST 455 struct fault_attr fail_mmc_request; 456#endif 457 458 unsigned int actual_clock; /* Actual HC clock rate */ 459 460 unsigned int slotno; /* used for sdio acpi binding */ 461 462 int dsr_req; /* DSR value is valid */ 463 u32 dsr; /* optional driver stage (DSR) value */ 464 465 /* Command Queue Engine (CQE) support */ 466 const struct mmc_cqe_ops *cqe_ops; 467 void *cqe_private; 468 int cqe_qdepth; 469 bool cqe_enabled; 470 bool cqe_on; 471 472 /* Host Software Queue support */ 473 bool hsq_enabled; 474 475 unsigned long private[] ____cacheline_aligned; 476}; 477 478struct device_node; 479 480struct mmc_host *mmc_alloc_host(int extra, struct device *); 481int mmc_add_host(struct mmc_host *); 482void mmc_remove_host(struct mmc_host *); 483void mmc_free_host(struct mmc_host *); 484int mmc_of_parse(struct mmc_host *host); 485int mmc_of_parse_voltage(struct device_node *np, u32 *mask); 486 487static inline void *mmc_priv(struct mmc_host *host) 488{ 489 return (void *)host->private; 490} 491 492static inline struct mmc_host *mmc_from_priv(void *priv) 493{ 494 return container_of(priv, struct mmc_host, private); 495} 496 497#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) 498 499#define mmc_dev(x) ((x)->parent) 500#define mmc_classdev(x) (&(x)->class_dev) 501#define mmc_hostname(x) (dev_name(&(x)->class_dev)) 502 503void mmc_detect_change(struct mmc_host *, unsigned long delay); 504void mmc_request_done(struct mmc_host *, struct mmc_request *); 505void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); 506 507void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); 508 509/* 510 * May be called from host driver's system/runtime suspend/resume callbacks, 511 * to know if SDIO IRQs has been claimed. 512 */ 513static inline bool sdio_irq_claimed(struct mmc_host *host) 514{ 515 return host->sdio_irqs > 0; 516} 517 518static inline void mmc_signal_sdio_irq(struct mmc_host *host) 519{ 520 host->ops->enable_sdio_irq(host, 0); 521 host->sdio_irq_pending = true; 522 if (host->sdio_irq_thread) 523 wake_up_process(host->sdio_irq_thread); 524} 525 526void sdio_signal_irq(struct mmc_host *host); 527 528#ifdef CONFIG_REGULATOR 529int mmc_regulator_set_ocr(struct mmc_host *mmc, 530 struct regulator *supply, 531 unsigned short vdd_bit); 532int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios); 533#else 534static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 535 struct regulator *supply, 536 unsigned short vdd_bit) 537{ 538 return 0; 539} 540 541static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, 542 struct mmc_ios *ios) 543{ 544 return -EINVAL; 545} 546#endif 547 548int mmc_regulator_get_supply(struct mmc_host *mmc); 549 550static inline int mmc_card_is_removable(struct mmc_host *host) 551{ 552 return !(host->caps & MMC_CAP_NONREMOVABLE); 553} 554 555static inline int mmc_card_keep_power(struct mmc_host *host) 556{ 557 return host->pm_flags & MMC_PM_KEEP_POWER; 558} 559 560static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) 561{ 562 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; 563} 564 565/* TODO: Move to private header */ 566static inline int mmc_card_hs(struct mmc_card *card) 567{ 568 return card->host->ios.timing == MMC_TIMING_SD_HS || 569 card->host->ios.timing == MMC_TIMING_MMC_HS; 570} 571 572/* TODO: Move to private header */ 573static inline int mmc_card_uhs(struct mmc_card *card) 574{ 575 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && 576 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; 577} 578 579void mmc_retune_timer_stop(struct mmc_host *host); 580 581static inline void mmc_retune_needed(struct mmc_host *host) 582{ 583 if (host->can_retune) 584 host->need_retune = 1; 585} 586 587static inline bool mmc_can_retune(struct mmc_host *host) 588{ 589 return host->can_retune == 1; 590} 591 592static inline bool mmc_doing_retune(struct mmc_host *host) 593{ 594 return host->doing_retune == 1; 595} 596 597static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) 598{ 599 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 600} 601 602int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); 603int mmc_abort_tuning(struct mmc_host *host, u32 opcode); 604 605#endif /* LINUX_MMC_HOST_H */