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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * libnvdimm - Non-volatile-memory Devices Subsystem 4 * 5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. 6 */ 7#ifndef __LIBNVDIMM_H__ 8#define __LIBNVDIMM_H__ 9#include <linux/kernel.h> 10#include <linux/sizes.h> 11#include <linux/types.h> 12#include <linux/uuid.h> 13#include <linux/spinlock.h> 14#include <linux/bio.h> 15 16struct badrange_entry { 17 u64 start; 18 u64 length; 19 struct list_head list; 20}; 21 22struct badrange { 23 struct list_head list; 24 spinlock_t lock; 25}; 26 27enum { 28 /* when a dimm supports both PMEM and BLK access a label is required */ 29 NDD_ALIASING = 0, 30 /* unarmed memory devices may not persist writes */ 31 NDD_UNARMED = 1, 32 /* locked memory devices should not be accessed */ 33 NDD_LOCKED = 2, 34 /* memory under security wipes should not be accessed */ 35 NDD_SECURITY_OVERWRITE = 3, 36 /* tracking whether or not there is a pending device reference */ 37 NDD_WORK_PENDING = 4, 38 /* ignore / filter NSLABEL_FLAG_LOCAL for this DIMM, i.e. no aliasing */ 39 NDD_NOBLK = 5, 40 /* dimm supports namespace labels */ 41 NDD_LABELING = 6, 42 43 /* need to set a limit somewhere, but yes, this is likely overkill */ 44 ND_IOCTL_MAX_BUFLEN = SZ_4M, 45 ND_CMD_MAX_ELEM = 5, 46 ND_CMD_MAX_ENVELOPE = 256, 47 ND_MAX_MAPPINGS = 32, 48 49 /* region flag indicating to direct-map persistent memory by default */ 50 ND_REGION_PAGEMAP = 0, 51 /* 52 * Platform ensures entire CPU store data path is flushed to pmem on 53 * system power loss. 54 */ 55 ND_REGION_PERSIST_CACHE = 1, 56 /* 57 * Platform provides mechanisms to automatically flush outstanding 58 * write data from memory controler to pmem on system power loss. 59 * (ADR) 60 */ 61 ND_REGION_PERSIST_MEMCTRL = 2, 62 63 /* Platform provides asynchronous flush mechanism */ 64 ND_REGION_ASYNC = 3, 65 66 /* mark newly adjusted resources as requiring a label update */ 67 DPA_RESOURCE_ADJUSTED = 1 << 0, 68}; 69 70struct nvdimm; 71struct nvdimm_bus_descriptor; 72typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, 73 struct nvdimm *nvdimm, unsigned int cmd, void *buf, 74 unsigned int buf_len, int *cmd_rc); 75 76struct device_node; 77struct nvdimm_bus_descriptor { 78 const struct attribute_group **attr_groups; 79 unsigned long cmd_mask; 80 unsigned long dimm_family_mask; 81 unsigned long bus_family_mask; 82 struct module *module; 83 char *provider_name; 84 struct device_node *of_node; 85 ndctl_fn ndctl; 86 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc); 87 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc, 88 struct nvdimm *nvdimm, unsigned int cmd, void *data); 89 const struct nvdimm_bus_fw_ops *fw_ops; 90}; 91 92struct nd_cmd_desc { 93 int in_num; 94 int out_num; 95 u32 in_sizes[ND_CMD_MAX_ELEM]; 96 int out_sizes[ND_CMD_MAX_ELEM]; 97}; 98 99struct nd_interleave_set { 100 /* v1.1 definition of the interleave-set-cookie algorithm */ 101 u64 cookie1; 102 /* v1.2 definition of the interleave-set-cookie algorithm */ 103 u64 cookie2; 104 /* compatibility with initial buggy Linux implementation */ 105 u64 altcookie; 106 107 guid_t type_guid; 108}; 109 110struct nd_mapping_desc { 111 struct nvdimm *nvdimm; 112 u64 start; 113 u64 size; 114 int position; 115}; 116 117struct nd_region; 118struct nd_region_desc { 119 struct resource *res; 120 struct nd_mapping_desc *mapping; 121 u16 num_mappings; 122 const struct attribute_group **attr_groups; 123 struct nd_interleave_set *nd_set; 124 void *provider_data; 125 int num_lanes; 126 int numa_node; 127 int target_node; 128 unsigned long flags; 129 struct device_node *of_node; 130 int (*flush)(struct nd_region *nd_region, struct bio *bio); 131}; 132 133struct device; 134void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset, 135 size_t size, unsigned long flags); 136static inline void __iomem *devm_nvdimm_ioremap(struct device *dev, 137 resource_size_t offset, size_t size) 138{ 139 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0); 140} 141 142struct nvdimm_bus; 143struct module; 144struct device; 145struct nd_blk_region; 146struct nd_blk_region_desc { 147 int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); 148 int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, 149 void *iobuf, u64 len, int rw); 150 struct nd_region_desc ndr_desc; 151}; 152 153static inline struct nd_blk_region_desc *to_blk_region_desc( 154 struct nd_region_desc *ndr_desc) 155{ 156 return container_of(ndr_desc, struct nd_blk_region_desc, ndr_desc); 157 158} 159 160/* 161 * Note that separate bits for locked + unlocked are defined so that 162 * 'flags == 0' corresponds to an error / not-supported state. 163 */ 164enum nvdimm_security_bits { 165 NVDIMM_SECURITY_DISABLED, 166 NVDIMM_SECURITY_UNLOCKED, 167 NVDIMM_SECURITY_LOCKED, 168 NVDIMM_SECURITY_FROZEN, 169 NVDIMM_SECURITY_OVERWRITE, 170}; 171 172#define NVDIMM_PASSPHRASE_LEN 32 173#define NVDIMM_KEY_DESC_LEN 22 174 175struct nvdimm_key_data { 176 u8 data[NVDIMM_PASSPHRASE_LEN]; 177}; 178 179enum nvdimm_passphrase_type { 180 NVDIMM_USER, 181 NVDIMM_MASTER, 182}; 183 184struct nvdimm_security_ops { 185 unsigned long (*get_flags)(struct nvdimm *nvdimm, 186 enum nvdimm_passphrase_type pass_type); 187 int (*freeze)(struct nvdimm *nvdimm); 188 int (*change_key)(struct nvdimm *nvdimm, 189 const struct nvdimm_key_data *old_data, 190 const struct nvdimm_key_data *new_data, 191 enum nvdimm_passphrase_type pass_type); 192 int (*unlock)(struct nvdimm *nvdimm, 193 const struct nvdimm_key_data *key_data); 194 int (*disable)(struct nvdimm *nvdimm, 195 const struct nvdimm_key_data *key_data); 196 int (*erase)(struct nvdimm *nvdimm, 197 const struct nvdimm_key_data *key_data, 198 enum nvdimm_passphrase_type pass_type); 199 int (*overwrite)(struct nvdimm *nvdimm, 200 const struct nvdimm_key_data *key_data); 201 int (*query_overwrite)(struct nvdimm *nvdimm); 202}; 203 204enum nvdimm_fwa_state { 205 NVDIMM_FWA_INVALID, 206 NVDIMM_FWA_IDLE, 207 NVDIMM_FWA_ARMED, 208 NVDIMM_FWA_BUSY, 209 NVDIMM_FWA_ARM_OVERFLOW, 210}; 211 212enum nvdimm_fwa_trigger { 213 NVDIMM_FWA_ARM, 214 NVDIMM_FWA_DISARM, 215}; 216 217enum nvdimm_fwa_capability { 218 NVDIMM_FWA_CAP_INVALID, 219 NVDIMM_FWA_CAP_NONE, 220 NVDIMM_FWA_CAP_QUIESCE, 221 NVDIMM_FWA_CAP_LIVE, 222}; 223 224enum nvdimm_fwa_result { 225 NVDIMM_FWA_RESULT_INVALID, 226 NVDIMM_FWA_RESULT_NONE, 227 NVDIMM_FWA_RESULT_SUCCESS, 228 NVDIMM_FWA_RESULT_NOTSTAGED, 229 NVDIMM_FWA_RESULT_NEEDRESET, 230 NVDIMM_FWA_RESULT_FAIL, 231}; 232 233struct nvdimm_bus_fw_ops { 234 enum nvdimm_fwa_state (*activate_state) 235 (struct nvdimm_bus_descriptor *nd_desc); 236 enum nvdimm_fwa_capability (*capability) 237 (struct nvdimm_bus_descriptor *nd_desc); 238 int (*activate)(struct nvdimm_bus_descriptor *nd_desc); 239}; 240 241struct nvdimm_fw_ops { 242 enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm); 243 enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm); 244 int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg); 245}; 246 247void badrange_init(struct badrange *badrange); 248int badrange_add(struct badrange *badrange, u64 addr, u64 length); 249void badrange_forget(struct badrange *badrange, phys_addr_t start, 250 unsigned int len); 251int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr, 252 u64 length); 253struct nvdimm_bus *nvdimm_bus_register(struct device *parent, 254 struct nvdimm_bus_descriptor *nfit_desc); 255void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); 256struct nvdimm_bus *to_nvdimm_bus(struct device *dev); 257struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm); 258struct nvdimm *to_nvdimm(struct device *dev); 259struct nd_region *to_nd_region(struct device *dev); 260struct device *nd_region_dev(struct nd_region *nd_region); 261struct nd_blk_region *to_nd_blk_region(struct device *dev); 262struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); 263struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus); 264const char *nvdimm_name(struct nvdimm *nvdimm); 265struct kobject *nvdimm_kobj(struct nvdimm *nvdimm); 266unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm); 267void *nvdimm_provider_data(struct nvdimm *nvdimm); 268struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, 269 void *provider_data, const struct attribute_group **groups, 270 unsigned long flags, unsigned long cmd_mask, int num_flush, 271 struct resource *flush_wpq, const char *dimm_id, 272 const struct nvdimm_security_ops *sec_ops, 273 const struct nvdimm_fw_ops *fw_ops); 274static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, 275 void *provider_data, const struct attribute_group **groups, 276 unsigned long flags, unsigned long cmd_mask, int num_flush, 277 struct resource *flush_wpq) 278{ 279 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags, 280 cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL); 281} 282 283const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); 284const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); 285u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, 286 const struct nd_cmd_desc *desc, int idx, void *buf); 287u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, 288 const struct nd_cmd_desc *desc, int idx, const u32 *in_field, 289 const u32 *out_field, unsigned long remainder); 290int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); 291struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, 292 struct nd_region_desc *ndr_desc); 293struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, 294 struct nd_region_desc *ndr_desc); 295struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, 296 struct nd_region_desc *ndr_desc); 297void *nd_region_provider_data(struct nd_region *nd_region); 298void *nd_blk_region_provider_data(struct nd_blk_region *ndbr); 299void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data); 300struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr); 301unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr); 302unsigned int nd_region_acquire_lane(struct nd_region *nd_region); 303void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); 304u64 nd_fletcher64(void *addr, size_t len, bool le); 305int nvdimm_flush(struct nd_region *nd_region, struct bio *bio); 306int generic_nvdimm_flush(struct nd_region *nd_region); 307int nvdimm_has_flush(struct nd_region *nd_region); 308int nvdimm_has_cache(struct nd_region *nd_region); 309int nvdimm_in_overwrite(struct nvdimm *nvdimm); 310bool is_nvdimm_sync(struct nd_region *nd_region); 311 312static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf, 313 unsigned int buf_len, int *cmd_rc) 314{ 315 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm); 316 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); 317 318 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc); 319} 320 321#ifdef CONFIG_ARCH_HAS_PMEM_API 322#define ARCH_MEMREMAP_PMEM MEMREMAP_WB 323void arch_wb_cache_pmem(void *addr, size_t size); 324void arch_invalidate_pmem(void *addr, size_t size); 325#else 326#define ARCH_MEMREMAP_PMEM MEMREMAP_WT 327static inline void arch_wb_cache_pmem(void *addr, size_t size) 328{ 329} 330static inline void arch_invalidate_pmem(void *addr, size_t size) 331{ 332} 333#endif 334 335#endif /* __LIBNVDIMM_H__ */