tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Loongson PCH MSI Controller
8
9maintainers:
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
11
12description:
13 This interrupt controller is found in the Loongson LS7A family of PCH for
14 transforming interrupts from PCIe MSI into HyperTransport vectorized
15 interrupts.
16
17properties:
18 compatible:
19 const: loongson,pch-msi-1.0
20
21 reg:
22 maxItems: 1
23
24 loongson,msi-base-vec:
25 description:
26 u32 value of the base of parent HyperTransport vector allocated
27 to PCH MSI.
28 $ref: "/schemas/types.yaml#/definitions/uint32"
29 minimum: 0
30 maximum: 255
31
32 loongson,msi-num-vecs:
33 description:
34 u32 value of the number of parent HyperTransport vectors allocated
35 to PCH MSI.
36 $ref: "/schemas/types.yaml#/definitions/uint32"
37 minimum: 1
38 maximum: 256
39
40 msi-controller: true
41
42required:
43 - compatible
44 - reg
45 - msi-controller
46 - loongson,msi-base-vec
47 - loongson,msi-num-vecs
48
49examples:
50 - |
51 #include <dt-bindings/interrupt-controller/irq.h>
52 msi: msi-controller@2ff00000 {
53 compatible = "loongson,pch-msi-1.0";
54 reg = <0x2ff00000 0x4>;
55 msi-controller;
56 loongson,msi-base-vec = <64>;
57 loongson,msi-num-vecs = <64>;
58 interrupt-parent = <&htvec>;
59 };
60...