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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * drmem.h: Power specific logical memory block representation
4 *
5 * Copyright 2017 IBM Corporation
6 */
7
8#ifndef _ASM_POWERPC_LMB_H
9#define _ASM_POWERPC_LMB_H
10
11struct drmem_lmb {
12 u64 base_addr;
13 u32 drc_index;
14 u32 aa_index;
15 u32 flags;
16#ifdef CONFIG_MEMORY_HOTPLUG
17 int nid;
18#endif
19};
20
21struct drmem_lmb_info {
22 struct drmem_lmb *lmbs;
23 int n_lmbs;
24 u32 lmb_size;
25};
26
27extern struct drmem_lmb_info *drmem_info;
28
29#define for_each_drmem_lmb_in_range(lmb, start, end) \
30 for ((lmb) = (start); (lmb) < (end); (lmb)++)
31
32#define for_each_drmem_lmb(lmb) \
33 for_each_drmem_lmb_in_range((lmb), \
34 &drmem_info->lmbs[0], \
35 &drmem_info->lmbs[drmem_info->n_lmbs])
36
37/*
38 * The of_drconf_cell_v1 struct defines the layout of the LMB data
39 * specified in the ibm,dynamic-memory device tree property.
40 * The property itself is a 32-bit value specifying the number of
41 * LMBs followed by an array of of_drconf_cell_v1 entries, one
42 * per LMB.
43 */
44struct of_drconf_cell_v1 {
45 __be64 base_addr;
46 __be32 drc_index;
47 __be32 reserved;
48 __be32 aa_index;
49 __be32 flags;
50};
51
52/*
53 * Version 2 of the ibm,dynamic-memory property is defined as a
54 * 32-bit value specifying the number of LMB sets followed by an
55 * array of of_drconf_cell_v2 entries, one per LMB set.
56 */
57struct of_drconf_cell_v2 {
58 u32 seq_lmbs;
59 u64 base_addr;
60 u32 drc_index;
61 u32 aa_index;
62 u32 flags;
63} __packed;
64
65#define DRCONF_MEM_ASSIGNED 0x00000008
66#define DRCONF_MEM_AI_INVALID 0x00000040
67#define DRCONF_MEM_RESERVED 0x00000080
68#define DRCONF_MEM_HOTREMOVABLE 0x00000100
69
70static inline u32 drmem_lmb_size(void)
71{
72 return drmem_info->lmb_size;
73}
74
75#define DRMEM_LMB_RESERVED 0x80000000
76
77static inline void drmem_mark_lmb_reserved(struct drmem_lmb *lmb)
78{
79 lmb->flags |= DRMEM_LMB_RESERVED;
80}
81
82static inline void drmem_remove_lmb_reservation(struct drmem_lmb *lmb)
83{
84 lmb->flags &= ~DRMEM_LMB_RESERVED;
85}
86
87static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
88{
89 return lmb->flags & DRMEM_LMB_RESERVED;
90}
91
92u64 drmem_lmb_memory_max(void);
93int walk_drmem_lmbs(struct device_node *dn, void *data,
94 int (*func)(struct drmem_lmb *, const __be32 **, void *));
95int drmem_update_dt(void);
96
97#ifdef CONFIG_PPC_PSERIES
98int __init
99walk_drmem_lmbs_early(unsigned long node, void *data,
100 int (*func)(struct drmem_lmb *, const __be32 **, void *));
101#endif
102
103static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
104{
105 lmb->aa_index = 0xffffffff;
106}
107
108#ifdef CONFIG_MEMORY_HOTPLUG
109static inline void lmb_set_nid(struct drmem_lmb *lmb)
110{
111 lmb->nid = memory_add_physaddr_to_nid(lmb->base_addr);
112}
113static inline void lmb_clear_nid(struct drmem_lmb *lmb)
114{
115 lmb->nid = -1;
116}
117#else
118static inline void lmb_set_nid(struct drmem_lmb *lmb)
119{
120}
121static inline void lmb_clear_nid(struct drmem_lmb *lmb)
122{
123}
124#endif
125
126#endif /* _ASM_POWERPC_LMB_H */