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Linux kernel mirror (for testing)
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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
4 *
5 * Copyright (C) 2013, Angelo Compagnucci
6 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
7 *
8 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
9 * https://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * https://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
11 *
12 * This driver exports the value of analog input voltage to sysfs, the
13 * voltage unit is nV.
14 */
15
16#include <linux/err.h>
17#include <linux/i2c.h>
18#include <linux/module.h>
19#include <linux/mod_devicetable.h>
20#include <linux/delay.h>
21#include <linux/sysfs.h>
22#include <asm/unaligned.h>
23
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26
27/* Masks */
28#define MCP3422_CHANNEL_MASK 0x60
29#define MCP3422_PGA_MASK 0x03
30#define MCP3422_SRATE_MASK 0x0C
31#define MCP3422_SRATE_240 0x0
32#define MCP3422_SRATE_60 0x1
33#define MCP3422_SRATE_15 0x2
34#define MCP3422_SRATE_3 0x3
35#define MCP3422_PGA_1 0
36#define MCP3422_PGA_2 1
37#define MCP3422_PGA_4 2
38#define MCP3422_PGA_8 3
39#define MCP3422_CONT_SAMPLING 0x10
40
41#define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
42#define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
43#define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
44
45#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
46#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
47#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
48
49#define MCP3422_CHAN(_index) \
50 { \
51 .type = IIO_VOLTAGE, \
52 .indexed = 1, \
53 .channel = _index, \
54 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
55 | BIT(IIO_CHAN_INFO_SCALE), \
56 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
57 }
58
59static const int mcp3422_scales[4][4] = {
60 { 1000000, 500000, 250000, 125000 },
61 { 250000, 125000, 62500, 31250 },
62 { 62500, 31250, 15625, 7812 },
63 { 15625, 7812, 3906, 1953 } };
64
65/* Constant msleep times for data acquisitions */
66static const int mcp3422_read_times[4] = {
67 [MCP3422_SRATE_240] = 1000 / 240,
68 [MCP3422_SRATE_60] = 1000 / 60,
69 [MCP3422_SRATE_15] = 1000 / 15,
70 [MCP3422_SRATE_3] = 1000 / 3 };
71
72/* sample rates to integer conversion table */
73static const int mcp3422_sample_rates[4] = {
74 [MCP3422_SRATE_240] = 240,
75 [MCP3422_SRATE_60] = 60,
76 [MCP3422_SRATE_15] = 15,
77 [MCP3422_SRATE_3] = 3 };
78
79/* sample rates to sign extension table */
80static const int mcp3422_sign_extend[4] = {
81 [MCP3422_SRATE_240] = 11,
82 [MCP3422_SRATE_60] = 13,
83 [MCP3422_SRATE_15] = 15,
84 [MCP3422_SRATE_3] = 17 };
85
86/* Client data (each client gets its own) */
87struct mcp3422 {
88 struct i2c_client *i2c;
89 u8 id;
90 u8 config;
91 u8 pga[4];
92 struct mutex lock;
93};
94
95static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
96{
97 int ret;
98
99 mutex_lock(&adc->lock);
100
101 ret = i2c_master_send(adc->i2c, &newconfig, 1);
102 if (ret > 0) {
103 adc->config = newconfig;
104 ret = 0;
105 }
106
107 mutex_unlock(&adc->lock);
108
109 return ret;
110}
111
112static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
113{
114 int ret = 0;
115 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
116 u8 buf[4] = {0, 0, 0, 0};
117 u32 temp;
118
119 if (sample_rate == MCP3422_SRATE_3) {
120 ret = i2c_master_recv(adc->i2c, buf, 4);
121 temp = get_unaligned_be24(&buf[0]);
122 *config = buf[3];
123 } else {
124 ret = i2c_master_recv(adc->i2c, buf, 3);
125 temp = get_unaligned_be16(&buf[0]);
126 *config = buf[2];
127 }
128
129 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
130
131 return ret;
132}
133
134static int mcp3422_read_channel(struct mcp3422 *adc,
135 struct iio_chan_spec const *channel, int *value)
136{
137 int ret;
138 u8 config;
139 u8 req_channel = channel->channel;
140
141 if (req_channel != MCP3422_CHANNEL(adc->config)) {
142 config = adc->config;
143 config &= ~MCP3422_CHANNEL_MASK;
144 config |= MCP3422_CHANNEL_VALUE(req_channel);
145 config &= ~MCP3422_PGA_MASK;
146 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
147 ret = mcp3422_update_config(adc, config);
148 if (ret < 0)
149 return ret;
150 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
151 }
152
153 return mcp3422_read(adc, value, &config);
154}
155
156static int mcp3422_read_raw(struct iio_dev *iio,
157 struct iio_chan_spec const *channel, int *val1,
158 int *val2, long mask)
159{
160 struct mcp3422 *adc = iio_priv(iio);
161 int err;
162
163 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
164 u8 pga = MCP3422_PGA(adc->config);
165
166 switch (mask) {
167 case IIO_CHAN_INFO_RAW:
168 err = mcp3422_read_channel(adc, channel, val1);
169 if (err < 0)
170 return -EINVAL;
171 return IIO_VAL_INT;
172
173 case IIO_CHAN_INFO_SCALE:
174
175 *val1 = 0;
176 *val2 = mcp3422_scales[sample_rate][pga];
177 return IIO_VAL_INT_PLUS_NANO;
178
179 case IIO_CHAN_INFO_SAMP_FREQ:
180 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
181 return IIO_VAL_INT;
182
183 default:
184 break;
185 }
186
187 return -EINVAL;
188}
189
190static int mcp3422_write_raw(struct iio_dev *iio,
191 struct iio_chan_spec const *channel, int val1,
192 int val2, long mask)
193{
194 struct mcp3422 *adc = iio_priv(iio);
195 u8 temp;
196 u8 config = adc->config;
197 u8 req_channel = channel->channel;
198 u8 sample_rate = MCP3422_SAMPLE_RATE(config);
199 u8 i;
200
201 switch (mask) {
202 case IIO_CHAN_INFO_SCALE:
203 if (val1 != 0)
204 return -EINVAL;
205
206 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
207 if (val2 == mcp3422_scales[sample_rate][i]) {
208 adc->pga[req_channel] = i;
209
210 config &= ~MCP3422_CHANNEL_MASK;
211 config |= MCP3422_CHANNEL_VALUE(req_channel);
212 config &= ~MCP3422_PGA_MASK;
213 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
214
215 return mcp3422_update_config(adc, config);
216 }
217 }
218 return -EINVAL;
219
220 case IIO_CHAN_INFO_SAMP_FREQ:
221 switch (val1) {
222 case 240:
223 temp = MCP3422_SRATE_240;
224 break;
225 case 60:
226 temp = MCP3422_SRATE_60;
227 break;
228 case 15:
229 temp = MCP3422_SRATE_15;
230 break;
231 case 3:
232 if (adc->id > 4)
233 return -EINVAL;
234 temp = MCP3422_SRATE_3;
235 break;
236 default:
237 return -EINVAL;
238 }
239
240 config &= ~MCP3422_CHANNEL_MASK;
241 config |= MCP3422_CHANNEL_VALUE(req_channel);
242 config &= ~MCP3422_SRATE_MASK;
243 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
244
245 return mcp3422_update_config(adc, config);
246
247 default:
248 break;
249 }
250
251 return -EINVAL;
252}
253
254static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
255 struct iio_chan_spec const *chan, long mask)
256{
257 switch (mask) {
258 case IIO_CHAN_INFO_SCALE:
259 return IIO_VAL_INT_PLUS_NANO;
260 case IIO_CHAN_INFO_SAMP_FREQ:
261 return IIO_VAL_INT_PLUS_MICRO;
262 default:
263 return -EINVAL;
264 }
265}
266
267static ssize_t mcp3422_show_samp_freqs(struct device *dev,
268 struct device_attribute *attr, char *buf)
269{
270 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
271
272 if (adc->id > 4)
273 return sprintf(buf, "240 60 15\n");
274
275 return sprintf(buf, "240 60 15 3\n");
276}
277
278static ssize_t mcp3422_show_scales(struct device *dev,
279 struct device_attribute *attr, char *buf)
280{
281 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
282 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
283
284 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
285 mcp3422_scales[sample_rate][0],
286 mcp3422_scales[sample_rate][1],
287 mcp3422_scales[sample_rate][2],
288 mcp3422_scales[sample_rate][3]);
289}
290
291static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
292 mcp3422_show_samp_freqs, NULL, 0);
293static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
294 mcp3422_show_scales, NULL, 0);
295
296static struct attribute *mcp3422_attributes[] = {
297 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
298 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
299 NULL,
300};
301
302static const struct attribute_group mcp3422_attribute_group = {
303 .attrs = mcp3422_attributes,
304};
305
306static const struct iio_chan_spec mcp3421_channels[] = {
307 MCP3422_CHAN(0),
308};
309
310static const struct iio_chan_spec mcp3422_channels[] = {
311 MCP3422_CHAN(0),
312 MCP3422_CHAN(1),
313};
314
315static const struct iio_chan_spec mcp3424_channels[] = {
316 MCP3422_CHAN(0),
317 MCP3422_CHAN(1),
318 MCP3422_CHAN(2),
319 MCP3422_CHAN(3),
320};
321
322static const struct iio_info mcp3422_info = {
323 .read_raw = mcp3422_read_raw,
324 .write_raw = mcp3422_write_raw,
325 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
326 .attrs = &mcp3422_attribute_group,
327};
328
329static int mcp3422_probe(struct i2c_client *client,
330 const struct i2c_device_id *id)
331{
332 struct iio_dev *indio_dev;
333 struct mcp3422 *adc;
334 int err;
335 u8 config;
336
337 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
338 return -EOPNOTSUPP;
339
340 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
341 if (!indio_dev)
342 return -ENOMEM;
343
344 adc = iio_priv(indio_dev);
345 adc->i2c = client;
346 adc->id = (u8)(id->driver_data);
347
348 mutex_init(&adc->lock);
349
350 indio_dev->name = dev_name(&client->dev);
351 indio_dev->modes = INDIO_DIRECT_MODE;
352 indio_dev->info = &mcp3422_info;
353
354 switch (adc->id) {
355 case 1:
356 case 5:
357 indio_dev->channels = mcp3421_channels;
358 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
359 break;
360 case 2:
361 case 3:
362 case 6:
363 case 7:
364 indio_dev->channels = mcp3422_channels;
365 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
366 break;
367 case 4:
368 case 8:
369 indio_dev->channels = mcp3424_channels;
370 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
371 break;
372 }
373
374 /* meaningful default configuration */
375 config = (MCP3422_CONT_SAMPLING
376 | MCP3422_CHANNEL_VALUE(0)
377 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
378 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
379 err = mcp3422_update_config(adc, config);
380 if (err < 0)
381 return err;
382
383 err = devm_iio_device_register(&client->dev, indio_dev);
384 if (err < 0)
385 return err;
386
387 i2c_set_clientdata(client, indio_dev);
388
389 return 0;
390}
391
392static const struct i2c_device_id mcp3422_id[] = {
393 { "mcp3421", 1 },
394 { "mcp3422", 2 },
395 { "mcp3423", 3 },
396 { "mcp3424", 4 },
397 { "mcp3425", 5 },
398 { "mcp3426", 6 },
399 { "mcp3427", 7 },
400 { "mcp3428", 8 },
401 { }
402};
403MODULE_DEVICE_TABLE(i2c, mcp3422_id);
404
405static const struct of_device_id mcp3422_of_match[] = {
406 { .compatible = "mcp3422" },
407 { }
408};
409MODULE_DEVICE_TABLE(of, mcp3422_of_match);
410
411static struct i2c_driver mcp3422_driver = {
412 .driver = {
413 .name = "mcp3422",
414 .of_match_table = mcp3422_of_match,
415 },
416 .probe = mcp3422_probe,
417 .id_table = mcp3422_id,
418};
419module_i2c_driver(mcp3422_driver);
420
421MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
422MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
423MODULE_LICENSE("GPL v2");