tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13 model = "Bosch AM335x Guardian";
14 compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16 chosen {
17 stdout-path = &uart0;
18 tick-timer = &timer2;
19 };
20
21 cpus {
22 cpu@0 {
23 cpu0-supply = <&dcdc2_reg>;
24 };
25 };
26
27 memory@80000000 {
28 device_type = "memory";
29 reg = <0x80000000 0x10000000>; /* 256 MB */
30 };
31
32 gpio_keys {
33 compatible = "gpio-keys";
34 #address-cells = <1>;
35 #size-cells = <0>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&gpio_keys_pins>;
38
39 button21 {
40 label = "guardian-power-button";
41 linux,code = <KEY_POWER>;
42 gpios = <&gpio2 21 0>;
43 wakeup-source;
44 };
45 };
46
47 leds {
48 compatible = "gpio-leds";
49 pinctrl-names = "default";
50 pinctrl-0 = <&leds_pins>;
51
52 led1 {
53 label = "green:heartbeat";
54 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger = "heartbeat";
56 default-state = "off";
57 };
58
59 led2 {
60 label = "green:mmc0";
61 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
62 linux,default-trigger = "mmc0";
63 default-state = "off";
64 };
65 };
66
67 panel {
68 compatible = "ti,tilcdc,panel";
69 pinctrl-names = "default", "sleep";
70 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
71 pinctrl-1 = <&lcd_pins_sleep>;
72
73 display-timings {
74 320x240 {
75 hactive = <320>;
76 vactive = <240>;
77 hback-porch = <68>;
78 hfront-porch = <20>;
79 hsync-len = <1>;
80 vback-porch = <18>;
81 vfront-porch = <4>;
82 vsync-len = <1>;
83 clock-frequency = <9000000>;
84 hsync-active = <0>;
85 vsync-active = <0>;
86 };
87 };
88 panel-info {
89 ac-bias = <255>;
90 ac-bias-intrpt = <0>;
91 dma-burst-sz = <16>;
92 bpp = <24>;
93 bus-width = <16>;
94 fdd = <0x80>;
95 sync-edge = <0>;
96 sync-ctrl = <1>;
97 raster-order = <0>;
98 fifo-th = <0>;
99 };
100
101 };
102
103 pwm7: dmtimer-pwm {
104 compatible = "ti,omap-dmtimer-pwm";
105 ti,timers = <&timer7>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&dmtimer7_pins>;
108 ti,clock-source = <0x01>;
109 };
110
111 vmmcsd_fixed: regulator-3v3 {
112 compatible = "regulator-fixed";
113 regulator-name = "vmmcsd_fixed";
114 regulator-min-microvolt = <3300000>;
115 regulator-max-microvolt = <3300000>;
116 };
117};
118
119&elm {
120 status = "okay";
121};
122
123&gpmc {
124 pinctrl-names = "default";
125 pinctrl-0 = <&nandflash_pins>;
126 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
127 status = "okay";
128
129 nand@0,0 {
130 compatible = "ti,omap2-nand";
131 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
132 interrupt-parent = <&gpmc>;
133 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
134 <1 IRQ_TYPE_NONE>; /* termcount */
135 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
136 ti,nand-ecc-opt = "bch16";
137 ti,elm-id = <&elm>;
138 nand-bus-width = <8>;
139 gpmc,device-width = <1>;
140 gpmc,sync-clk-ps = <0>;
141 gpmc,cs-on-ns = <0>;
142 gpmc,cs-rd-off-ns = <44>;
143 gpmc,cs-wr-off-ns = <44>;
144 gpmc,adv-on-ns = <6>;
145 gpmc,adv-rd-off-ns = <34>;
146 gpmc,adv-wr-off-ns = <44>;
147 gpmc,we-on-ns = <0>;
148 gpmc,we-off-ns = <40>;
149 gpmc,oe-on-ns = <0>;
150 gpmc,oe-off-ns = <54>;
151 gpmc,access-ns = <64>;
152 gpmc,rd-cycle-ns = <82>;
153 gpmc,wr-cycle-ns = <82>;
154 gpmc,bus-turnaround-ns = <0>;
155 gpmc,cycle2cycle-delay-ns = <0>;
156 gpmc,clk-activation-ns = <0>;
157 gpmc,wr-access-ns = <40>;
158 gpmc,wr-data-mux-bus-ns = <0>;
159
160 /*
161 * MTD partition table
162 *
163 * All SPL-* partitions are sized to minimal length which can
164 * be independently programmable. For NAND flash this is equal
165 * to size of erase-block.
166 */
167 #address-cells = <1>;
168 #size-cells = <1>;
169
170 partition@0 {
171 label = "SPL";
172 reg = <0x0 0x40000>;
173 };
174
175 partition@1 {
176 label = "SPL.backup1";
177 reg = <0x40000 0x40000>;
178 };
179
180 partition@2 {
181 label = "SPL.backup2";
182 reg = <0x80000 0x40000>;
183 };
184
185 partition@3 {
186 label = "SPL.backup3";
187 reg = <0xc0000 0x40000>;
188 };
189
190 partition@4 {
191 label = "u-boot";
192 reg = <0x100000 0x100000>;
193 };
194
195 partition@5 {
196 label = "u-boot.backup1";
197 reg = <0x200000 0x100000>;
198 };
199
200 partition@6 {
201 label = "u-boot-env";
202 reg = <0x300000 0x40000>;
203 };
204
205 partition@7 {
206 label = "u-boot-env.backup1";
207 reg = <0x340000 0x40000>;
208 };
209
210 partition@8 {
211 label = "UBI";
212 reg = <0x380000 0x1fc80000>;
213 };
214 };
215};
216
217&i2c0 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c0_pins>;
220 clock-frequency = <400000>;
221 status = "okay";
222
223 tps: tps@24 {
224 reg = <0x24>;
225 };
226};
227
228&lcdc {
229 blue-and-red-wiring = "crossed";
230 status = "okay";
231};
232
233&mmc1 {
234 bus-width = <0x4>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&mmc1_pins>;
237 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
238 vmmc-supply = <&vmmcsd_fixed>;
239 status = "okay";
240};
241
242&rtc {
243 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
244 clock-names = "ext-clk", "int-clk";
245 system-power-controller;
246};
247
248&spi0 {
249 ti,pindir-d0-out-d1-in;
250 pinctrl-names = "default";
251 pinctrl-0 = <&spi0_pins>;
252 status = "okay";
253};
254
255#include "tps65217.dtsi"
256
257&tps {
258 ti,pmic-shutdown-controller;
259 interrupt-parent = <&intc>;
260 interrupts = <7>; /* NMI */
261
262 backlight {
263 isel = <1>; /* 1 - ISET1, 2 ISET2 */
264 fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
265 default-brightness = <100>;
266 };
267
268 regulators {
269 dcdc1_reg: regulator@0 {
270 regulator-name = "vdds_dpr";
271 regulator-always-on;
272 };
273
274 dcdc2_reg: regulator@1 {
275 regulator-name = "vdd_mpu";
276 regulator-min-microvolt = <925000>;
277 regulator-max-microvolt = <1351500>;
278 regulator-boot-on;
279 regulator-always-on;
280 };
281
282 dcdc3_reg: regulator@2 {
283 regulator-name = "vdd_core";
284 regulator-min-microvolt = <925000>;
285 regulator-max-microvolt = <1150000>;
286 regulator-boot-on;
287 regulator-always-on;
288 };
289
290 ldo1_reg: regulator@3 {
291 regulator-name = "vio,vrtc,vdds";
292 regulator-always-on;
293 };
294
295 ldo2_reg: regulator@4 {
296 regulator-name = "vdd_3v3aux";
297 regulator-always-on;
298 };
299
300 ldo3_reg: regulator@5 {
301 regulator-name = "vdd_1v8";
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <1800000>;
304 regulator-always-on;
305 };
306
307 ldo4_reg: regulator@6 {
308 regulator-name = "vdd_3v3a";
309 regulator-always-on;
310 };
311 };
312};
313
314&tscadc {
315 status = "okay";
316
317 adc {
318 ti,adc-channels = <0 1 2 3 4 5 6>;
319 };
320};
321
322&uart0 {
323 pinctrl-names = "default";
324 pinctrl-0 = <&uart0_pins>;
325 status = "okay";
326};
327
328&usb0 {
329 dr_mode = "peripheral";
330};
331
332&usb1 {
333 dr_mode = "host";
334};
335
336&am33xx_pinmux {
337 pinctrl-names = "default";
338 pinctrl-0 = <&clkout2_pin &gpio_pins>;
339
340 clkout2_pin: pinmux_clkout2_pin {
341 pinctrl-single,pins = <
342 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
343 >;
344 };
345
346 dmtimer7_pins: pinmux_dmtimer7_pins {
347 pinctrl-single,pins = <
348 AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
349 >;
350 };
351
352 gpio_keys_pins: pinmux_gpio_keys_pins {
353 pinctrl-single,pins = <
354 AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
355 >;
356 };
357
358 gpio_pins: pinmux_gpio_pins {
359 pinctrl-single,pins = <
360 AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
361 AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
362 >;
363 };
364
365 i2c0_pins: pinmux_i2c0_pins {
366 pinctrl-single,pins = <
367 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
368 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
369 >;
370 };
371
372 lcd_disen_pins: pinmux_lcd_disen_pins {
373 pinctrl-single,pins = <
374 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
375 >;
376 };
377
378 lcd_pins_default: pinmux_lcd_pins_default {
379 pinctrl-single,pins = <
380 AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
381 AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
382 AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
383 AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
384 AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
385 AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
386 AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
387 AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
388 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
389 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
390 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
391 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
392 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
393 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
394 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
395 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
396 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
397 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
398 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
399 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
400 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
401 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
402 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
403 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
404 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
405 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
406 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
407 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
408 >;
409 };
410
411 lcd_pins_sleep: pinmux_lcd_pins_sleep {
412 pinctrl-single,pins = <
413 AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
414 AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
415 AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
416 AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
417 AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
418 AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
419 AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
420 AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
421 AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
422 AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
423 AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
424 AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
425 AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
426 AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
427 AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
428 AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
429 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
430 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
431 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
432 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
433 >;
434 };
435
436 leds_pins: pinmux_leds_pins {
437 pinctrl-single,pins = <
438 AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
439 AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
440 >;
441 };
442
443 mmc1_pins: pinmux_mmc1_pins {
444 pinctrl-single,pins = <
445 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
446 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
447 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
448 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
449 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
450 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
451 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
452 >;
453 };
454
455 spi0_pins: pinmux_spi0_pins {
456 pinctrl-single,pins = <
457 AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
458 AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
459 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
460 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
461 >;
462 };
463
464 uart0_pins: pinmux_uart0_pins {
465 pinctrl-single,pins = <
466 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
467 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
468 >;
469 };
470
471 nandflash_pins: pinmux_nandflash_pins {
472 pinctrl-single,pins = <
473 AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
474 AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
475 AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
476 AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
477 AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
478 AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
479 AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
480 AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
481 AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
482 AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
483 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
484 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
485 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
486 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
487 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
488 >;
489 };
490};