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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * These are the H.264 state controls for use with stateless H.264
4 * codec drivers.
5 *
6 * It turns out that these structs are not stable yet and will undergo
7 * more changes. So keep them private until they are stable and ready to
8 * become part of the official public API.
9 */
10
11#ifndef _H264_CTRLS_H_
12#define _H264_CTRLS_H_
13
14#include <linux/videodev2.h>
15
16/*
17 * Maximum DPB size, as specified by section 'A.3.1 Level limits
18 * common to the Baseline, Main, and Extended profiles'.
19 */
20#define V4L2_H264_NUM_DPB_ENTRIES 16
21
22/* Our pixel format isn't stable at the moment */
23#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */
24
25/*
26 * This is put insanely high to avoid conflicting with controls that
27 * would be added during the phase where those controls are not
28 * stable. It should be fixed eventually.
29 */
30#define V4L2_CID_MPEG_VIDEO_H264_SPS (V4L2_CID_MPEG_BASE+1000)
31#define V4L2_CID_MPEG_VIDEO_H264_PPS (V4L2_CID_MPEG_BASE+1001)
32#define V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (V4L2_CID_MPEG_BASE+1002)
33#define V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS (V4L2_CID_MPEG_BASE+1003)
34#define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS (V4L2_CID_MPEG_BASE+1004)
35#define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (V4L2_CID_MPEG_BASE+1005)
36#define V4L2_CID_MPEG_VIDEO_H264_START_CODE (V4L2_CID_MPEG_BASE+1006)
37
38/* enum v4l2_ctrl_type type values */
39#define V4L2_CTRL_TYPE_H264_SPS 0x0110
40#define V4L2_CTRL_TYPE_H264_PPS 0x0111
41#define V4L2_CTRL_TYPE_H264_SCALING_MATRIX 0x0112
42#define V4L2_CTRL_TYPE_H264_SLICE_PARAMS 0x0113
43#define V4L2_CTRL_TYPE_H264_DECODE_PARAMS 0x0114
44
45enum v4l2_mpeg_video_h264_decode_mode {
46 V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
47 V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
48};
49
50enum v4l2_mpeg_video_h264_start_code {
51 V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
52 V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
53};
54
55#define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG 0x01
56#define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG 0x02
57#define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG 0x04
58#define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG 0x08
59#define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG 0x10
60#define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG 0x20
61
62#define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE 0x01
63#define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS 0x02
64#define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO 0x04
65#define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED 0x08
66#define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY 0x10
67#define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD 0x20
68#define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE 0x40
69
70struct v4l2_ctrl_h264_sps {
71 __u8 profile_idc;
72 __u8 constraint_set_flags;
73 __u8 level_idc;
74 __u8 seq_parameter_set_id;
75 __u8 chroma_format_idc;
76 __u8 bit_depth_luma_minus8;
77 __u8 bit_depth_chroma_minus8;
78 __u8 log2_max_frame_num_minus4;
79 __u8 pic_order_cnt_type;
80 __u8 log2_max_pic_order_cnt_lsb_minus4;
81 __u8 max_num_ref_frames;
82 __u8 num_ref_frames_in_pic_order_cnt_cycle;
83 __s32 offset_for_ref_frame[255];
84 __s32 offset_for_non_ref_pic;
85 __s32 offset_for_top_to_bottom_field;
86 __u16 pic_width_in_mbs_minus1;
87 __u16 pic_height_in_map_units_minus1;
88 __u32 flags;
89};
90
91#define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE 0x0001
92#define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT 0x0002
93#define V4L2_H264_PPS_FLAG_WEIGHTED_PRED 0x0004
94#define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT 0x0008
95#define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED 0x0010
96#define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT 0x0020
97#define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE 0x0040
98#define V4L2_H264_PPS_FLAG_PIC_SCALING_MATRIX_PRESENT 0x0080
99
100struct v4l2_ctrl_h264_pps {
101 __u8 pic_parameter_set_id;
102 __u8 seq_parameter_set_id;
103 __u8 num_slice_groups_minus1;
104 __u8 num_ref_idx_l0_default_active_minus1;
105 __u8 num_ref_idx_l1_default_active_minus1;
106 __u8 weighted_bipred_idc;
107 __s8 pic_init_qp_minus26;
108 __s8 pic_init_qs_minus26;
109 __s8 chroma_qp_index_offset;
110 __s8 second_chroma_qp_index_offset;
111 __u16 flags;
112};
113
114struct v4l2_ctrl_h264_scaling_matrix {
115 __u8 scaling_list_4x4[6][16];
116 __u8 scaling_list_8x8[6][64];
117};
118
119struct v4l2_h264_weight_factors {
120 __s16 luma_weight[32];
121 __s16 luma_offset[32];
122 __s16 chroma_weight[32][2];
123 __s16 chroma_offset[32][2];
124};
125
126struct v4l2_h264_pred_weight_table {
127 __u16 luma_log2_weight_denom;
128 __u16 chroma_log2_weight_denom;
129 struct v4l2_h264_weight_factors weight_factors[2];
130};
131
132#define V4L2_H264_SLICE_TYPE_P 0
133#define V4L2_H264_SLICE_TYPE_B 1
134#define V4L2_H264_SLICE_TYPE_I 2
135#define V4L2_H264_SLICE_TYPE_SP 3
136#define V4L2_H264_SLICE_TYPE_SI 4
137
138#define V4L2_H264_SLICE_FLAG_FIELD_PIC 0x01
139#define V4L2_H264_SLICE_FLAG_BOTTOM_FIELD 0x02
140#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x04
141#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x08
142
143struct v4l2_ctrl_h264_slice_params {
144 /* Size in bytes, including header */
145 __u32 size;
146
147 /* Offset in bytes to the start of slice in the OUTPUT buffer. */
148 __u32 start_byte_offset;
149
150 /* Offset in bits to slice_data() from the beginning of this slice. */
151 __u32 header_bit_size;
152
153 __u16 first_mb_in_slice;
154 __u8 slice_type;
155 __u8 pic_parameter_set_id;
156 __u8 colour_plane_id;
157 __u8 redundant_pic_cnt;
158 __u16 frame_num;
159 __u16 idr_pic_id;
160 __u16 pic_order_cnt_lsb;
161 __s32 delta_pic_order_cnt_bottom;
162 __s32 delta_pic_order_cnt0;
163 __s32 delta_pic_order_cnt1;
164
165 struct v4l2_h264_pred_weight_table pred_weight_table;
166 /* Size in bits of dec_ref_pic_marking() syntax element. */
167 __u32 dec_ref_pic_marking_bit_size;
168 /* Size in bits of pic order count syntax. */
169 __u32 pic_order_cnt_bit_size;
170
171 __u8 cabac_init_idc;
172 __s8 slice_qp_delta;
173 __s8 slice_qs_delta;
174 __u8 disable_deblocking_filter_idc;
175 __s8 slice_alpha_c0_offset_div2;
176 __s8 slice_beta_offset_div2;
177 __u8 num_ref_idx_l0_active_minus1;
178 __u8 num_ref_idx_l1_active_minus1;
179 __u32 slice_group_change_cycle;
180
181 /*
182 * Entries on each list are indices into
183 * v4l2_ctrl_h264_decode_params.dpb[].
184 */
185 __u8 ref_pic_list0[32];
186 __u8 ref_pic_list1[32];
187
188 __u32 flags;
189};
190
191#define V4L2_H264_DPB_ENTRY_FLAG_VALID 0x01
192#define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02
193#define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04
194#define V4L2_H264_DPB_ENTRY_FLAG_FIELD 0x08
195#define V4L2_H264_DPB_ENTRY_FLAG_BOTTOM_FIELD 0x10
196
197struct v4l2_h264_dpb_entry {
198 __u64 reference_ts;
199 __u16 frame_num;
200 __u16 pic_num;
201 /* Note that field is indicated by v4l2_buffer.field */
202 __s32 top_field_order_cnt;
203 __s32 bottom_field_order_cnt;
204 __u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */
205};
206
207#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01
208
209struct v4l2_ctrl_h264_decode_params {
210 struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES];
211 __u16 num_slices;
212 __u16 nal_ref_idc;
213 __s32 top_field_order_cnt;
214 __s32 bottom_field_order_cnt;
215 __u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */
216};
217
218#endif