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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2003 Ralf Baechle 7 */ 8#ifndef _ASM_PGTABLE_H 9#define _ASM_PGTABLE_H 10 11#include <linux/mm_types.h> 12#include <linux/mmzone.h> 13#ifdef CONFIG_32BIT 14#include <asm/pgtable-32.h> 15#endif 16#ifdef CONFIG_64BIT 17#include <asm/pgtable-64.h> 18#endif 19 20#include <asm/cmpxchg.h> 21#include <asm/io.h> 22#include <asm/pgtable-bits.h> 23#include <asm/cpu-features.h> 24 25struct mm_struct; 26struct vm_area_struct; 27 28#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \ 29 _page_cachable_default) 30#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \ 31 _page_cachable_default) 32#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_NO_EXEC | \ 33 _page_cachable_default) 34#define PAGE_READONLY __pgprot(_PAGE_PRESENT | \ 35 _page_cachable_default) 36#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 37 _PAGE_GLOBAL | _page_cachable_default) 38#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 39 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) 40#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \ 41 _page_cachable_default) 42#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ 43 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) 44 45/* 46 * If _PAGE_NO_EXEC is not defined, we can't do page protection for 47 * execute, and consider it to be the same as read. Also, write 48 * permissions imply read permissions. This is the closest we can get 49 * by reasonable means.. 50 */ 51 52/* 53 * Dummy values to fill the table in mmap.c 54 * The real values will be generated at runtime 55 */ 56#define __P000 __pgprot(0) 57#define __P001 __pgprot(0) 58#define __P010 __pgprot(0) 59#define __P011 __pgprot(0) 60#define __P100 __pgprot(0) 61#define __P101 __pgprot(0) 62#define __P110 __pgprot(0) 63#define __P111 __pgprot(0) 64 65#define __S000 __pgprot(0) 66#define __S001 __pgprot(0) 67#define __S010 __pgprot(0) 68#define __S011 __pgprot(0) 69#define __S100 __pgprot(0) 70#define __S101 __pgprot(0) 71#define __S110 __pgprot(0) 72#define __S111 __pgprot(0) 73 74extern unsigned long _page_cachable_default; 75 76/* 77 * ZERO_PAGE is a global shared page that is always zero; used 78 * for zero-mapped memory areas etc.. 79 */ 80 81extern unsigned long empty_zero_page; 82extern unsigned long zero_page_mask; 83 84#define ZERO_PAGE(vaddr) \ 85 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))) 86#define __HAVE_COLOR_ZERO_PAGE 87 88extern void paging_init(void); 89 90/* 91 * Conversion functions: convert a page and protection to a page entry, 92 * and a page entry and page directory to the page they refer to. 93 */ 94#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd)) 95 96#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) 97#ifndef CONFIG_TRANSPARENT_HUGEPAGE 98#define pmd_page(pmd) __pmd_page(pmd) 99#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 100 101#define pmd_page_vaddr(pmd) pmd_val(pmd) 102 103#define htw_stop() \ 104do { \ 105 unsigned long flags; \ 106 \ 107 if (cpu_has_htw) { \ 108 local_irq_save(flags); \ 109 if(!raw_current_cpu_data.htw_seq++) { \ 110 write_c0_pwctl(read_c0_pwctl() & \ 111 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \ 112 back_to_back_c0_hazard(); \ 113 } \ 114 local_irq_restore(flags); \ 115 } \ 116} while(0) 117 118#define htw_start() \ 119do { \ 120 unsigned long flags; \ 121 \ 122 if (cpu_has_htw) { \ 123 local_irq_save(flags); \ 124 if (!--raw_current_cpu_data.htw_seq) { \ 125 write_c0_pwctl(read_c0_pwctl() | \ 126 (1 << MIPS_PWCTL_PWEN_SHIFT)); \ 127 back_to_back_c0_hazard(); \ 128 } \ 129 local_irq_restore(flags); \ 130 } \ 131} while(0) 132 133static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 134 pte_t *ptep, pte_t pteval); 135 136#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 137 138#ifdef CONFIG_XPA 139# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL)) 140#else 141# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL)) 142#endif 143 144#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT) 145#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC) 146 147static inline void set_pte(pte_t *ptep, pte_t pte) 148{ 149 ptep->pte_high = pte.pte_high; 150 smp_wmb(); 151 ptep->pte_low = pte.pte_low; 152 153#ifdef CONFIG_XPA 154 if (pte.pte_high & _PAGE_GLOBAL) { 155#else 156 if (pte.pte_low & _PAGE_GLOBAL) { 157#endif 158 pte_t *buddy = ptep_buddy(ptep); 159 /* 160 * Make sure the buddy is global too (if it's !none, 161 * it better already be global) 162 */ 163 if (pte_none(*buddy)) { 164 if (!IS_ENABLED(CONFIG_XPA)) 165 buddy->pte_low |= _PAGE_GLOBAL; 166 buddy->pte_high |= _PAGE_GLOBAL; 167 } 168 } 169} 170 171static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 172{ 173 pte_t null = __pte(0); 174 175 htw_stop(); 176 /* Preserve global status for the pair */ 177 if (IS_ENABLED(CONFIG_XPA)) { 178 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL) 179 null.pte_high = _PAGE_GLOBAL; 180 } else { 181 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL) 182 null.pte_low = null.pte_high = _PAGE_GLOBAL; 183 } 184 185 set_pte_at(mm, addr, ptep, null); 186 htw_start(); 187} 188#else 189 190#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 191#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 192#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC) 193 194/* 195 * Certain architectures need to do special things when pte's 196 * within a page table are directly modified. Thus, the following 197 * hook is made available. 198 */ 199static inline void set_pte(pte_t *ptep, pte_t pteval) 200{ 201 *ptep = pteval; 202#if !defined(CONFIG_CPU_R3K_TLB) 203 if (pte_val(pteval) & _PAGE_GLOBAL) { 204 pte_t *buddy = ptep_buddy(ptep); 205 /* 206 * Make sure the buddy is global too (if it's !none, 207 * it better already be global) 208 */ 209# if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32) 210 cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL); 211# else 212 cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL); 213# endif 214 } 215#endif 216} 217 218static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 219{ 220 htw_stop(); 221#if !defined(CONFIG_CPU_R3K_TLB) 222 /* Preserve global status for the pair */ 223 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL) 224 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL)); 225 else 226#endif 227 set_pte_at(mm, addr, ptep, __pte(0)); 228 htw_start(); 229} 230#endif 231 232static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 233 pte_t *ptep, pte_t pteval) 234{ 235 extern void __update_cache(unsigned long address, pte_t pte); 236 237 if (!pte_present(pteval)) 238 goto cache_sync_done; 239 240 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval))) 241 goto cache_sync_done; 242 243 __update_cache(addr, pteval); 244cache_sync_done: 245 set_pte(ptep, pteval); 246} 247 248/* 249 * (pmds are folded into puds so this doesn't get actually called, 250 * but the define is needed for a generic inline function.) 251 */ 252#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) 253 254#ifndef __PAGETABLE_PMD_FOLDED 255/* 256 * (puds are folded into pgds so this doesn't get actually called, 257 * but the define is needed for a generic inline function.) 258 */ 259#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0) 260#endif 261 262#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) 263#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) 264#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) 265 266/* 267 * We used to declare this array with size but gcc 3.3 and older are not able 268 * to find that this expression is a constant, so the size is dropped. 269 */ 270extern pgd_t swapper_pg_dir[]; 271 272/* 273 * Platform specific pte_special() and pte_mkspecial() definitions 274 * are required only when ARCH_HAS_PTE_SPECIAL is enabled. 275 */ 276#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) 277#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 278static inline int pte_special(pte_t pte) 279{ 280 return pte.pte_low & _PAGE_SPECIAL; 281} 282 283static inline pte_t pte_mkspecial(pte_t pte) 284{ 285 pte.pte_low |= _PAGE_SPECIAL; 286 return pte; 287} 288#else 289static inline int pte_special(pte_t pte) 290{ 291 return pte_val(pte) & _PAGE_SPECIAL; 292} 293 294static inline pte_t pte_mkspecial(pte_t pte) 295{ 296 pte_val(pte) |= _PAGE_SPECIAL; 297 return pte; 298} 299#endif 300#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */ 301 302/* 303 * The following only work if pte_present() is true. 304 * Undefined behaviour if not.. 305 */ 306#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 307static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; } 308static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; } 309static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; } 310 311static inline pte_t pte_wrprotect(pte_t pte) 312{ 313 pte.pte_low &= ~_PAGE_WRITE; 314 if (!IS_ENABLED(CONFIG_XPA)) 315 pte.pte_low &= ~_PAGE_SILENT_WRITE; 316 pte.pte_high &= ~_PAGE_SILENT_WRITE; 317 return pte; 318} 319 320static inline pte_t pte_mkclean(pte_t pte) 321{ 322 pte.pte_low &= ~_PAGE_MODIFIED; 323 if (!IS_ENABLED(CONFIG_XPA)) 324 pte.pte_low &= ~_PAGE_SILENT_WRITE; 325 pte.pte_high &= ~_PAGE_SILENT_WRITE; 326 return pte; 327} 328 329static inline pte_t pte_mkold(pte_t pte) 330{ 331 pte.pte_low &= ~_PAGE_ACCESSED; 332 if (!IS_ENABLED(CONFIG_XPA)) 333 pte.pte_low &= ~_PAGE_SILENT_READ; 334 pte.pte_high &= ~_PAGE_SILENT_READ; 335 return pte; 336} 337 338static inline pte_t pte_mkwrite(pte_t pte) 339{ 340 pte.pte_low |= _PAGE_WRITE; 341 if (pte.pte_low & _PAGE_MODIFIED) { 342 if (!IS_ENABLED(CONFIG_XPA)) 343 pte.pte_low |= _PAGE_SILENT_WRITE; 344 pte.pte_high |= _PAGE_SILENT_WRITE; 345 } 346 return pte; 347} 348 349static inline pte_t pte_mkdirty(pte_t pte) 350{ 351 pte.pte_low |= _PAGE_MODIFIED; 352 if (pte.pte_low & _PAGE_WRITE) { 353 if (!IS_ENABLED(CONFIG_XPA)) 354 pte.pte_low |= _PAGE_SILENT_WRITE; 355 pte.pte_high |= _PAGE_SILENT_WRITE; 356 } 357 return pte; 358} 359 360static inline pte_t pte_mkyoung(pte_t pte) 361{ 362 pte.pte_low |= _PAGE_ACCESSED; 363 if (!(pte.pte_low & _PAGE_NO_READ)) { 364 if (!IS_ENABLED(CONFIG_XPA)) 365 pte.pte_low |= _PAGE_SILENT_READ; 366 pte.pte_high |= _PAGE_SILENT_READ; 367 } 368 return pte; 369} 370#else 371static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } 372static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } 373static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 374 375static inline pte_t pte_wrprotect(pte_t pte) 376{ 377 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 378 return pte; 379} 380 381static inline pte_t pte_mkclean(pte_t pte) 382{ 383 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 384 return pte; 385} 386 387static inline pte_t pte_mkold(pte_t pte) 388{ 389 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); 390 return pte; 391} 392 393static inline pte_t pte_mkwrite(pte_t pte) 394{ 395 pte_val(pte) |= _PAGE_WRITE; 396 if (pte_val(pte) & _PAGE_MODIFIED) 397 pte_val(pte) |= _PAGE_SILENT_WRITE; 398 return pte; 399} 400 401static inline pte_t pte_mkdirty(pte_t pte) 402{ 403 pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY; 404 if (pte_val(pte) & _PAGE_WRITE) 405 pte_val(pte) |= _PAGE_SILENT_WRITE; 406 return pte; 407} 408 409static inline pte_t pte_mkyoung(pte_t pte) 410{ 411 pte_val(pte) |= _PAGE_ACCESSED; 412 if (!(pte_val(pte) & _PAGE_NO_READ)) 413 pte_val(pte) |= _PAGE_SILENT_READ; 414 return pte; 415} 416 417#define pte_sw_mkyoung pte_mkyoung 418 419#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT 420static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; } 421 422static inline pte_t pte_mkhuge(pte_t pte) 423{ 424 pte_val(pte) |= _PAGE_HUGE; 425 return pte; 426} 427#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ 428 429#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 430static inline bool pte_soft_dirty(pte_t pte) 431{ 432 return pte_val(pte) & _PAGE_SOFT_DIRTY; 433} 434#define pte_swp_soft_dirty pte_soft_dirty 435 436static inline pte_t pte_mksoft_dirty(pte_t pte) 437{ 438 pte_val(pte) |= _PAGE_SOFT_DIRTY; 439 return pte; 440} 441#define pte_swp_mksoft_dirty pte_mksoft_dirty 442 443static inline pte_t pte_clear_soft_dirty(pte_t pte) 444{ 445 pte_val(pte) &= ~(_PAGE_SOFT_DIRTY); 446 return pte; 447} 448#define pte_swp_clear_soft_dirty pte_clear_soft_dirty 449 450#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 451 452#endif 453 454/* 455 * Macro to make mark a page protection value as "uncacheable". Note 456 * that "protection" is really a misnomer here as the protection value 457 * contains the memory attribute bits, dirty bits, and various other 458 * bits as well. 459 */ 460#define pgprot_noncached pgprot_noncached 461 462static inline pgprot_t pgprot_noncached(pgprot_t _prot) 463{ 464 unsigned long prot = pgprot_val(_prot); 465 466 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; 467 468 return __pgprot(prot); 469} 470 471#define pgprot_writecombine pgprot_writecombine 472 473static inline pgprot_t pgprot_writecombine(pgprot_t _prot) 474{ 475 unsigned long prot = pgprot_val(_prot); 476 477 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */ 478 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine; 479 480 return __pgprot(prot); 481} 482 483static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma, 484 unsigned long address) 485{ 486} 487 488#define __HAVE_ARCH_PTE_SAME 489static inline int pte_same(pte_t pte_a, pte_t pte_b) 490{ 491 return pte_val(pte_a) == pte_val(pte_b); 492} 493 494#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 495static inline int ptep_set_access_flags(struct vm_area_struct *vma, 496 unsigned long address, pte_t *ptep, 497 pte_t entry, int dirty) 498{ 499 if (!pte_same(*ptep, entry)) 500 set_pte_at(vma->vm_mm, address, ptep, entry); 501 /* 502 * update_mmu_cache will unconditionally execute, handling both 503 * the case that the PTE changed and the spurious fault case. 504 */ 505 return true; 506} 507 508/* 509 * Conversion functions: convert a page and protection to a page entry, 510 * and a page entry and page directory to the page they refer to. 511 */ 512#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 513 514#if defined(CONFIG_XPA) 515static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 516{ 517 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK); 518 pte.pte_high &= (_PFN_MASK | _CACHE_MASK); 519 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK; 520 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK); 521 return pte; 522} 523#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 524static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 525{ 526 pte.pte_low &= _PAGE_CHG_MASK; 527 pte.pte_high &= (_PFN_MASK | _CACHE_MASK); 528 pte.pte_low |= pgprot_val(newprot); 529 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK); 530 return pte; 531} 532#else 533static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 534{ 535 pte_val(pte) &= _PAGE_CHG_MASK; 536 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK; 537 if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ)) 538 pte_val(pte) |= _PAGE_SILENT_READ; 539 return pte; 540} 541#endif 542 543 544extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, 545 pte_t pte); 546 547static inline void update_mmu_cache(struct vm_area_struct *vma, 548 unsigned long address, pte_t *ptep) 549{ 550 pte_t pte = *ptep; 551 __update_tlb(vma, address, pte); 552} 553 554#define __HAVE_ARCH_UPDATE_MMU_TLB 555#define update_mmu_tlb update_mmu_cache 556 557static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 558 unsigned long address, pmd_t *pmdp) 559{ 560 pte_t pte = *(pte_t *)pmdp; 561 562 __update_tlb(vma, address, pte); 563} 564 565#define kern_addr_valid(addr) (1) 566 567/* 568 * Allow physical addresses to be fixed up to help 36-bit peripherals. 569 */ 570#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR 571phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size); 572int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr, 573 unsigned long pfn, unsigned long size, pgprot_t prot); 574#define io_remap_pfn_range io_remap_pfn_range 575#else 576#define fixup_bigphys_addr(addr, size) (addr) 577#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */ 578 579#ifdef CONFIG_TRANSPARENT_HUGEPAGE 580 581/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/ 582#define pmdp_establish generic_pmdp_establish 583 584#define has_transparent_hugepage has_transparent_hugepage 585extern int has_transparent_hugepage(void); 586 587static inline int pmd_trans_huge(pmd_t pmd) 588{ 589 return !!(pmd_val(pmd) & _PAGE_HUGE); 590} 591 592static inline pmd_t pmd_mkhuge(pmd_t pmd) 593{ 594 pmd_val(pmd) |= _PAGE_HUGE; 595 596 return pmd; 597} 598 599extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, 600 pmd_t *pmdp, pmd_t pmd); 601 602#define pmd_write pmd_write 603static inline int pmd_write(pmd_t pmd) 604{ 605 return !!(pmd_val(pmd) & _PAGE_WRITE); 606} 607 608static inline pmd_t pmd_wrprotect(pmd_t pmd) 609{ 610 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 611 return pmd; 612} 613 614static inline pmd_t pmd_mkwrite(pmd_t pmd) 615{ 616 pmd_val(pmd) |= _PAGE_WRITE; 617 if (pmd_val(pmd) & _PAGE_MODIFIED) 618 pmd_val(pmd) |= _PAGE_SILENT_WRITE; 619 620 return pmd; 621} 622 623static inline int pmd_dirty(pmd_t pmd) 624{ 625 return !!(pmd_val(pmd) & _PAGE_MODIFIED); 626} 627 628static inline pmd_t pmd_mkclean(pmd_t pmd) 629{ 630 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); 631 return pmd; 632} 633 634static inline pmd_t pmd_mkdirty(pmd_t pmd) 635{ 636 pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY; 637 if (pmd_val(pmd) & _PAGE_WRITE) 638 pmd_val(pmd) |= _PAGE_SILENT_WRITE; 639 640 return pmd; 641} 642 643static inline int pmd_young(pmd_t pmd) 644{ 645 return !!(pmd_val(pmd) & _PAGE_ACCESSED); 646} 647 648static inline pmd_t pmd_mkold(pmd_t pmd) 649{ 650 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); 651 652 return pmd; 653} 654 655static inline pmd_t pmd_mkyoung(pmd_t pmd) 656{ 657 pmd_val(pmd) |= _PAGE_ACCESSED; 658 659 if (!(pmd_val(pmd) & _PAGE_NO_READ)) 660 pmd_val(pmd) |= _PAGE_SILENT_READ; 661 662 return pmd; 663} 664 665#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 666static inline int pmd_soft_dirty(pmd_t pmd) 667{ 668 return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY); 669} 670 671static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 672{ 673 pmd_val(pmd) |= _PAGE_SOFT_DIRTY; 674 return pmd; 675} 676 677static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 678{ 679 pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY); 680 return pmd; 681} 682 683#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 684 685/* Extern to avoid header file madness */ 686extern pmd_t mk_pmd(struct page *page, pgprot_t prot); 687 688static inline unsigned long pmd_pfn(pmd_t pmd) 689{ 690 return pmd_val(pmd) >> _PFN_SHIFT; 691} 692 693static inline struct page *pmd_page(pmd_t pmd) 694{ 695 if (pmd_trans_huge(pmd)) 696 return pfn_to_page(pmd_pfn(pmd)); 697 698 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT); 699} 700 701static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 702{ 703 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) | 704 (pgprot_val(newprot) & ~_PAGE_CHG_MASK); 705 return pmd; 706} 707 708static inline pmd_t pmd_mkinvalid(pmd_t pmd) 709{ 710 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY); 711 712 return pmd; 713} 714 715/* 716 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a 717 * different prototype. 718 */ 719#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 720static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 721 unsigned long address, pmd_t *pmdp) 722{ 723 pmd_t old = *pmdp; 724 725 pmd_clear(pmdp); 726 727 return old; 728} 729 730#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 731 732#ifdef _PAGE_HUGE 733#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0) 734#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0) 735#endif 736 737#define gup_fast_permitted(start, end) (!cpu_has_dc_aliases) 738 739/* 740 * We provide our own get_unmapped area to cope with the virtual aliasing 741 * constraints placed on us by the cache architecture. 742 */ 743#define HAVE_ARCH_UNMAPPED_AREA 744#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 745 746#endif /* _ASM_PGTABLE_H */