Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2
3#include <linux/amba/clcd-regs.h>
4#include <linux/bitops.h>
5#include <linux/device.h>
6#include <linux/mfd/syscon.h>
7#include <linux/module.h>
8#include <linux/of.h>
9#include <linux/of_platform.h>
10#include <linux/regmap.h>
11#include <linux/vexpress.h>
12
13#include "pl111_versatile.h"
14#include "pl111_drm.h"
15
16static struct regmap *versatile_syscon_map;
17
18/*
19 * We detect the different syscon types from the compatible strings.
20 */
21enum versatile_clcd {
22 INTEGRATOR_IMPD1,
23 INTEGRATOR_CLCD_CM,
24 VERSATILE_CLCD,
25 REALVIEW_CLCD_EB,
26 REALVIEW_CLCD_PB1176,
27 REALVIEW_CLCD_PB11MP,
28 REALVIEW_CLCD_PBA8,
29 REALVIEW_CLCD_PBX,
30 VEXPRESS_CLCD_V2M,
31};
32
33static const struct of_device_id versatile_clcd_of_match[] = {
34 {
35 .compatible = "arm,core-module-integrator",
36 .data = (void *)INTEGRATOR_CLCD_CM,
37 },
38 {
39 .compatible = "arm,versatile-sysreg",
40 .data = (void *)VERSATILE_CLCD,
41 },
42 {
43 .compatible = "arm,realview-eb-syscon",
44 .data = (void *)REALVIEW_CLCD_EB,
45 },
46 {
47 .compatible = "arm,realview-pb1176-syscon",
48 .data = (void *)REALVIEW_CLCD_PB1176,
49 },
50 {
51 .compatible = "arm,realview-pb11mp-syscon",
52 .data = (void *)REALVIEW_CLCD_PB11MP,
53 },
54 {
55 .compatible = "arm,realview-pba8-syscon",
56 .data = (void *)REALVIEW_CLCD_PBA8,
57 },
58 {
59 .compatible = "arm,realview-pbx-syscon",
60 .data = (void *)REALVIEW_CLCD_PBX,
61 },
62 {
63 .compatible = "arm,vexpress-muxfpga",
64 .data = (void *)VEXPRESS_CLCD_V2M,
65 },
66 {},
67};
68
69static const struct of_device_id impd1_clcd_of_match[] = {
70 {
71 .compatible = "arm,im-pd1-syscon",
72 .data = (void *)INTEGRATOR_IMPD1,
73 },
74 {},
75};
76
77/*
78 * Core module CLCD control on the Integrator/CP, bits
79 * 8 thru 19 of the CM_CONTROL register controls a bunch
80 * of CLCD settings.
81 */
82#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C
83#define INTEGRATOR_CLCD_LCDBIASEN BIT(8)
84#define INTEGRATOR_CLCD_LCDBIASUP BIT(9)
85#define INTEGRATOR_CLCD_LCDBIASDN BIT(10)
86/* Bits 11,12,13 controls the LCD or VGA bridge type */
87#define INTEGRATOR_CLCD_LCDMUX_LCD24 BIT(11)
88#define INTEGRATOR_CLCD_LCDMUX_SHARP (BIT(11)|BIT(12))
89#define INTEGRATOR_CLCD_LCDMUX_VGA555 BIT(13)
90#define INTEGRATOR_CLCD_LCDMUX_VGA24 (BIT(11)|BIT(12)|BIT(13))
91#define INTEGRATOR_CLCD_LCD0_EN BIT(14)
92#define INTEGRATOR_CLCD_LCD1_EN BIT(15)
93/* R/L flip on Sharp */
94#define INTEGRATOR_CLCD_LCD_STATIC1 BIT(16)
95/* U/D flip on Sharp */
96#define INTEGRATOR_CLCD_LCD_STATIC2 BIT(17)
97/* No connection on Sharp */
98#define INTEGRATOR_CLCD_LCD_STATIC BIT(18)
99/* 0 = 24bit VGA, 1 = 18bit VGA */
100#define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19)
101
102#define INTEGRATOR_CLCD_MASK GENMASK(19, 8)
103
104static void pl111_integrator_enable(struct drm_device *drm, u32 format)
105{
106 u32 val;
107
108 dev_info(drm->dev, "enable Integrator CLCD connectors\n");
109
110 /* FIXME: really needed? */
111 val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 |
112 INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN;
113
114 switch (format) {
115 case DRM_FORMAT_XBGR8888:
116 case DRM_FORMAT_XRGB8888:
117 /* 24bit formats */
118 val |= INTEGRATOR_CLCD_LCDMUX_VGA24;
119 break;
120 case DRM_FORMAT_XBGR1555:
121 case DRM_FORMAT_XRGB1555:
122 /* Pseudocolor, RGB555, BGR555 */
123 val |= INTEGRATOR_CLCD_LCDMUX_VGA555;
124 break;
125 default:
126 dev_err(drm->dev, "unhandled format on Integrator 0x%08x\n",
127 format);
128 break;
129 }
130
131 regmap_update_bits(versatile_syscon_map,
132 INTEGRATOR_HDR_CTRL_OFFSET,
133 INTEGRATOR_CLCD_MASK,
134 val);
135}
136
137#define IMPD1_CTRL_OFFSET 0x18
138#define IMPD1_CTRL_DISP_LCD (0 << 0)
139#define IMPD1_CTRL_DISP_VGA (1 << 0)
140#define IMPD1_CTRL_DISP_LCD1 (2 << 0)
141#define IMPD1_CTRL_DISP_ENABLE (1 << 2)
142#define IMPD1_CTRL_DISP_MASK (7 << 0)
143
144static void pl111_impd1_enable(struct drm_device *drm, u32 format)
145{
146 u32 val;
147
148 dev_info(drm->dev, "enable IM-PD1 CLCD connectors\n");
149 val = IMPD1_CTRL_DISP_VGA | IMPD1_CTRL_DISP_ENABLE;
150
151 regmap_update_bits(versatile_syscon_map,
152 IMPD1_CTRL_OFFSET,
153 IMPD1_CTRL_DISP_MASK,
154 val);
155}
156
157static void pl111_impd1_disable(struct drm_device *drm)
158{
159 dev_info(drm->dev, "disable IM-PD1 CLCD connectors\n");
160
161 regmap_update_bits(versatile_syscon_map,
162 IMPD1_CTRL_OFFSET,
163 IMPD1_CTRL_DISP_MASK,
164 0);
165}
166
167/*
168 * This configuration register in the Versatile and RealView
169 * family is uniformly present but appears more and more
170 * unutilized starting with the RealView series.
171 */
172#define SYS_CLCD 0x50
173#define SYS_CLCD_MODE_MASK (BIT(0)|BIT(1))
174#define SYS_CLCD_MODE_888 0
175#define SYS_CLCD_MODE_5551 BIT(0)
176#define SYS_CLCD_MODE_565_R_LSB BIT(1)
177#define SYS_CLCD_MODE_565_B_LSB (BIT(0)|BIT(1))
178#define SYS_CLCD_CONNECTOR_MASK (BIT(2)|BIT(3)|BIT(4)|BIT(5))
179#define SYS_CLCD_NLCDIOON BIT(2)
180#define SYS_CLCD_VDDPOSSWITCH BIT(3)
181#define SYS_CLCD_PWR3V5SWITCH BIT(4)
182#define SYS_CLCD_VDDNEGSWITCH BIT(5)
183
184static void pl111_versatile_disable(struct drm_device *drm)
185{
186 dev_info(drm->dev, "disable Versatile CLCD connectors\n");
187 regmap_update_bits(versatile_syscon_map,
188 SYS_CLCD,
189 SYS_CLCD_CONNECTOR_MASK,
190 0);
191}
192
193static void pl111_versatile_enable(struct drm_device *drm, u32 format)
194{
195 u32 val = 0;
196
197 dev_info(drm->dev, "enable Versatile CLCD connectors\n");
198
199 switch (format) {
200 case DRM_FORMAT_ABGR8888:
201 case DRM_FORMAT_XBGR8888:
202 case DRM_FORMAT_ARGB8888:
203 case DRM_FORMAT_XRGB8888:
204 val |= SYS_CLCD_MODE_888;
205 break;
206 case DRM_FORMAT_BGR565:
207 val |= SYS_CLCD_MODE_565_R_LSB;
208 break;
209 case DRM_FORMAT_RGB565:
210 val |= SYS_CLCD_MODE_565_B_LSB;
211 break;
212 case DRM_FORMAT_ABGR1555:
213 case DRM_FORMAT_XBGR1555:
214 case DRM_FORMAT_ARGB1555:
215 case DRM_FORMAT_XRGB1555:
216 val |= SYS_CLCD_MODE_5551;
217 break;
218 default:
219 dev_err(drm->dev, "unhandled format on Versatile 0x%08x\n",
220 format);
221 break;
222 }
223
224 /* Set up the MUX */
225 regmap_update_bits(versatile_syscon_map,
226 SYS_CLCD,
227 SYS_CLCD_MODE_MASK,
228 val);
229
230 /* Then enable the display */
231 regmap_update_bits(versatile_syscon_map,
232 SYS_CLCD,
233 SYS_CLCD_CONNECTOR_MASK,
234 SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
235}
236
237static void pl111_realview_clcd_disable(struct drm_device *drm)
238{
239 dev_info(drm->dev, "disable RealView CLCD connectors\n");
240 regmap_update_bits(versatile_syscon_map,
241 SYS_CLCD,
242 SYS_CLCD_CONNECTOR_MASK,
243 0);
244}
245
246static void pl111_realview_clcd_enable(struct drm_device *drm, u32 format)
247{
248 dev_info(drm->dev, "enable RealView CLCD connectors\n");
249 regmap_update_bits(versatile_syscon_map,
250 SYS_CLCD,
251 SYS_CLCD_CONNECTOR_MASK,
252 SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
253}
254
255/* PL110 pixel formats for Integrator, vanilla PL110 */
256static const u32 pl110_integrator_pixel_formats[] = {
257 DRM_FORMAT_ABGR8888,
258 DRM_FORMAT_XBGR8888,
259 DRM_FORMAT_ARGB8888,
260 DRM_FORMAT_XRGB8888,
261 DRM_FORMAT_ABGR1555,
262 DRM_FORMAT_XBGR1555,
263 DRM_FORMAT_ARGB1555,
264 DRM_FORMAT_XRGB1555,
265};
266
267/* Extended PL110 pixel formats for Integrator and Versatile */
268static const u32 pl110_versatile_pixel_formats[] = {
269 DRM_FORMAT_ABGR8888,
270 DRM_FORMAT_XBGR8888,
271 DRM_FORMAT_ARGB8888,
272 DRM_FORMAT_XRGB8888,
273 DRM_FORMAT_BGR565, /* Uses external PLD */
274 DRM_FORMAT_RGB565, /* Uses external PLD */
275 DRM_FORMAT_ABGR1555,
276 DRM_FORMAT_XBGR1555,
277 DRM_FORMAT_ARGB1555,
278 DRM_FORMAT_XRGB1555,
279};
280
281static const u32 pl111_realview_pixel_formats[] = {
282 DRM_FORMAT_ABGR8888,
283 DRM_FORMAT_XBGR8888,
284 DRM_FORMAT_ARGB8888,
285 DRM_FORMAT_XRGB8888,
286 DRM_FORMAT_BGR565,
287 DRM_FORMAT_RGB565,
288 DRM_FORMAT_ABGR1555,
289 DRM_FORMAT_XBGR1555,
290 DRM_FORMAT_ARGB1555,
291 DRM_FORMAT_XRGB1555,
292 DRM_FORMAT_ABGR4444,
293 DRM_FORMAT_XBGR4444,
294 DRM_FORMAT_ARGB4444,
295 DRM_FORMAT_XRGB4444,
296};
297
298/*
299 * The Integrator variant is a PL110 with a bunch of broken, or not
300 * yet implemented features
301 */
302static const struct pl111_variant_data pl110_integrator = {
303 .name = "PL110 Integrator",
304 .is_pl110 = true,
305 .broken_clockdivider = true,
306 .broken_vblank = true,
307 .formats = pl110_integrator_pixel_formats,
308 .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
309 .fb_bpp = 16,
310};
311
312/*
313 * The IM-PD1 variant is a PL110 with a bunch of broken, or not
314 * yet implemented features
315 */
316static const struct pl111_variant_data pl110_impd1 = {
317 .name = "PL110 IM-PD1",
318 .is_pl110 = true,
319 .broken_clockdivider = true,
320 .broken_vblank = true,
321 .formats = pl110_integrator_pixel_formats,
322 .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
323 .fb_bpp = 16,
324};
325
326/*
327 * This is the in-between PL110 variant found in the ARM Versatile,
328 * supporting RGB565/BGR565
329 */
330static const struct pl111_variant_data pl110_versatile = {
331 .name = "PL110 Versatile",
332 .is_pl110 = true,
333 .external_bgr = true,
334 .formats = pl110_versatile_pixel_formats,
335 .nformats = ARRAY_SIZE(pl110_versatile_pixel_formats),
336 .fb_bpp = 16,
337};
338
339/*
340 * RealView PL111 variant, the only real difference from the vanilla
341 * PL111 is that we select 16bpp framebuffer by default to be able
342 * to get 1024x768 without saturating the memory bus.
343 */
344static const struct pl111_variant_data pl111_realview = {
345 .name = "PL111 RealView",
346 .formats = pl111_realview_pixel_formats,
347 .nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
348 .fb_bpp = 16,
349};
350
351/*
352 * Versatile Express PL111 variant, again we just push the maximum
353 * BPP to 16 to be able to get 1024x768 without saturating the memory
354 * bus. The clockdivider also seems broken on the Versatile Express.
355 */
356static const struct pl111_variant_data pl111_vexpress = {
357 .name = "PL111 Versatile Express",
358 .formats = pl111_realview_pixel_formats,
359 .nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
360 .fb_bpp = 16,
361 .broken_clockdivider = true,
362};
363
364#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00
365#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01
366#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02
367
368static int pl111_vexpress_clcd_init(struct device *dev, struct device_node *np,
369 struct pl111_drm_dev_private *priv)
370{
371 struct platform_device *pdev;
372 struct device_node *root;
373 struct device_node *child;
374 struct device_node *ct_clcd = NULL;
375 struct regmap *map;
376 bool has_coretile_clcd = false;
377 bool has_coretile_hdlcd = false;
378 bool mux_motherboard = true;
379 u32 val;
380 int ret;
381
382 if (!IS_ENABLED(CONFIG_VEXPRESS_CONFIG))
383 return -ENODEV;
384
385 /*
386 * Check if we have a CLCD or HDLCD on the core tile by checking if a
387 * CLCD or HDLCD is available in the root of the device tree.
388 */
389 root = of_find_node_by_path("/");
390 if (!root)
391 return -EINVAL;
392
393 for_each_available_child_of_node(root, child) {
394 if (of_device_is_compatible(child, "arm,pl111")) {
395 has_coretile_clcd = true;
396 ct_clcd = child;
397 break;
398 }
399 if (of_device_is_compatible(child, "arm,hdlcd")) {
400 has_coretile_hdlcd = true;
401 of_node_put(child);
402 break;
403 }
404 }
405
406 of_node_put(root);
407
408 /*
409 * If there is a coretile HDLCD and it has a driver,
410 * do not mux the CLCD on the motherboard to the DVI.
411 */
412 if (has_coretile_hdlcd && IS_ENABLED(CONFIG_DRM_HDLCD))
413 mux_motherboard = false;
414
415 /*
416 * On the Vexpress CA9 we let the CLCD on the coretile
417 * take precedence, so also in this case do not mux the
418 * motherboard to the DVI.
419 */
420 if (has_coretile_clcd)
421 mux_motherboard = false;
422
423 if (mux_motherboard) {
424 dev_info(dev, "DVI muxed to motherboard CLCD\n");
425 val = VEXPRESS_FPGAMUX_MOTHERBOARD;
426 } else if (ct_clcd == dev->of_node) {
427 dev_info(dev,
428 "DVI muxed to daughterboard 1 (core tile) CLCD\n");
429 val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1;
430 } else {
431 dev_info(dev, "core tile graphics present\n");
432 dev_info(dev, "this device will be deactivated\n");
433 return -ENODEV;
434 }
435
436 /* Call into deep Vexpress configuration API */
437 pdev = of_find_device_by_node(np);
438 if (!pdev) {
439 dev_err(dev, "can't find the sysreg device, deferring\n");
440 return -EPROBE_DEFER;
441 }
442
443 map = devm_regmap_init_vexpress_config(&pdev->dev);
444 if (IS_ERR(map)) {
445 platform_device_put(pdev);
446 return PTR_ERR(map);
447 }
448
449 ret = regmap_write(map, 0, val);
450 platform_device_put(pdev);
451 if (ret) {
452 dev_err(dev, "error setting DVI muxmode\n");
453 return -ENODEV;
454 }
455
456 priv->variant = &pl111_vexpress;
457 dev_info(dev, "initializing Versatile Express PL111\n");
458
459 return 0;
460}
461
462int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv)
463{
464 const struct of_device_id *clcd_id;
465 enum versatile_clcd versatile_clcd_type;
466 struct device_node *np;
467 struct regmap *map;
468
469 np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match,
470 &clcd_id);
471 if (!np) {
472 /* Non-ARM reference designs, just bail out */
473 return 0;
474 }
475
476 versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
477
478 /* Versatile Express special handling */
479 if (versatile_clcd_type == VEXPRESS_CLCD_V2M) {
480 int ret = pl111_vexpress_clcd_init(dev, np, priv);
481 of_node_put(np);
482 if (ret)
483 dev_err(dev, "Versatile Express init failed - %d", ret);
484 return ret;
485 }
486
487 /*
488 * On the Integrator, check if we should use the IM-PD1 instead,
489 * if we find it, it will take precedence. This is on the Integrator/AP
490 * which only has this option for PL110 graphics.
491 */
492 if (versatile_clcd_type == INTEGRATOR_CLCD_CM) {
493 np = of_find_matching_node_and_match(NULL, impd1_clcd_of_match,
494 &clcd_id);
495 if (np)
496 versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
497 }
498
499 map = syscon_node_to_regmap(np);
500 of_node_put(np);
501 if (IS_ERR(map)) {
502 dev_err(dev, "no Versatile syscon regmap\n");
503 return PTR_ERR(map);
504 }
505
506 switch (versatile_clcd_type) {
507 case INTEGRATOR_CLCD_CM:
508 versatile_syscon_map = map;
509 priv->variant = &pl110_integrator;
510 priv->variant_display_enable = pl111_integrator_enable;
511 dev_info(dev, "set up callbacks for Integrator PL110\n");
512 break;
513 case INTEGRATOR_IMPD1:
514 versatile_syscon_map = map;
515 priv->variant = &pl110_impd1;
516 priv->variant_display_enable = pl111_impd1_enable;
517 priv->variant_display_disable = pl111_impd1_disable;
518 dev_info(dev, "set up callbacks for IM-PD1 PL110\n");
519 break;
520 case VERSATILE_CLCD:
521 versatile_syscon_map = map;
522 /* This can do RGB565 with external PLD */
523 priv->variant = &pl110_versatile;
524 priv->variant_display_enable = pl111_versatile_enable;
525 priv->variant_display_disable = pl111_versatile_disable;
526 /*
527 * The Versatile has a variant halfway between PL110
528 * and PL111 where these two registers have already been
529 * swapped.
530 */
531 priv->ienb = CLCD_PL111_IENB;
532 priv->ctrl = CLCD_PL111_CNTL;
533 dev_info(dev, "set up callbacks for Versatile PL110\n");
534 break;
535 case REALVIEW_CLCD_EB:
536 case REALVIEW_CLCD_PB1176:
537 case REALVIEW_CLCD_PB11MP:
538 case REALVIEW_CLCD_PBA8:
539 case REALVIEW_CLCD_PBX:
540 versatile_syscon_map = map;
541 priv->variant = &pl111_realview;
542 priv->variant_display_enable = pl111_realview_clcd_enable;
543 priv->variant_display_disable = pl111_realview_clcd_disable;
544 dev_info(dev, "set up callbacks for RealView PL111\n");
545 break;
546 default:
547 dev_info(dev, "unknown Versatile system controller\n");
548 break;
549 }
550
551 return 0;
552}
553EXPORT_SYMBOL_GPL(pl111_versatile_init);