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1/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 *
8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 */
10
11#ifndef __SOUND_SOC_SOF_PRIV_H
12#define __SOUND_SOC_SOF_PRIV_H
13
14#include <linux/device.h>
15#include <sound/hdaudio.h>
16#include <sound/sof.h>
17#include <sound/sof/info.h>
18#include <sound/sof/pm.h>
19#include <sound/sof/trace.h>
20#include <uapi/sound/sof/fw.h>
21
22/* debug flags */
23#define SOF_DBG_ENABLE_TRACE BIT(0)
24#define SOF_DBG_REGS BIT(1)
25#define SOF_DBG_MBOX BIT(2)
26#define SOF_DBG_TEXT BIT(3)
27#define SOF_DBG_PCI BIT(4)
28#define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */
29
30/* global debug state set by SOF_DBG_ flags */
31extern int sof_core_debug;
32
33/* max BARs mmaped devices can use */
34#define SND_SOF_BARS 8
35
36/* time in ms for runtime suspend delay */
37#define SND_SOF_SUSPEND_DELAY_MS 2000
38
39/* DMA buffer size for trace */
40#define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
41
42#define SOF_IPC_DSP_REPLY 0
43#define SOF_IPC_HOST_REPLY 1
44
45/* convenience constructor for DAI driver streams */
46#define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
47 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
48 .rates = srates, .formats = sfmt}
49
50#define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
51 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
52
53#define ENABLE_DEBUGFS_CACHEBUF \
54 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
55 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
56
57/* DSP power state */
58enum sof_dsp_power_states {
59 SOF_DSP_PM_D0,
60 SOF_DSP_PM_D1,
61 SOF_DSP_PM_D2,
62 SOF_DSP_PM_D3_HOT,
63 SOF_DSP_PM_D3,
64 SOF_DSP_PM_D3_COLD,
65};
66
67struct sof_dsp_power_state {
68 u32 state;
69 u32 substate; /* platform-specific */
70};
71
72/* System suspend target state */
73enum sof_system_suspend_state {
74 SOF_SUSPEND_NONE = 0,
75 SOF_SUSPEND_S0IX,
76 SOF_SUSPEND_S3,
77};
78
79struct snd_sof_dev;
80struct snd_sof_ipc_msg;
81struct snd_sof_ipc;
82struct snd_sof_debugfs_map;
83struct snd_soc_tplg_ops;
84struct snd_soc_component;
85struct snd_sof_pdata;
86
87/*
88 * SOF DSP HW abstraction operations.
89 * Used to abstract DSP HW architecture and any IO busses between host CPU
90 * and DSP device(s).
91 */
92struct snd_sof_dsp_ops {
93
94 /* probe and remove */
95 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
96 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
97
98 /* DSP core boot / reset */
99 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
100 int (*stall)(struct snd_sof_dev *sof_dev); /* optional */
101 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
102 int (*core_power_up)(struct snd_sof_dev *sof_dev,
103 unsigned int core_mask); /* optional */
104 int (*core_power_down)(struct snd_sof_dev *sof_dev,
105 unsigned int core_mask); /* optional */
106
107 /*
108 * Register IO: only used by respective drivers themselves,
109 * TODO: consider removing these operations and calling respective
110 * implementations directly
111 */
112 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
113 u32 value); /* optional */
114 u32 (*read)(struct snd_sof_dev *sof_dev,
115 void __iomem *addr); /* optional */
116 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
117 u64 value); /* optional */
118 u64 (*read64)(struct snd_sof_dev *sof_dev,
119 void __iomem *addr); /* optional */
120
121 /* memcpy IO */
122 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar,
123 u32 offset, void *dest,
124 size_t size); /* mandatory */
125 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar,
126 u32 offset, void *src,
127 size_t size); /* mandatory */
128
129 /* doorbell */
130 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
131 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
132
133 /* ipc */
134 int (*send_msg)(struct snd_sof_dev *sof_dev,
135 struct snd_sof_ipc_msg *msg); /* mandatory */
136
137 /* FW loading */
138 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
139 int (*load_module)(struct snd_sof_dev *sof_dev,
140 struct snd_sof_mod_hdr *hdr); /* optional */
141 /*
142 * FW ready checks for ABI compatibility and creates
143 * memory windows at first boot
144 */
145 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
146
147 /* connect pcm substream to a host stream */
148 int (*pcm_open)(struct snd_sof_dev *sdev,
149 struct snd_pcm_substream *substream); /* optional */
150 /* disconnect pcm substream to a host stream */
151 int (*pcm_close)(struct snd_sof_dev *sdev,
152 struct snd_pcm_substream *substream); /* optional */
153
154 /* host stream hw params */
155 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
156 struct snd_pcm_substream *substream,
157 struct snd_pcm_hw_params *params,
158 struct sof_ipc_stream_params *ipc_params); /* optional */
159
160 /* host stream hw_free */
161 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
162 struct snd_pcm_substream *substream); /* optional */
163
164 /* host stream trigger */
165 int (*pcm_trigger)(struct snd_sof_dev *sdev,
166 struct snd_pcm_substream *substream,
167 int cmd); /* optional */
168
169 /* host stream pointer */
170 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
171 struct snd_pcm_substream *substream); /* optional */
172
173#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
174 /* Except for probe_pointer, all probe ops are mandatory */
175 int (*probe_assign)(struct snd_sof_dev *sdev,
176 struct snd_compr_stream *cstream,
177 struct snd_soc_dai *dai); /* mandatory */
178 int (*probe_free)(struct snd_sof_dev *sdev,
179 struct snd_compr_stream *cstream,
180 struct snd_soc_dai *dai); /* mandatory */
181 int (*probe_set_params)(struct snd_sof_dev *sdev,
182 struct snd_compr_stream *cstream,
183 struct snd_compr_params *params,
184 struct snd_soc_dai *dai); /* mandatory */
185 int (*probe_trigger)(struct snd_sof_dev *sdev,
186 struct snd_compr_stream *cstream, int cmd,
187 struct snd_soc_dai *dai); /* mandatory */
188 int (*probe_pointer)(struct snd_sof_dev *sdev,
189 struct snd_compr_stream *cstream,
190 struct snd_compr_tstamp *tstamp,
191 struct snd_soc_dai *dai); /* optional */
192#endif
193
194 /* host read DSP stream data */
195 void (*ipc_msg_data)(struct snd_sof_dev *sdev,
196 struct snd_pcm_substream *substream,
197 void *p, size_t sz); /* mandatory */
198
199 /* host configure DSP HW parameters */
200 int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
201 struct snd_pcm_substream *substream,
202 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
203
204 /* pre/post firmware run */
205 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
206 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
207
208 /* DSP PM */
209 int (*suspend)(struct snd_sof_dev *sof_dev,
210 u32 target_state); /* optional */
211 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
212 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
213 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
214 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
215 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
216 int (*set_power_state)(struct snd_sof_dev *sdev,
217 const struct sof_dsp_power_state *target_state); /* optional */
218
219 /* DSP clocking */
220 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
221
222 /* debug */
223 const struct snd_sof_debugfs_map *debug_map; /* optional */
224 int debug_map_count; /* optional */
225 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
226 u32 flags); /* optional */
227 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
228
229 /* host DMA trace initialization */
230 int (*trace_init)(struct snd_sof_dev *sdev,
231 u32 *stream_tag); /* optional */
232 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
233 int (*trace_trigger)(struct snd_sof_dev *sdev,
234 int cmd); /* optional */
235
236 /* misc */
237 int (*get_bar_index)(struct snd_sof_dev *sdev,
238 u32 type); /* optional */
239 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
240 int (*get_window_offset)(struct snd_sof_dev *sdev,
241 u32 id);/* mandatory for common loader code */
242
243 /* machine driver ops */
244 int (*machine_register)(struct snd_sof_dev *sdev,
245 void *pdata); /* optional */
246 void (*machine_unregister)(struct snd_sof_dev *sdev,
247 void *pdata); /* optional */
248 void (*machine_select)(struct snd_sof_dev *sdev); /* optional */
249 void (*set_mach_params)(const struct snd_soc_acpi_mach *mach,
250 struct device *dev); /* optional */
251
252 /* DAI ops */
253 struct snd_soc_dai_driver *drv;
254 int num_drv;
255
256 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
257 u32 hw_info;
258
259 const struct sof_arch_ops *arch_ops;
260};
261
262/* DSP architecture specific callbacks for oops and stack dumps */
263struct sof_arch_ops {
264 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops);
265 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops,
266 u32 *stack, u32 stack_words);
267};
268
269#define sof_arch_ops(sdev) ((sdev)->pdata->desc->ops->arch_ops)
270
271/* DSP device HW descriptor mapping between bus ID and ops */
272struct sof_ops_table {
273 const struct sof_dev_desc *desc;
274 const struct snd_sof_dsp_ops *ops;
275};
276
277enum sof_dfsentry_type {
278 SOF_DFSENTRY_TYPE_IOMEM = 0,
279 SOF_DFSENTRY_TYPE_BUF,
280};
281
282enum sof_debugfs_access_type {
283 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
284 SOF_DEBUGFS_ACCESS_D0_ONLY,
285};
286
287/* FS entry for debug files that can expose DSP memories, registers */
288struct snd_sof_dfsentry {
289 size_t size;
290 enum sof_dfsentry_type type;
291 /*
292 * access_type specifies if the
293 * memory -> DSP resource (memory, register etc) is always accessible
294 * or if it is accessible only when the DSP is in D0.
295 */
296 enum sof_debugfs_access_type access_type;
297#if ENABLE_DEBUGFS_CACHEBUF
298 char *cache_buf; /* buffer to cache the contents of debugfs memory */
299#endif
300 struct snd_sof_dev *sdev;
301 struct list_head list; /* list in sdev dfsentry list */
302 union {
303 void __iomem *io_mem;
304 void *buf;
305 };
306};
307
308/* Debug mapping for any DSP memory or registers that can used for debug */
309struct snd_sof_debugfs_map {
310 const char *name;
311 u32 bar;
312 u32 offset;
313 u32 size;
314 /*
315 * access_type specifies if the memory is always accessible
316 * or if it is accessible only when the DSP is in D0.
317 */
318 enum sof_debugfs_access_type access_type;
319};
320
321/* mailbox descriptor, used for host <-> DSP IPC */
322struct snd_sof_mailbox {
323 u32 offset;
324 size_t size;
325};
326
327/* IPC message descriptor for host <-> DSP IO */
328struct snd_sof_ipc_msg {
329 /* message data */
330 u32 header;
331 void *msg_data;
332 void *reply_data;
333 size_t msg_size;
334 size_t reply_size;
335 int reply_error;
336
337 wait_queue_head_t waitq;
338 bool ipc_complete;
339};
340
341enum snd_sof_fw_state {
342 SOF_FW_BOOT_NOT_STARTED = 0,
343 SOF_FW_BOOT_PREPARE,
344 SOF_FW_BOOT_IN_PROGRESS,
345 SOF_FW_BOOT_FAILED,
346 SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */
347 SOF_FW_BOOT_COMPLETE,
348};
349
350/*
351 * SOF Device Level.
352 */
353struct snd_sof_dev {
354 struct device *dev;
355 spinlock_t ipc_lock; /* lock for IPC users */
356 spinlock_t hw_lock; /* lock for HW IO access */
357
358 /*
359 * ASoC components. plat_drv fields are set dynamically so
360 * can't use const
361 */
362 struct snd_soc_component_driver plat_drv;
363
364 /* current DSP power state */
365 struct sof_dsp_power_state dsp_power_state;
366
367 /* Intended power target of system suspend */
368 enum sof_system_suspend_state system_suspend_target;
369
370 /* DSP firmware boot */
371 wait_queue_head_t boot_wait;
372 enum snd_sof_fw_state fw_state;
373 u32 first_boot;
374
375 /* work queue in case the probe is implemented in two steps */
376 struct work_struct probe_work;
377
378 /* DSP HW differentiation */
379 struct snd_sof_pdata *pdata;
380
381 /* IPC */
382 struct snd_sof_ipc *ipc;
383 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
384 struct snd_sof_mailbox host_box; /* Host initiated IPC */
385 struct snd_sof_mailbox stream_box; /* Stream position update */
386 struct snd_sof_ipc_msg *msg;
387 int ipc_irq;
388 u32 next_comp_id; /* monotonic - reset during S3 */
389
390 /* memory bases for mmaped DSPs - set by dsp_init() */
391 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
392 int mmio_bar;
393 int mailbox_bar;
394 size_t dsp_oops_offset;
395
396 /* debug */
397 struct dentry *debugfs_root;
398 struct list_head dfsentry_list;
399
400 /* firmware loader */
401 struct snd_dma_buffer dmab;
402 struct snd_dma_buffer dmab_bdl;
403 struct sof_ipc_fw_ready fw_ready;
404 struct sof_ipc_fw_version fw_version;
405 struct sof_ipc_cc_version *cc_version;
406
407 /* topology */
408 struct snd_soc_tplg_ops *tplg_ops;
409 struct list_head pcm_list;
410 struct list_head kcontrol_list;
411 struct list_head widget_list;
412 struct list_head dai_list;
413 struct list_head route_list;
414 struct snd_soc_component *component;
415 u32 enabled_cores_mask; /* keep track of enabled cores */
416
417 /* FW configuration */
418 struct sof_ipc_window *info_window;
419
420 /* IPC timeouts in ms */
421 int ipc_timeout;
422 int boot_timeout;
423
424#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
425 unsigned int extractor_stream_tag;
426#endif
427
428 /* DMA for Trace */
429 struct snd_dma_buffer dmatb;
430 struct snd_dma_buffer dmatp;
431 int dma_trace_pages;
432 wait_queue_head_t trace_sleep;
433 u32 host_offset;
434 u32 dtrace_is_supported; /* set with Kconfig or module parameter */
435 u32 dtrace_is_enabled;
436 u32 dtrace_error;
437 u32 dtrace_draining;
438
439 bool msi_enabled;
440
441 void *private; /* core does not touch this */
442};
443
444/*
445 * Device Level.
446 */
447
448int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
449int snd_sof_device_remove(struct device *dev);
450
451int snd_sof_runtime_suspend(struct device *dev);
452int snd_sof_runtime_resume(struct device *dev);
453int snd_sof_runtime_idle(struct device *dev);
454int snd_sof_resume(struct device *dev);
455int snd_sof_suspend(struct device *dev);
456int snd_sof_prepare(struct device *dev);
457void snd_sof_complete(struct device *dev);
458
459void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
460
461int snd_sof_create_page_table(struct device *dev,
462 struct snd_dma_buffer *dmab,
463 unsigned char *page_table, size_t size);
464
465/*
466 * Firmware loading.
467 */
468int snd_sof_load_firmware(struct snd_sof_dev *sdev);
469int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
470int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
471int snd_sof_run_firmware(struct snd_sof_dev *sdev);
472int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
473 struct snd_sof_mod_hdr *module);
474void snd_sof_fw_unload(struct snd_sof_dev *sdev);
475int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset);
476
477/*
478 * IPC low level APIs.
479 */
480struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
481void snd_sof_ipc_free(struct snd_sof_dev *sdev);
482int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
483void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
484int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
485 struct sof_ipc_pcm_params *params);
486int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
487 size_t dspbox_size, u32 hostbox,
488 size_t hostbox_size);
489int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
490int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
491 void *msg_data, size_t msg_bytes, void *reply_data,
492 size_t reply_bytes);
493int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
494 void *msg_data, size_t msg_bytes,
495 void *reply_data, size_t reply_bytes);
496
497/*
498 * Trace/debug
499 */
500int snd_sof_init_trace(struct snd_sof_dev *sdev);
501void snd_sof_release_trace(struct snd_sof_dev *sdev);
502void snd_sof_free_trace(struct snd_sof_dev *sdev);
503int snd_sof_dbg_init(struct snd_sof_dev *sdev);
504void snd_sof_free_debug(struct snd_sof_dev *sdev);
505int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev,
506 void __iomem *base, size_t size,
507 const char *name,
508 enum sof_debugfs_access_type access_type);
509int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
510 void *base, size_t size,
511 const char *name, mode_t mode);
512int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
513 struct sof_ipc_dma_trace_posn *posn);
514void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
515void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code,
516 u32 tracep_code, void *oops,
517 struct sof_ipc_panic_info *panic_info,
518 void *stack, size_t stack_words);
519int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
520void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
521
522/*
523 * Platform specific ops.
524 */
525extern struct snd_compr_ops sof_compressed_ops;
526
527/*
528 * DSP Architectures.
529 */
530static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
531 u32 stack_words)
532{
533 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words);
534}
535
536static inline void sof_oops(struct snd_sof_dev *sdev, void *oops)
537{
538 if (sof_arch_ops(sdev)->dsp_oops)
539 sof_arch_ops(sdev)->dsp_oops(sdev, oops);
540}
541
542extern const struct sof_arch_ops sof_xtensa_arch_ops;
543
544/*
545 * Utilities
546 */
547void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
548void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
549u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
550u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
551void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
552 void *message, size_t bytes);
553void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
554 void *message, size_t bytes);
555void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src,
556 size_t size);
557void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest,
558 size_t size);
559
560int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
561
562void intel_ipc_msg_data(struct snd_sof_dev *sdev,
563 struct snd_pcm_substream *substream,
564 void *p, size_t sz);
565int intel_ipc_pcm_params(struct snd_sof_dev *sdev,
566 struct snd_pcm_substream *substream,
567 const struct sof_ipc_pcm_params_reply *reply);
568
569int intel_pcm_open(struct snd_sof_dev *sdev,
570 struct snd_pcm_substream *substream);
571int intel_pcm_close(struct snd_sof_dev *sdev,
572 struct snd_pcm_substream *substream);
573
574int sof_machine_check(struct snd_sof_dev *sdev);
575
576#endif