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1/* SPDX-License-Identifier: GPL-2.0 */ 2// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. 3 4#ifndef __ASM_CSKY_PGTABLE_H 5#define __ASM_CSKY_PGTABLE_H 6 7#include <asm/fixmap.h> 8#include <asm/memory.h> 9#include <asm/addrspace.h> 10#include <abi/pgtable-bits.h> 11#include <asm-generic/pgtable-nopmd.h> 12 13#define PGDIR_SHIFT 22 14#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 15#define PGDIR_MASK (~(PGDIR_SIZE-1)) 16 17#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) 18#define FIRST_USER_ADDRESS 0UL 19 20/* 21 * C-SKY is two-level paging structure: 22 */ 23#define PGD_ORDER 0 24#define PTE_ORDER 0 25 26#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) 27#define PTRS_PER_PMD 1 28#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) 29 30#define pte_ERROR(e) \ 31 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low) 32#define pgd_ERROR(e) \ 33 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 34 35/* Find an entry in the third-level page table.. */ 36#define __pte_offset_t(address) \ 37 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 38#define pte_offset_kernel(dir, address) \ 39 (pmd_page_vaddr(*(dir)) + __pte_offset_t(address)) 40#define pte_offset_map(dir, address) \ 41 ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset_t(address)) 42#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) 43#define pte_clear(mm, addr, ptep) set_pte((ptep), \ 44 (((unsigned int) addr & PAGE_OFFSET) ? __pte(_PAGE_GLOBAL) : __pte(0))) 45#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) 46#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 47#define pte_pfn(x) ((unsigned long)((x).pte_low >> PAGE_SHIFT)) 48#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \ 49 | pgprot_val(prot)) 50 51#define __READABLE (_PAGE_READ | _PAGE_VALID | _PAGE_ACCESSED) 52#define __WRITEABLE (_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED) 53 54#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | \ 55 _CACHE_MASK) 56 57#define pte_unmap(pte) ((void)(pte)) 58 59#define __swp_type(x) (((x).val >> 4) & 0xff) 60#define __swp_offset(x) ((x).val >> 12) 61#define __swp_entry(type, offset) ((swp_entry_t) {((type) << 4) | \ 62 ((offset) << 12) }) 63#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 64#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 65 66#define pte_page(x) pfn_to_page(pte_pfn(x)) 67#define __mk_pte(page_nr, pgprot) __pte(((page_nr) << PAGE_SHIFT) | \ 68 pgprot_val(pgprot)) 69 70/* 71 * CSKY can't do page protection for execute, and considers that the same like 72 * read. Also, write permissions imply read permissions. This is the closest 73 * we can get by reasonable means.. 74 */ 75#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHED) 76#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ 77 _CACHE_CACHED) 78#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _CACHE_CACHED) 79#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _CACHE_CACHED) 80#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ 81 _PAGE_GLOBAL | _CACHE_CACHED) 82#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ 83 _CACHE_CACHED) 84 85#define _PAGE_IOREMAP \ 86 (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | \ 87 _CACHE_UNCACHED | _PAGE_SO) 88 89#define __P000 PAGE_NONE 90#define __P001 PAGE_READONLY 91#define __P010 PAGE_COPY 92#define __P011 PAGE_COPY 93#define __P100 PAGE_READONLY 94#define __P101 PAGE_READONLY 95#define __P110 PAGE_COPY 96#define __P111 PAGE_COPY 97 98#define __S000 PAGE_NONE 99#define __S001 PAGE_READONLY 100#define __S010 PAGE_SHARED 101#define __S011 PAGE_SHARED 102#define __S100 PAGE_READONLY 103#define __S101 PAGE_READONLY 104#define __S110 PAGE_SHARED 105#define __S111 PAGE_SHARED 106 107extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 108#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 109 110extern void load_pgd(unsigned long pg_dir); 111extern pte_t invalid_pte_table[PTRS_PER_PTE]; 112 113static inline void set_pte(pte_t *p, pte_t pte) 114{ 115 *p = pte; 116#if defined(CONFIG_CPU_NEED_TLBSYNC) 117 dcache_wb_line((u32)p); 118#endif 119 /* prevent out of order excution */ 120 smp_mb(); 121} 122#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) 123 124static inline pte_t *pmd_page_vaddr(pmd_t pmd) 125{ 126 unsigned long ptr; 127 128 ptr = pmd_val(pmd); 129 130 return __va(ptr); 131} 132 133#define pmd_phys(pmd) pmd_val(pmd) 134 135static inline void set_pmd(pmd_t *p, pmd_t pmd) 136{ 137 *p = pmd; 138#if defined(CONFIG_CPU_NEED_TLBSYNC) 139 dcache_wb_line((u32)p); 140#endif 141 /* prevent specul excute */ 142 smp_mb(); 143} 144 145 146static inline int pmd_none(pmd_t pmd) 147{ 148 return pmd_val(pmd) == __pa(invalid_pte_table); 149} 150 151#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) 152 153static inline int pmd_present(pmd_t pmd) 154{ 155 return (pmd_val(pmd) != __pa(invalid_pte_table)); 156} 157 158static inline void pmd_clear(pmd_t *p) 159{ 160 pmd_val(*p) = (__pa(invalid_pte_table)); 161#if defined(CONFIG_CPU_NEED_TLBSYNC) 162 dcache_wb_line((u32)p); 163#endif 164} 165 166/* 167 * The following only work if pte_present() is true. 168 * Undefined behaviour if not.. 169 */ 170static inline int pte_read(pte_t pte) 171{ 172 return pte.pte_low & _PAGE_READ; 173} 174 175static inline int pte_write(pte_t pte) 176{ 177 return (pte).pte_low & _PAGE_WRITE; 178} 179 180static inline int pte_dirty(pte_t pte) 181{ 182 return (pte).pte_low & _PAGE_MODIFIED; 183} 184 185static inline int pte_young(pte_t pte) 186{ 187 return (pte).pte_low & _PAGE_ACCESSED; 188} 189 190static inline pte_t pte_wrprotect(pte_t pte) 191{ 192 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_DIRTY); 193 return pte; 194} 195 196static inline pte_t pte_mkclean(pte_t pte) 197{ 198 pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_DIRTY); 199 return pte; 200} 201 202static inline pte_t pte_mkold(pte_t pte) 203{ 204 pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_VALID); 205 return pte; 206} 207 208static inline pte_t pte_mkwrite(pte_t pte) 209{ 210 pte_val(pte) |= _PAGE_WRITE; 211 if (pte_val(pte) & _PAGE_MODIFIED) 212 pte_val(pte) |= _PAGE_DIRTY; 213 return pte; 214} 215 216static inline pte_t pte_mkdirty(pte_t pte) 217{ 218 pte_val(pte) |= _PAGE_MODIFIED; 219 if (pte_val(pte) & _PAGE_WRITE) 220 pte_val(pte) |= _PAGE_DIRTY; 221 return pte; 222} 223 224static inline pte_t pte_mkyoung(pte_t pte) 225{ 226 pte_val(pte) |= _PAGE_ACCESSED; 227 if (pte_val(pte) & _PAGE_READ) 228 pte_val(pte) |= _PAGE_VALID; 229 return pte; 230} 231 232#define __pgd_offset(address) pgd_index(address) 233#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 234#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 235 236/* to find an entry in a kernel page-table-directory */ 237#define pgd_offset_k(address) pgd_offset(&init_mm, address) 238 239#define pgd_index(address) ((address) >> PGDIR_SHIFT) 240 241#define __HAVE_PHYS_MEM_ACCESS_PROT 242struct file; 243extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 244 unsigned long size, pgprot_t vma_prot); 245 246/* 247 * Macro to make mark a page protection value as "uncacheable". Note 248 * that "protection" is really a misnomer here as the protection value 249 * contains the memory attribute bits, dirty bits, and various other 250 * bits as well. 251 */ 252#define pgprot_noncached pgprot_noncached 253 254static inline pgprot_t pgprot_noncached(pgprot_t _prot) 255{ 256 unsigned long prot = pgprot_val(_prot); 257 258 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED | _PAGE_SO; 259 260 return __pgprot(prot); 261} 262 263#define pgprot_writecombine pgprot_writecombine 264static inline pgprot_t pgprot_writecombine(pgprot_t _prot) 265{ 266 unsigned long prot = pgprot_val(_prot); 267 268 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; 269 270 return __pgprot(prot); 271} 272 273/* 274 * Conversion functions: convert a page and protection to a page entry, 275 * and a page entry and page directory to the page they refer to. 276 */ 277#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 278static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 279{ 280 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | 281 (pgprot_val(newprot))); 282} 283 284/* to find an entry in a page-table-directory */ 285static inline pgd_t *pgd_offset(struct mm_struct *mm, unsigned long address) 286{ 287 return mm->pgd + pgd_index(address); 288} 289 290/* Find an entry in the third-level page table.. */ 291static inline pte_t *pte_offset(pmd_t *dir, unsigned long address) 292{ 293 return (pte_t *) (pmd_page_vaddr(*dir)) + 294 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); 295} 296 297extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 298extern void paging_init(void); 299 300void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, 301 pte_t *pte); 302 303/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 304#define kern_addr_valid(addr) (1) 305 306#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 307 remap_pfn_range(vma, vaddr, pfn, size, prot) 308 309#include <asm-generic/pgtable.h> 310 311#endif /* __ASM_CSKY_PGTABLE_H */