tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * linux/include/arm/hardware/it8152.h
4 *
5 * Copyright Compulab Ltd., 2006,2007
6 * Mike Rapoport <mike@compulab.co.il>
7 *
8 * ITE 8152 companion chip register definitions
9 */
10
11#ifndef __ASM_HARDWARE_IT8152_H
12#define __ASM_HARDWARE_IT8152_H
13
14#include <mach/irqs.h>
15
16extern void __iomem *it8152_base_address;
17
18#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
19#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)
20
21#define __REG_IT8152(x) (it8152_base_address + (x))
22
23#define IT8152_PCI_CFG_ADDR __REG_IT8152(0x3f00800)
24#define IT8152_PCI_CFG_DATA __REG_IT8152(0x3f00804)
25
26#define IT8152_INTC_LDCNIRR __REG_IT8152(0x3f00300)
27#define IT8152_INTC_LDPNIRR __REG_IT8152(0x3f00304)
28#define IT8152_INTC_LDCNIMR __REG_IT8152(0x3f00308)
29#define IT8152_INTC_LDPNIMR __REG_IT8152(0x3f0030C)
30#define IT8152_INTC_LDNITR __REG_IT8152(0x3f00310)
31#define IT8152_INTC_LDNIAR __REG_IT8152(0x3f00314)
32#define IT8152_INTC_LPCNIRR __REG_IT8152(0x3f00320)
33#define IT8152_INTC_LPPNIRR __REG_IT8152(0x3f00324)
34#define IT8152_INTC_LPCNIMR __REG_IT8152(0x3f00328)
35#define IT8152_INTC_LPPNIMR __REG_IT8152(0x3f0032C)
36#define IT8152_INTC_LPNITR __REG_IT8152(0x3f00330)
37#define IT8152_INTC_LPNIAR __REG_IT8152(0x3f00334)
38#define IT8152_INTC_PDCNIRR __REG_IT8152(0x3f00340)
39#define IT8152_INTC_PDPNIRR __REG_IT8152(0x3f00344)
40#define IT8152_INTC_PDCNIMR __REG_IT8152(0x3f00348)
41#define IT8152_INTC_PDPNIMR __REG_IT8152(0x3f0034C)
42#define IT8152_INTC_PDNITR __REG_IT8152(0x3f00350)
43#define IT8152_INTC_PDNIAR __REG_IT8152(0x3f00354)
44#define IT8152_INTC_INTC_TYPER __REG_IT8152(0x3f003FC)
45
46#define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500)
47
48/*
49 Interrupt controller per register summary:
50 ---------------------------------------
51 LCDNIRR:
52 IT8152_LD_IRQ(8) PCICLK stop
53 IT8152_LD_IRQ(7) MCLK ready
54 IT8152_LD_IRQ(6) s/w
55 IT8152_LD_IRQ(5) UART
56 IT8152_LD_IRQ(4) GPIO
57 IT8152_LD_IRQ(3) TIMER 4
58 IT8152_LD_IRQ(2) TIMER 3
59 IT8152_LD_IRQ(1) TIMER 2
60 IT8152_LD_IRQ(0) TIMER 1
61
62 LPCNIRR:
63 IT8152_LP_IRQ(x) serial IRQ x
64
65 PCIDNIRR:
66 IT8152_PD_IRQ(14) PCISERR
67 IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
68 IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
69 IT8152_PD_IRQ(11) PCI INTD
70 IT8152_PD_IRQ(10) PCI INTC
71 IT8152_PD_IRQ(9) PCI INTB
72 IT8152_PD_IRQ(8) PCI INTA
73 IT8152_PD_IRQ(7) serial INTD
74 IT8152_PD_IRQ(6) serial INTC
75 IT8152_PD_IRQ(5) serial INTB
76 IT8152_PD_IRQ(4) serial INTA
77 IT8152_PD_IRQ(3) serial IRQ IOCHK (IOCHKR)
78 IT8152_PD_IRQ(2) chaining DMA (CDMAR)
79 IT8152_PD_IRQ(1) USB (USBR)
80 IT8152_PD_IRQ(0) Audio controller (ACR)
81 */
82#define IT8152_IRQ(x) (IRQ_BOARD_START + (x))
83#define IT8152_LAST_IRQ (IRQ_BOARD_START + 40)
84
85/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
86#define IT8152_LD_IRQ_COUNT 9
87#define IT8152_LP_IRQ_COUNT 16
88#define IT8152_PD_IRQ_COUNT 15
89
90/* Priorities: */
91#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
92#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
93#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
94
95/* frequently used interrupts */
96#define IT8152_PCISERR IT8152_PD_IRQ(14)
97#define IT8152_H2PTADR IT8152_PD_IRQ(13)
98#define IT8152_H2PMAR IT8152_PD_IRQ(12)
99#define IT8152_PCI_INTD IT8152_PD_IRQ(11)
100#define IT8152_PCI_INTC IT8152_PD_IRQ(10)
101#define IT8152_PCI_INTB IT8152_PD_IRQ(9)
102#define IT8152_PCI_INTA IT8152_PD_IRQ(8)
103#define IT8152_CDMA_INT IT8152_PD_IRQ(2)
104#define IT8152_USB_INT IT8152_PD_IRQ(1)
105#define IT8152_AUDIO_INT IT8152_PD_IRQ(0)
106
107struct pci_dev;
108struct pci_sys_data;
109
110extern void it8152_irq_demux(struct irq_desc *desc);
111extern void it8152_init_irq(void);
112extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
113extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
114extern struct pci_ops it8152_ops;
115
116#endif /* __ASM_HARDWARE_IT8152_H */