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Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Hexagon VM page table entry definitions
4 *
5 * Copyright (c) 2010-2011,2013 The Linux Foundation. All rights reserved.
6 */
7
8#ifndef _ASM_VM_MMU_H
9#define _ASM_VM_MMU_H
10
11/*
12 * Shift, mask, and other constants for the Hexagon Virtual Machine
13 * page tables.
14 *
15 * Virtual machine MMU allows first-level entries to either be
16 * single-level lookup PTEs for very large pages, or PDEs pointing
17 * to second-level PTEs for smaller pages. If PTE is single-level,
18 * the least significant bits cannot be used as software bits to encode
19 * virtual memory subsystem information about the page, and that state
20 * must be maintained in some parallel data structure.
21 */
22
23/* S or Page Size field in PDE */
24#define __HVM_PDE_S (0x7 << 0)
25#define __HVM_PDE_S_4KB 0
26#define __HVM_PDE_S_16KB 1
27#define __HVM_PDE_S_64KB 2
28#define __HVM_PDE_S_256KB 3
29#define __HVM_PDE_S_1MB 4
30#define __HVM_PDE_S_4MB 5
31#define __HVM_PDE_S_16MB 6
32#define __HVM_PDE_S_INVALID 7
33
34/* Masks for L2 page table pointer, as function of page size */
35#define __HVM_PDE_PTMASK_4KB 0xfffff000
36#define __HVM_PDE_PTMASK_16KB 0xfffffc00
37#define __HVM_PDE_PTMASK_64KB 0xffffff00
38#define __HVM_PDE_PTMASK_256KB 0xffffffc0
39#define __HVM_PDE_PTMASK_1MB 0xfffffff0
40
41/*
42 * Virtual Machine PTE Bits/Fields
43 */
44#define __HVM_PTE_T (1<<4)
45#define __HVM_PTE_U (1<<5)
46#define __HVM_PTE_C (0x7<<6)
47#define __HVM_PTE_CVAL(pte) (((pte) & __HVM_PTE_C) >> 6)
48#define __HVM_PTE_R (1<<9)
49#define __HVM_PTE_W (1<<10)
50#define __HVM_PTE_X (1<<11)
51
52/*
53 * Cache Attributes, to be shifted as necessary for virtual/physical PTEs
54 */
55
56#define __HEXAGON_C_WB 0x0 /* Write-back, no L2 */
57#define __HEXAGON_C_WT 0x1 /* Write-through, no L2 */
58#define __HEXAGON_C_UNC 0x6 /* Uncached memory */
59#if CONFIG_HEXAGON_ARCH_VERSION >= 2
60#define __HEXAGON_C_DEV 0x4 /* Device register space */
61#else
62#define __HEXAGON_C_DEV __HEXAGON_C_UNC
63#endif
64#define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */
65#define __HEXAGON_C_WB_L2 0x7 /* Write-back, with L2 */
66
67/*
68 * This can be overridden, but we're defaulting to the most aggressive
69 * cache policy, the better to find bugs sooner.
70 */
71
72#define CACHE_DEFAULT __HEXAGON_C_WB_L2
73
74/* Masks for physical page address, as a function of page size */
75
76#define __HVM_PTE_PGMASK_4KB 0xfffff000
77#define __HVM_PTE_PGMASK_16KB 0xffffc000
78#define __HVM_PTE_PGMASK_64KB 0xffff0000
79#define __HVM_PTE_PGMASK_256KB 0xfffc0000
80#define __HVM_PTE_PGMASK_1MB 0xfff00000
81
82/* Masks for single-level large page lookups */
83
84#define __HVM_PTE_PGMASK_4MB 0xffc00000
85#define __HVM_PTE_PGMASK_16MB 0xff000000
86
87/*
88 * "Big kernel page mappings" (see vm_init_segtable.S)
89 * are currently 16MB
90 */
91
92#define BIG_KERNEL_PAGE_SHIFT 24
93#define BIG_KERNEL_PAGE_SIZE (1 << BIG_KERNEL_PAGE_SHIFT)
94
95
96
97#endif /* _ASM_VM_MMU_H */