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1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller Binding for APQ8064
8
9maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
12
13description: |
14 Qualcomm global clock control module which supports the clocks, resets and
15 power domains on APQ8064.
16
17 See also:
18 - dt-bindings/clock/qcom,gcc-msm8960.h
19 - dt-bindings/reset/qcom,gcc-msm8960.h
20
21properties:
22 compatible:
23 const: qcom,gcc-apq8064
24
25 '#clock-cells':
26 const: 1
27
28 '#reset-cells':
29 const: 1
30
31 '#power-domain-cells':
32 const: 1
33
34 reg:
35 maxItems: 1
36
37 nvmem-cells:
38 minItems: 1
39 maxItems: 2
40 description:
41 Qualcomm TSENS (thermal sensor device) on some devices can
42 be part of GCC and hence the TSENS properties can also be part
43 of the GCC/clock-controller node.
44 For more details on the TSENS properties please refer
45 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
46
47 nvmem-cell-names:
48 minItems: 1
49 maxItems: 2
50 items:
51 - const: calib
52 - const: calib_backup
53
54 '#thermal-sensor-cells':
55 const: 1
56
57 protected-clocks:
58 description:
59 Protected clock specifier list as per common clock binding.
60
61required:
62 - compatible
63 - reg
64 - '#clock-cells'
65 - '#reset-cells'
66 - '#power-domain-cells'
67 - nvmem-cells
68 - nvmem-cell-names
69 - '#thermal-sensor-cells'
70
71examples:
72 - |
73 clock-controller@900000 {
74 compatible = "qcom,gcc-apq8064";
75 reg = <0x00900000 0x4000>;
76 nvmem-cells = <&tsens_calib>, <&tsens_backup>;
77 nvmem-cell-names = "calib", "calib_backup";
78 #clock-cells = <1>;
79 #reset-cells = <1>;
80 #power-domain-cells = <1>;
81 #thermal-sensor-cells = <1>;
82 };
83...