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1--------------------------------------------------------------------------
2 = Zynq UltraScale+ MPSoC reset driver binding =
3--------------------------------------------------------------------------
4The Zynq UltraScale+ MPSoC has several different resets.
5
6See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information
7about zynqmp resets.
8
9Please also refer to reset.txt in this directory for common reset
10controller binding usage.
11
12Required Properties:
13- compatible: "xlnx,zynqmp-reset"
14- #reset-cells: Specifies the number of cells needed to encode reset
15 line, should be 1
16
17-------
18Example
19-------
20
21firmware {
22 zynqmp_firmware: zynqmp-firmware {
23 compatible = "xlnx,zynqmp-firmware";
24 method = "smc";
25
26 zynqmp_reset: reset-controller {
27 compatible = "xlnx,zynqmp-reset";
28 #reset-cells = <1>;
29 };
30 };
31};
32
33Specifying reset lines connected to IP modules
34==============================================
35
36Device nodes that need access to reset lines should
37specify them as a reset phandle in their corresponding node as
38specified in reset.txt.
39
40For list of all valid reset indicies see
41<dt-bindings/reset/xlnx-zynqmp-resets.h>
42
43Example:
44
45serdes: zynqmp_phy@fd400000 {
46 ...
47
48 resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
49 reset-names = "sata_rst";
50
51 ...
52};