tjh.dev
Linux kernel mirror (for testing)
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1Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
2
3Some boards require special tuning values, particularly when it comes
4to clock delays. You can specify clock delay values in the PHY OF
5device node. Deprecated, but still supported, these properties can
6also be added to an Ethernet OF device node.
7
8Note that these settings are applied after any phy-specific fixup from
9phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
10and therefore may overwrite them.
11
12KSZ9021:
13
14 All skew control options are specified in picoseconds. The minimum
15 value is 0, the maximum value is 3000, and it can be specified in 200ps
16 steps, *but* these values are in not fact what you get because this chip's
17 skew values actually increase in 120ps steps, starting from -840ps. The
18 incorrect values came from an error in the original KSZ9021 datasheet
19 before it was corrected in revision 1.2 (Feb 2014), but it is too late to
20 change the driver now because of the many existing device trees that have
21 been created using values that go up in increments of 200.
22
23 The following table shows the actual skew delay you will get for each of the
24 possible devicetree values, and the number that will be programmed into the
25 corresponding pad skew register:
26
27 Device Tree Value Delay Pad Skew Register Value
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
32 600 -480ps 0011
33 800 -360ps 0100
34 1000 -240ps 0101
35 1200 -120ps 0110
36 1400 0ps 0111
37 1600 120ps 1000
38 1800 240ps 1001
39 2000 360ps 1010
40 2200 480ps 1011
41 2400 600ps 1100
42 2600 720ps 1101
43 2800 840ps 1110
44 3000 960ps 1111
45
46 Optional properties:
47
48 - rxc-skew-ps : Skew control of RXC pad
49 - rxdv-skew-ps : Skew control of RX CTL pad
50 - txc-skew-ps : Skew control of TXC pad
51 - txen-skew-ps : Skew control of TX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
57 - txd1-skew-ps : Skew control of TX data 1 pad
58 - txd2-skew-ps : Skew control of TX data 2 pad
59 - txd3-skew-ps : Skew control of TX data 3 pad
60
61KSZ9031:
62
63 All skew control options are specified in picoseconds. The minimum
64 value is 0, and the maximum is property-dependent. The increment
65 step is 60ps. The default value is the neutral setting, so setting
66 rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
67
68 Optional properties:
69
70 Maximum value of 1860, default value 900:
71
72 - rxc-skew-ps : Skew control of RX clock pad
73 - txc-skew-ps : Skew control of TX clock pad
74
75 Maximum value of 900, default value 420:
76
77 - rxdv-skew-ps : Skew control of RX CTL pad
78 - txen-skew-ps : Skew control of TX CTL pad
79 - rxd0-skew-ps : Skew control of RX data 0 pad
80 - rxd1-skew-ps : Skew control of RX data 1 pad
81 - rxd2-skew-ps : Skew control of RX data 2 pad
82 - rxd3-skew-ps : Skew control of RX data 3 pad
83 - txd0-skew-ps : Skew control of TX data 0 pad
84 - txd1-skew-ps : Skew control of TX data 1 pad
85 - txd2-skew-ps : Skew control of TX data 2 pad
86 - txd3-skew-ps : Skew control of TX data 3 pad
87
88 - micrel,force-master:
89 Boolean, force phy to master mode. Only set this option if the phy
90 reference clock provided at CLK125_NDO pin is used as MAC reference
91 clock because the clock jitter in slave mode is to high (errata#2).
92 Attention: The link partner must be configurable as slave otherwise
93 no link will be established.
94
95KSZ9131:
96
97 All skew control options are specified in picoseconds. The increment
98 step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
99 A negative value can be assigned as rxc-skew-psec = <(-100)>;.
100
101 Optional properties:
102
103 Range of the value -700 to 2400, default value 0:
104
105 - rxc-skew-psec : Skew control of RX clock pad
106 - txc-skew-psec : Skew control of TX clock pad
107
108 Range of the value -700 to 800, default value 0:
109
110 - rxdv-skew-psec : Skew control of RX CTL pad
111 - txen-skew-psec : Skew control of TX CTL pad
112 - rxd0-skew-psec : Skew control of RX data 0 pad
113 - rxd1-skew-psec : Skew control of RX data 1 pad
114 - rxd2-skew-psec : Skew control of RX data 2 pad
115 - rxd3-skew-psec : Skew control of RX data 3 pad
116 - txd0-skew-psec : Skew control of TX data 0 pad
117 - txd1-skew-psec : Skew control of TX data 1 pad
118 - txd2-skew-psec : Skew control of TX data 2 pad
119 - txd3-skew-psec : Skew control of TX data 3 pad
120
121Examples:
122
123 mdio {
124 phy0: ethernet-phy@0 {
125 rxc-skew-ps = <3000>;
126 rxdv-skew-ps = <0>;
127 txc-skew-ps = <3000>;
128 txen-skew-ps = <0>;
129 reg = <0>;
130 };
131 };
132 ethernet@70000 {
133 phy = <&phy0>;
134 phy-mode = "rgmii-id";
135 };