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1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef __TI_SYSC_DATA_H__
4#define __TI_SYSC_DATA_H__
5
6enum ti_sysc_module_type {
7 TI_SYSC_OMAP2,
8 TI_SYSC_OMAP2_TIMER,
9 TI_SYSC_OMAP3_SHAM,
10 TI_SYSC_OMAP3_AES,
11 TI_SYSC_OMAP4,
12 TI_SYSC_OMAP4_TIMER,
13 TI_SYSC_OMAP4_SIMPLE,
14 TI_SYSC_OMAP34XX_SR,
15 TI_SYSC_OMAP36XX_SR,
16 TI_SYSC_OMAP4_SR,
17 TI_SYSC_OMAP4_MCASP,
18 TI_SYSC_OMAP4_USB_HOST_FS,
19 TI_SYSC_DRA7_MCAN,
20};
21
22struct ti_sysc_cookie {
23 void *data;
24 void *clkdm;
25};
26
27/**
28 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
29 * @midle_shift: Offset of the midle bit
30 * @clkact_shift: Offset of the clockactivity bit
31 * @sidle_shift: Offset of the sidle bit
32 * @enwkup_shift: Offset of the enawakeup bit
33 * @srst_shift: Offset of the softreset bit
34 * @autoidle_shift: Offset of the autoidle bit
35 * @dmadisable_shift: Offset of the dmadisable bit
36 * @emufree_shift; Offset of the emufree bit
37 *
38 * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
39 * feature is not available.
40 */
41struct sysc_regbits {
42 s8 midle_shift;
43 s8 clkact_shift;
44 s8 sidle_shift;
45 s8 enwkup_shift;
46 s8 srst_shift;
47 s8 autoidle_shift;
48 s8 dmadisable_shift;
49 s8 emufree_shift;
50};
51
52#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
53#define SYSC_MODULE_QUIRK_AESS BIT(19)
54#define SYSC_MODULE_QUIRK_SGX BIT(18)
55#define SYSC_MODULE_QUIRK_HDQ1W BIT(17)
56#define SYSC_MODULE_QUIRK_I2C BIT(16)
57#define SYSC_MODULE_QUIRK_WDT BIT(15)
58#define SYSS_QUIRK_RESETDONE_INVERTED BIT(14)
59#define SYSC_QUIRK_SWSUP_MSTANDBY BIT(13)
60#define SYSC_QUIRK_SWSUP_SIDLE_ACT BIT(12)
61#define SYSC_QUIRK_SWSUP_SIDLE BIT(11)
62#define SYSC_QUIRK_EXT_OPT_CLOCK BIT(10)
63#define SYSC_QUIRK_LEGACY_IDLE BIT(9)
64#define SYSC_QUIRK_RESET_STATUS BIT(8)
65#define SYSC_QUIRK_NO_IDLE BIT(7)
66#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6)
67#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5)
68#define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4)
69#define SYSC_QUIRK_OPT_CLKS_IN_RESET BIT(3)
70#define SYSC_QUIRK_16BIT BIT(2)
71#define SYSC_QUIRK_UNCACHED BIT(1)
72#define SYSC_QUIRK_USE_CLOCKACT BIT(0)
73
74#define SYSC_NR_IDLEMODES 4
75
76/**
77 * struct sysc_capabilities - capabilities for an interconnect target module
78 * @type: sysc type identifier for the module
79 * @sysc_mask: bitmask of supported SYSCONFIG register bits
80 * @regbits: bitmask of SYSCONFIG register bits
81 * @mod_quirks: bitmask of module specific quirks
82 */
83struct sysc_capabilities {
84 const enum ti_sysc_module_type type;
85 const u32 sysc_mask;
86 const struct sysc_regbits *regbits;
87 const u32 mod_quirks;
88};
89
90/**
91 * struct sysc_config - configuration for an interconnect target module
92 * @sysc_val: configured value for sysc register
93 * @syss_mask: configured mask value for SYSSTATUS register
94 * @midlemodes: bitmask of supported master idle modes
95 * @sidlemodes: bitmask of supported slave idle modes
96 * @srst_udelay: optional delay needed after OCP soft reset
97 * @quirks: bitmask of enabled quirks
98 */
99struct sysc_config {
100 u32 sysc_val;
101 u32 syss_mask;
102 u8 midlemodes;
103 u8 sidlemodes;
104 u8 srst_udelay;
105 u32 quirks;
106};
107
108enum sysc_registers {
109 SYSC_REVISION,
110 SYSC_SYSCONFIG,
111 SYSC_SYSSTATUS,
112 SYSC_MAX_REGS,
113};
114
115/**
116 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
117 * @name: legacy "ti,hwmods" module name
118 * @module_pa: physical address of the interconnect target module
119 * @module_size: size of the interconnect target module
120 * @offsets: array of register offsets as listed in enum sysc_registers
121 * @nr_offsets: number of registers
122 * @cap: interconnect target module capabilities
123 * @cfg: interconnect target module configuration
124 *
125 * This data is enough to allocate a new struct omap_hwmod_class_sysconfig
126 * based on device tree data parsed by ti-sysc driver.
127 */
128struct ti_sysc_module_data {
129 const char *name;
130 u64 module_pa;
131 u32 module_size;
132 int *offsets;
133 int nr_offsets;
134 const struct sysc_capabilities *cap;
135 struct sysc_config *cfg;
136};
137
138struct device;
139struct clk;
140
141struct ti_sysc_platform_data {
142 struct of_dev_auxdata *auxdata;
143 int (*init_clockdomain)(struct device *dev, struct clk *fck,
144 struct clk *ick, struct ti_sysc_cookie *cookie);
145 void (*clkdm_deny_idle)(struct device *dev,
146 const struct ti_sysc_cookie *cookie);
147 void (*clkdm_allow_idle)(struct device *dev,
148 const struct ti_sysc_cookie *cookie);
149 int (*init_module)(struct device *dev,
150 const struct ti_sysc_module_data *data,
151 struct ti_sysc_cookie *cookie);
152 int (*enable_module)(struct device *dev,
153 const struct ti_sysc_cookie *cookie);
154 int (*idle_module)(struct device *dev,
155 const struct ti_sysc_cookie *cookie);
156 int (*shutdown_module)(struct device *dev,
157 const struct ti_sysc_cookie *cookie);
158};
159
160#endif /* __TI_SYSC_DATA_H__ */