Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2006, Intel Corporation.
4 *
5 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
6 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
7 */
8
9#ifndef __DMAR_H__
10#define __DMAR_H__
11
12#include <linux/acpi.h>
13#include <linux/types.h>
14#include <linux/msi.h>
15#include <linux/irqreturn.h>
16#include <linux/rwsem.h>
17#include <linux/rculist.h>
18
19struct acpi_dmar_header;
20
21#ifdef CONFIG_X86
22# define DMAR_UNITS_SUPPORTED MAX_IO_APICS
23#else
24# define DMAR_UNITS_SUPPORTED 64
25#endif
26
27/* DMAR Flags */
28#define DMAR_INTR_REMAP 0x1
29#define DMAR_X2APIC_OPT_OUT 0x2
30#define DMAR_PLATFORM_OPT_IN 0x4
31
32struct intel_iommu;
33
34struct dmar_dev_scope {
35 struct device __rcu *dev;
36 u8 bus;
37 u8 devfn;
38};
39
40#ifdef CONFIG_DMAR_TABLE
41extern struct acpi_table_header *dmar_tbl;
42struct dmar_drhd_unit {
43 struct list_head list; /* list of drhd units */
44 struct acpi_dmar_header *hdr; /* ACPI header */
45 u64 reg_base_addr; /* register base address*/
46 struct dmar_dev_scope *devices;/* target device array */
47 int devices_cnt; /* target device count */
48 u16 segment; /* PCI domain */
49 u8 ignored:1; /* ignore drhd */
50 u8 include_all:1;
51 struct intel_iommu *iommu;
52};
53
54struct dmar_pci_path {
55 u8 bus;
56 u8 device;
57 u8 function;
58};
59
60struct dmar_pci_notify_info {
61 struct pci_dev *dev;
62 unsigned long event;
63 int bus;
64 u16 seg;
65 u16 level;
66 struct dmar_pci_path path[];
67} __attribute__((packed));
68
69extern struct rw_semaphore dmar_global_lock;
70extern struct list_head dmar_drhd_units;
71
72#define for_each_drhd_unit(drhd) \
73 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
74
75#define for_each_active_drhd_unit(drhd) \
76 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
77 if (drhd->ignored) {} else
78
79#define for_each_active_iommu(i, drhd) \
80 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
81 if (i=drhd->iommu, drhd->ignored) {} else
82
83#define for_each_iommu(i, drhd) \
84 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
85 if (i=drhd->iommu, 0) {} else
86
87static inline bool dmar_rcu_check(void)
88{
89 return rwsem_is_locked(&dmar_global_lock) ||
90 system_state == SYSTEM_BOOTING;
91}
92
93#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
94
95#define for_each_dev_scope(devs, cnt, i, tmp) \
96 for ((i) = 0; ((tmp) = (i) < (cnt) ? \
97 dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \
98 (i)++)
99
100#define for_each_active_dev_scope(devs, cnt, i, tmp) \
101 for_each_dev_scope((devs), (cnt), (i), (tmp)) \
102 if (!(tmp)) { continue; } else
103
104extern int dmar_table_init(void);
105extern int dmar_dev_scope_init(void);
106extern void dmar_register_bus_notifier(void);
107extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
108 struct dmar_dev_scope **devices, u16 segment);
109extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
110extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
111extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
112 void *start, void*end, u16 segment,
113 struct dmar_dev_scope *devices,
114 int devices_cnt);
115extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
116 u16 segment, struct dmar_dev_scope *devices,
117 int count);
118/* Intel IOMMU detection */
119extern int detect_intel_iommu(void);
120extern int enable_drhd_fault_handling(void);
121extern int dmar_device_add(acpi_handle handle);
122extern int dmar_device_remove(acpi_handle handle);
123
124static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
125{
126 return 0;
127}
128
129#ifdef CONFIG_INTEL_IOMMU
130extern int iommu_detected, no_iommu;
131extern int intel_iommu_init(void);
132extern void intel_iommu_shutdown(void);
133extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
134extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
135extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
136extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
137extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
138extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
139#else /* !CONFIG_INTEL_IOMMU: */
140static inline int intel_iommu_init(void) { return -ENODEV; }
141static inline void intel_iommu_shutdown(void) { }
142
143#define dmar_parse_one_rmrr dmar_res_noop
144#define dmar_parse_one_atsr dmar_res_noop
145#define dmar_check_one_atsr dmar_res_noop
146#define dmar_release_one_atsr dmar_res_noop
147
148static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
149{
150 return 0;
151}
152
153static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
154{
155 return 0;
156}
157#endif /* CONFIG_INTEL_IOMMU */
158
159#ifdef CONFIG_IRQ_REMAP
160extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
161#else /* CONFIG_IRQ_REMAP */
162static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
163{ return 0; }
164#endif /* CONFIG_IRQ_REMAP */
165
166extern bool dmar_platform_optin(void);
167
168#else /* CONFIG_DMAR_TABLE */
169
170static inline int dmar_device_add(void *handle)
171{
172 return 0;
173}
174
175static inline int dmar_device_remove(void *handle)
176{
177 return 0;
178}
179
180static inline bool dmar_platform_optin(void)
181{
182 return false;
183}
184
185#endif /* CONFIG_DMAR_TABLE */
186
187struct irte {
188 union {
189 /* Shared between remapped and posted mode*/
190 struct {
191 __u64 present : 1, /* 0 */
192 fpd : 1, /* 1 */
193 __res0 : 6, /* 2 - 6 */
194 avail : 4, /* 8 - 11 */
195 __res1 : 3, /* 12 - 14 */
196 pst : 1, /* 15 */
197 vector : 8, /* 16 - 23 */
198 __res2 : 40; /* 24 - 63 */
199 };
200
201 /* Remapped mode */
202 struct {
203 __u64 r_present : 1, /* 0 */
204 r_fpd : 1, /* 1 */
205 dst_mode : 1, /* 2 */
206 redir_hint : 1, /* 3 */
207 trigger_mode : 1, /* 4 */
208 dlvry_mode : 3, /* 5 - 7 */
209 r_avail : 4, /* 8 - 11 */
210 r_res0 : 4, /* 12 - 15 */
211 r_vector : 8, /* 16 - 23 */
212 r_res1 : 8, /* 24 - 31 */
213 dest_id : 32; /* 32 - 63 */
214 };
215
216 /* Posted mode */
217 struct {
218 __u64 p_present : 1, /* 0 */
219 p_fpd : 1, /* 1 */
220 p_res0 : 6, /* 2 - 7 */
221 p_avail : 4, /* 8 - 11 */
222 p_res1 : 2, /* 12 - 13 */
223 p_urgent : 1, /* 14 */
224 p_pst : 1, /* 15 */
225 p_vector : 8, /* 16 - 23 */
226 p_res2 : 14, /* 24 - 37 */
227 pda_l : 26; /* 38 - 63 */
228 };
229 __u64 low;
230 };
231
232 union {
233 /* Shared between remapped and posted mode*/
234 struct {
235 __u64 sid : 16, /* 64 - 79 */
236 sq : 2, /* 80 - 81 */
237 svt : 2, /* 82 - 83 */
238 __res3 : 44; /* 84 - 127 */
239 };
240
241 /* Posted mode*/
242 struct {
243 __u64 p_sid : 16, /* 64 - 79 */
244 p_sq : 2, /* 80 - 81 */
245 p_svt : 2, /* 82 - 83 */
246 p_res3 : 12, /* 84 - 95 */
247 pda_h : 32; /* 96 - 127 */
248 };
249 __u64 high;
250 };
251};
252
253static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
254{
255 dst->present = src->present;
256 dst->fpd = src->fpd;
257 dst->avail = src->avail;
258 dst->pst = src->pst;
259 dst->vector = src->vector;
260 dst->sid = src->sid;
261 dst->sq = src->sq;
262 dst->svt = src->svt;
263}
264
265#define PDA_LOW_BIT 26
266#define PDA_HIGH_BIT 32
267
268/* Can't use the common MSI interrupt functions
269 * since DMAR is not a pci device
270 */
271struct irq_data;
272extern void dmar_msi_unmask(struct irq_data *data);
273extern void dmar_msi_mask(struct irq_data *data);
274extern void dmar_msi_read(int irq, struct msi_msg *msg);
275extern void dmar_msi_write(int irq, struct msi_msg *msg);
276extern int dmar_set_interrupt(struct intel_iommu *iommu);
277extern irqreturn_t dmar_fault(int irq, void *dev_id);
278extern int dmar_alloc_hwirq(int id, int node, void *arg);
279extern void dmar_free_hwirq(int irq);
280
281#endif /* __DMAR_H__ */