Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1// SPDX-License-Identifier: GPL-2.0+
2/* Copyright (C) 2014-2018 Broadcom */
3
4/**
5 * DOC: Broadcom V3D Graphics Driver
6 *
7 * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
8 * For V3D 2.x support, see the VC4 driver.
9 *
10 * The V3D GPU includes a tiled render (composed of a bin and render
11 * pipelines), the TFU (texture formatting unit), and the CSD (compute
12 * shader dispatch).
13 */
14
15#include <linux/clk.h>
16#include <linux/device.h>
17#include <linux/dma-mapping.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/of_platform.h>
21#include <linux/platform_device.h>
22#include <linux/pm_runtime.h>
23#include <linux/reset.h>
24
25#include <drm/drm_drv.h>
26#include <drm/drm_fb_cma_helper.h>
27#include <drm/drm_fb_helper.h>
28#include <uapi/drm/v3d_drm.h>
29
30#include "v3d_drv.h"
31#include "v3d_regs.h"
32
33#define DRIVER_NAME "v3d"
34#define DRIVER_DESC "Broadcom V3D graphics"
35#define DRIVER_DATE "20180419"
36#define DRIVER_MAJOR 1
37#define DRIVER_MINOR 0
38#define DRIVER_PATCHLEVEL 0
39
40#ifdef CONFIG_PM
41static int v3d_runtime_suspend(struct device *dev)
42{
43 struct drm_device *drm = dev_get_drvdata(dev);
44 struct v3d_dev *v3d = to_v3d_dev(drm);
45
46 v3d_irq_disable(v3d);
47
48 clk_disable_unprepare(v3d->clk);
49
50 return 0;
51}
52
53static int v3d_runtime_resume(struct device *dev)
54{
55 struct drm_device *drm = dev_get_drvdata(dev);
56 struct v3d_dev *v3d = to_v3d_dev(drm);
57 int ret;
58
59 ret = clk_prepare_enable(v3d->clk);
60 if (ret != 0)
61 return ret;
62
63 /* XXX: VPM base */
64
65 v3d_mmu_set_page_table(v3d);
66 v3d_irq_enable(v3d);
67
68 return 0;
69}
70#endif
71
72static const struct dev_pm_ops v3d_v3d_pm_ops = {
73 SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
74};
75
76static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
77 struct drm_file *file_priv)
78{
79 struct v3d_dev *v3d = to_v3d_dev(dev);
80 struct drm_v3d_get_param *args = data;
81 int ret;
82 static const u32 reg_map[] = {
83 [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
84 [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
85 [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
86 [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
87 [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
88 [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
89 [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
90 };
91
92 if (args->pad != 0)
93 return -EINVAL;
94
95 /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
96 * to explicitly allow it in the "the register in our
97 * parameter map" check.
98 */
99 if (args->param < ARRAY_SIZE(reg_map) &&
100 (reg_map[args->param] ||
101 args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
102 u32 offset = reg_map[args->param];
103
104 if (args->value != 0)
105 return -EINVAL;
106
107 ret = pm_runtime_get_sync(v3d->dev);
108 if (ret < 0)
109 return ret;
110 if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
111 args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
112 args->value = V3D_CORE_READ(0, offset);
113 } else {
114 args->value = V3D_READ(offset);
115 }
116 pm_runtime_mark_last_busy(v3d->dev);
117 pm_runtime_put_autosuspend(v3d->dev);
118 return 0;
119 }
120
121
122 switch (args->param) {
123 case DRM_V3D_PARAM_SUPPORTS_TFU:
124 args->value = 1;
125 return 0;
126 case DRM_V3D_PARAM_SUPPORTS_CSD:
127 args->value = v3d_has_csd(v3d);
128 return 0;
129 case DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH:
130 args->value = 1;
131 return 0;
132 default:
133 DRM_DEBUG("Unknown parameter %d\n", args->param);
134 return -EINVAL;
135 }
136}
137
138static int
139v3d_open(struct drm_device *dev, struct drm_file *file)
140{
141 struct v3d_dev *v3d = to_v3d_dev(dev);
142 struct v3d_file_priv *v3d_priv;
143 struct drm_sched_rq *rq;
144 int i;
145
146 v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
147 if (!v3d_priv)
148 return -ENOMEM;
149
150 v3d_priv->v3d = v3d;
151
152 for (i = 0; i < V3D_MAX_QUEUES; i++) {
153 rq = &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
154 drm_sched_entity_init(&v3d_priv->sched_entity[i], &rq, 1, NULL);
155 }
156
157 file->driver_priv = v3d_priv;
158
159 return 0;
160}
161
162static void
163v3d_postclose(struct drm_device *dev, struct drm_file *file)
164{
165 struct v3d_file_priv *v3d_priv = file->driver_priv;
166 enum v3d_queue q;
167
168 for (q = 0; q < V3D_MAX_QUEUES; q++) {
169 drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
170 }
171
172 kfree(v3d_priv);
173}
174
175DEFINE_DRM_GEM_FOPS(v3d_drm_fops);
176
177/* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
178 * protection between clients. Note that render nodes would be be
179 * able to submit CLs that could access BOs from clients authenticated
180 * with the master node. The TFU doesn't use the GMP, so it would
181 * need to stay DRM_AUTH until we do buffer size/offset validation.
182 */
183static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
184 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
185 DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
186 DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
187 DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
188 DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
189 DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
190 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
191 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
192};
193
194static struct drm_driver v3d_drm_driver = {
195 .driver_features = (DRIVER_GEM |
196 DRIVER_RENDER |
197 DRIVER_SYNCOBJ),
198
199 .open = v3d_open,
200 .postclose = v3d_postclose,
201
202#if defined(CONFIG_DEBUG_FS)
203 .debugfs_init = v3d_debugfs_init,
204#endif
205
206 .gem_create_object = v3d_create_object,
207 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
208 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
209 .gem_prime_import_sg_table = v3d_prime_import_sg_table,
210 .gem_prime_mmap = drm_gem_prime_mmap,
211
212 .ioctls = v3d_drm_ioctls,
213 .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
214 .fops = &v3d_drm_fops,
215
216 .name = DRIVER_NAME,
217 .desc = DRIVER_DESC,
218 .date = DRIVER_DATE,
219 .major = DRIVER_MAJOR,
220 .minor = DRIVER_MINOR,
221 .patchlevel = DRIVER_PATCHLEVEL,
222};
223
224static const struct of_device_id v3d_of_match[] = {
225 { .compatible = "brcm,7268-v3d" },
226 { .compatible = "brcm,7278-v3d" },
227 {},
228};
229MODULE_DEVICE_TABLE(of, v3d_of_match);
230
231static int
232map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
233{
234 struct resource *res =
235 platform_get_resource_byname(v3d->pdev, IORESOURCE_MEM, name);
236
237 *regs = devm_ioremap_resource(v3d->dev, res);
238 return PTR_ERR_OR_ZERO(*regs);
239}
240
241static int v3d_platform_drm_probe(struct platform_device *pdev)
242{
243 struct device *dev = &pdev->dev;
244 struct drm_device *drm;
245 struct v3d_dev *v3d;
246 int ret;
247 u32 mmu_debug;
248 u32 ident1;
249
250
251 v3d = kzalloc(sizeof(*v3d), GFP_KERNEL);
252 if (!v3d)
253 return -ENOMEM;
254 v3d->dev = dev;
255 v3d->pdev = pdev;
256 drm = &v3d->drm;
257
258 ret = map_regs(v3d, &v3d->hub_regs, "hub");
259 if (ret)
260 goto dev_free;
261
262 ret = map_regs(v3d, &v3d->core_regs[0], "core0");
263 if (ret)
264 goto dev_free;
265
266 mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
267 dev->coherent_dma_mask =
268 DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
269 v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
270
271 ident1 = V3D_READ(V3D_HUB_IDENT1);
272 v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
273 V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
274 v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
275 WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
276
277 v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
278 if (IS_ERR(v3d->reset)) {
279 ret = PTR_ERR(v3d->reset);
280
281 if (ret == -EPROBE_DEFER)
282 goto dev_free;
283
284 v3d->reset = NULL;
285 ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
286 if (ret) {
287 dev_err(dev,
288 "Failed to get reset control or bridge regs\n");
289 goto dev_free;
290 }
291 }
292
293 if (v3d->ver < 41) {
294 ret = map_regs(v3d, &v3d->gca_regs, "gca");
295 if (ret)
296 goto dev_free;
297 }
298
299 v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
300 GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
301 if (!v3d->mmu_scratch) {
302 dev_err(dev, "Failed to allocate MMU scratch page\n");
303 ret = -ENOMEM;
304 goto dev_free;
305 }
306
307 pm_runtime_use_autosuspend(dev);
308 pm_runtime_set_autosuspend_delay(dev, 50);
309 pm_runtime_enable(dev);
310
311 ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev);
312 if (ret)
313 goto dma_free;
314
315 platform_set_drvdata(pdev, drm);
316 drm->dev_private = v3d;
317
318 ret = v3d_gem_init(drm);
319 if (ret)
320 goto dev_destroy;
321
322 ret = v3d_irq_init(v3d);
323 if (ret)
324 goto gem_destroy;
325
326 ret = drm_dev_register(drm, 0);
327 if (ret)
328 goto irq_disable;
329
330 return 0;
331
332irq_disable:
333 v3d_irq_disable(v3d);
334gem_destroy:
335 v3d_gem_destroy(drm);
336dev_destroy:
337 drm_dev_put(drm);
338dma_free:
339 dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
340dev_free:
341 kfree(v3d);
342 return ret;
343}
344
345static int v3d_platform_drm_remove(struct platform_device *pdev)
346{
347 struct drm_device *drm = platform_get_drvdata(pdev);
348 struct v3d_dev *v3d = to_v3d_dev(drm);
349
350 drm_dev_unregister(drm);
351
352 v3d_gem_destroy(drm);
353
354 drm_dev_put(drm);
355
356 dma_free_wc(v3d->dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
357
358 return 0;
359}
360
361static struct platform_driver v3d_platform_driver = {
362 .probe = v3d_platform_drm_probe,
363 .remove = v3d_platform_drm_remove,
364 .driver = {
365 .name = "v3d",
366 .of_match_table = v3d_of_match,
367 },
368};
369
370static int __init v3d_drm_register(void)
371{
372 return platform_driver_register(&v3d_platform_driver);
373}
374
375static void __exit v3d_drm_unregister(void)
376{
377 platform_driver_unregister(&v3d_platform_driver);
378}
379
380module_init(v3d_drm_register);
381module_exit(v3d_drm_unregister);
382
383MODULE_ALIAS("platform:v3d-drm");
384MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
385MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
386MODULE_LICENSE("GPL v2");