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1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _IDE_H 3#define _IDE_H 4/* 5 * linux/include/linux/ide.h 6 * 7 * Copyright (C) 1994-2002 Linus Torvalds & authors 8 */ 9 10#include <linux/init.h> 11#include <linux/ioport.h> 12#include <linux/ata.h> 13#include <linux/blk-mq.h> 14#include <linux/proc_fs.h> 15#include <linux/interrupt.h> 16#include <linux/bitops.h> 17#include <linux/bio.h> 18#include <linux/pci.h> 19#include <linux/completion.h> 20#include <linux/pm.h> 21#include <linux/mutex.h> 22/* for request_sense */ 23#include <linux/cdrom.h> 24#include <scsi/scsi_cmnd.h> 25#include <asm/byteorder.h> 26#include <asm/io.h> 27 28/* 29 * Probably not wise to fiddle with these 30 */ 31#define SUPPORT_VLB_SYNC 1 32#define IDE_DEFAULT_MAX_FAILURES 1 33#define ERROR_MAX 8 /* Max read/write errors per sector */ 34#define ERROR_RESET 3 /* Reset controller every 4th retry */ 35#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ 36 37struct device; 38 39/* values for ide_request.type */ 40enum ata_priv_type { 41 ATA_PRIV_MISC, 42 ATA_PRIV_TASKFILE, 43 ATA_PRIV_PC, 44 ATA_PRIV_SENSE, /* sense request */ 45 ATA_PRIV_PM_SUSPEND, /* suspend request */ 46 ATA_PRIV_PM_RESUME, /* resume request */ 47}; 48 49struct ide_request { 50 struct scsi_request sreq; 51 u8 sense[SCSI_SENSE_BUFFERSIZE]; 52 u8 type; 53 void *special; 54}; 55 56static inline struct ide_request *ide_req(struct request *rq) 57{ 58 return blk_mq_rq_to_pdu(rq); 59} 60 61static inline bool ata_misc_request(struct request *rq) 62{ 63 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_MISC; 64} 65 66static inline bool ata_taskfile_request(struct request *rq) 67{ 68 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_TASKFILE; 69} 70 71static inline bool ata_pc_request(struct request *rq) 72{ 73 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_PC; 74} 75 76static inline bool ata_sense_request(struct request *rq) 77{ 78 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_SENSE; 79} 80 81static inline bool ata_pm_request(struct request *rq) 82{ 83 return blk_rq_is_private(rq) && 84 (ide_req(rq)->type == ATA_PRIV_PM_SUSPEND || 85 ide_req(rq)->type == ATA_PRIV_PM_RESUME); 86} 87 88/* Error codes returned in result to the higher part of the driver. */ 89enum { 90 IDE_DRV_ERROR_GENERAL = 101, 91 IDE_DRV_ERROR_FILEMARK = 102, 92 IDE_DRV_ERROR_EOD = 103, 93}; 94 95/* 96 * Definitions for accessing IDE controller registers 97 */ 98#define IDE_NR_PORTS (10) 99 100struct ide_io_ports { 101 unsigned long data_addr; 102 103 union { 104 unsigned long error_addr; /* read: error */ 105 unsigned long feature_addr; /* write: feature */ 106 }; 107 108 unsigned long nsect_addr; 109 unsigned long lbal_addr; 110 unsigned long lbam_addr; 111 unsigned long lbah_addr; 112 113 unsigned long device_addr; 114 115 union { 116 unsigned long status_addr; /*  read: status  */ 117 unsigned long command_addr; /* write: command */ 118 }; 119 120 unsigned long ctl_addr; 121 122 unsigned long irq_addr; 123}; 124 125#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 126 127#define BAD_R_STAT (ATA_BUSY | ATA_ERR) 128#define BAD_W_STAT (BAD_R_STAT | ATA_DF) 129#define BAD_STAT (BAD_R_STAT | ATA_DRQ) 130#define DRIVE_READY (ATA_DRDY | ATA_DSC) 131 132#define BAD_CRC (ATA_ABORTED | ATA_ICRC) 133 134#define SATA_NR_PORTS (3) /* 16 possible ?? */ 135 136#define SATA_STATUS_OFFSET (0) 137#define SATA_ERROR_OFFSET (1) 138#define SATA_CONTROL_OFFSET (2) 139 140/* 141 * Our Physical Region Descriptor (PRD) table should be large enough 142 * to handle the biggest I/O request we are likely to see. Since requests 143 * can have no more than 256 sectors, and since the typical blocksize is 144 * two or more sectors, we could get by with a limit of 128 entries here for 145 * the usual worst case. Most requests seem to include some contiguous blocks, 146 * further reducing the number of table entries required. 147 * 148 * The driver reverts to PIO mode for individual requests that exceed 149 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling 150 * 100% of all crazy scenarios here is not necessary. 151 * 152 * As it turns out though, we must allocate a full 4KB page for this, 153 * so the two PRD tables (ide0 & ide1) will each get half of that, 154 * allowing each to have about 256 entries (8 bytes each) from this. 155 */ 156#define PRD_BYTES 8 157#define PRD_ENTRIES 256 158 159/* 160 * Some more useful definitions 161 */ 162#define PARTN_BITS 6 /* number of minor dev bits for partitions */ 163#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ 164 165/* 166 * Timeouts for various operations: 167 */ 168enum { 169 /* spec allows up to 20ms, but CF cards and SSD drives need more */ 170 WAIT_DRQ = 1 * HZ, /* 1s */ 171 /* some laptops are very slow */ 172 WAIT_READY = 5 * HZ, /* 5s */ 173 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */ 174 WAIT_PIDENTIFY = 10 * HZ, /* 10s */ 175 /* worst case when spinning up */ 176 WAIT_WORSTCASE = 30 * HZ, /* 30s */ 177 /* maximum wait for an IRQ to happen */ 178 WAIT_CMD = 10 * HZ, /* 10s */ 179 /* Some drives require a longer IRQ timeout. */ 180 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */ 181 /* 182 * Some drives (for example, Seagate STT3401A Travan) require a very 183 * long timeout, because they don't return an interrupt or clear their 184 * BSY bit until after the command completes (even retension commands). 185 */ 186 WAIT_TAPE_CMD = 900 * HZ, /* 900s */ 187 /* minimum sleep time */ 188 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */ 189}; 190 191/* 192 * Op codes for special requests to be handled by ide_special_rq(). 193 * Values should be in the range of 0x20 to 0x3f. 194 */ 195#define REQ_DRIVE_RESET 0x20 196#define REQ_DEVSET_EXEC 0x21 197#define REQ_PARK_HEADS 0x22 198#define REQ_UNPARK_HEADS 0x23 199 200/* 201 * hwif_chipset_t is used to keep track of the specific hardware 202 * chipset used by each IDE interface, if known. 203 */ 204enum { ide_unknown, ide_generic, ide_pci, 205 ide_cmd640, ide_dtc2278, ide_ali14xx, 206 ide_qd65xx, ide_umc8672, ide_ht6560b, 207 ide_4drives, ide_pmac, ide_acorn, 208 ide_au1xxx, ide_palm3710 209}; 210 211typedef u8 hwif_chipset_t; 212 213/* 214 * Structure to hold all information about the location of this port 215 */ 216struct ide_hw { 217 union { 218 struct ide_io_ports io_ports; 219 unsigned long io_ports_array[IDE_NR_PORTS]; 220 }; 221 222 int irq; /* our irq number */ 223 struct device *dev, *parent; 224 unsigned long config; 225}; 226 227static inline void ide_std_init_ports(struct ide_hw *hw, 228 unsigned long io_addr, 229 unsigned long ctl_addr) 230{ 231 unsigned int i; 232 233 for (i = 0; i <= 7; i++) 234 hw->io_ports_array[i] = io_addr++; 235 236 hw->io_ports.ctl_addr = ctl_addr; 237} 238 239#define MAX_HWIFS 10 240 241/* 242 * Now for the data we need to maintain per-drive: ide_drive_t 243 */ 244 245#define ide_scsi 0x21 246#define ide_disk 0x20 247#define ide_optical 0x7 248#define ide_cdrom 0x5 249#define ide_tape 0x1 250#define ide_floppy 0x0 251 252/* 253 * Special Driver Flags 254 */ 255enum { 256 IDE_SFLAG_SET_GEOMETRY = BIT(0), 257 IDE_SFLAG_RECALIBRATE = BIT(1), 258 IDE_SFLAG_SET_MULTMODE = BIT(2), 259}; 260 261/* 262 * Status returned from various ide_ functions 263 */ 264typedef enum { 265 ide_stopped, /* no drive operation was started */ 266 ide_started, /* a drive operation was started, handler was set */ 267} ide_startstop_t; 268 269enum { 270 IDE_VALID_ERROR = BIT(1), 271 IDE_VALID_FEATURE = IDE_VALID_ERROR, 272 IDE_VALID_NSECT = BIT(2), 273 IDE_VALID_LBAL = BIT(3), 274 IDE_VALID_LBAM = BIT(4), 275 IDE_VALID_LBAH = BIT(5), 276 IDE_VALID_DEVICE = BIT(6), 277 IDE_VALID_LBA = IDE_VALID_LBAL | 278 IDE_VALID_LBAM | 279 IDE_VALID_LBAH, 280 IDE_VALID_OUT_TF = IDE_VALID_FEATURE | 281 IDE_VALID_NSECT | 282 IDE_VALID_LBA, 283 IDE_VALID_IN_TF = IDE_VALID_NSECT | 284 IDE_VALID_LBA, 285 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF, 286 IDE_VALID_IN_HOB = IDE_VALID_ERROR | 287 IDE_VALID_NSECT | 288 IDE_VALID_LBA, 289}; 290 291enum { 292 IDE_TFLAG_LBA48 = BIT(0), 293 IDE_TFLAG_WRITE = BIT(1), 294 IDE_TFLAG_CUSTOM_HANDLER = BIT(2), 295 IDE_TFLAG_DMA_PIO_FALLBACK = BIT(3), 296 /* force 16-bit I/O operations */ 297 IDE_TFLAG_IO_16BIT = BIT(4), 298 /* struct ide_cmd was allocated using kmalloc() */ 299 IDE_TFLAG_DYN = BIT(5), 300 IDE_TFLAG_FS = BIT(6), 301 IDE_TFLAG_MULTI_PIO = BIT(7), 302 IDE_TFLAG_SET_XFER = BIT(8), 303}; 304 305enum { 306 IDE_FTFLAG_FLAGGED = BIT(0), 307 IDE_FTFLAG_SET_IN_FLAGS = BIT(1), 308 IDE_FTFLAG_OUT_DATA = BIT(2), 309 IDE_FTFLAG_IN_DATA = BIT(3), 310}; 311 312struct ide_taskfile { 313 u8 data; /* 0: data byte (for TASKFILE ioctl) */ 314 union { /* 1: */ 315 u8 error; /* read: error */ 316 u8 feature; /* write: feature */ 317 }; 318 u8 nsect; /* 2: number of sectors */ 319 u8 lbal; /* 3: LBA low */ 320 u8 lbam; /* 4: LBA mid */ 321 u8 lbah; /* 5: LBA high */ 322 u8 device; /* 6: device select */ 323 union { /* 7: */ 324 u8 status; /* read: status */ 325 u8 command; /* write: command */ 326 }; 327}; 328 329struct ide_cmd { 330 struct ide_taskfile tf; 331 struct ide_taskfile hob; 332 struct { 333 struct { 334 u8 tf; 335 u8 hob; 336 } out, in; 337 } valid; 338 339 u16 tf_flags; 340 u8 ftf_flags; /* for TASKFILE ioctl */ 341 int protocol; 342 343 int sg_nents; /* number of sg entries */ 344 int orig_sg_nents; 345 int sg_dma_direction; /* DMA transfer direction */ 346 347 unsigned int nbytes; 348 unsigned int nleft; 349 unsigned int last_xfer_len; 350 351 struct scatterlist *cursg; 352 unsigned int cursg_ofs; 353 354 struct request *rq; /* copy of request */ 355}; 356 357/* ATAPI packet command flags */ 358enum { 359 /* set when an error is considered normal - no retry (ide-tape) */ 360 PC_FLAG_ABORT = BIT(0), 361 PC_FLAG_SUPPRESS_ERROR = BIT(1), 362 PC_FLAG_WAIT_FOR_DSC = BIT(2), 363 PC_FLAG_DMA_OK = BIT(3), 364 PC_FLAG_DMA_IN_PROGRESS = BIT(4), 365 PC_FLAG_DMA_ERROR = BIT(5), 366 PC_FLAG_WRITING = BIT(6), 367}; 368 369#define ATAPI_WAIT_PC (60 * HZ) 370 371struct ide_atapi_pc { 372 /* actual packet bytes */ 373 u8 c[12]; 374 /* incremented on each retry */ 375 int retries; 376 int error; 377 378 /* bytes to transfer */ 379 int req_xfer; 380 381 /* the corresponding request */ 382 struct request *rq; 383 384 unsigned long flags; 385 386 /* 387 * those are more or less driver-specific and some of them are subject 388 * to change/removal later. 389 */ 390 unsigned long timeout; 391}; 392 393struct ide_devset; 394struct ide_driver; 395 396#ifdef CONFIG_BLK_DEV_IDEACPI 397struct ide_acpi_drive_link; 398struct ide_acpi_hwif_link; 399#endif 400 401struct ide_drive_s; 402 403struct ide_disk_ops { 404 int (*check)(struct ide_drive_s *, const char *); 405 int (*get_capacity)(struct ide_drive_s *); 406 void (*unlock_native_capacity)(struct ide_drive_s *); 407 void (*setup)(struct ide_drive_s *); 408 void (*flush)(struct ide_drive_s *); 409 int (*init_media)(struct ide_drive_s *, struct gendisk *); 410 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *, 411 int); 412 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *, 413 sector_t); 414 int (*ioctl)(struct ide_drive_s *, struct block_device *, 415 fmode_t, unsigned int, unsigned long); 416}; 417 418/* ATAPI device flags */ 419enum { 420 IDE_AFLAG_DRQ_INTERRUPT = BIT(0), 421 422 /* ide-cd */ 423 /* Drive cannot eject the disc. */ 424 IDE_AFLAG_NO_EJECT = BIT(1), 425 /* Drive is a pre ATAPI 1.2 drive. */ 426 IDE_AFLAG_PRE_ATAPI12 = BIT(2), 427 /* TOC addresses are in BCD. */ 428 IDE_AFLAG_TOCADDR_AS_BCD = BIT(3), 429 /* TOC track numbers are in BCD. */ 430 IDE_AFLAG_TOCTRACKS_AS_BCD = BIT(4), 431 /* Saved TOC information is current. */ 432 IDE_AFLAG_TOC_VALID = BIT(6), 433 /* We think that the drive door is locked. */ 434 IDE_AFLAG_DOOR_LOCKED = BIT(7), 435 /* SET_CD_SPEED command is unsupported. */ 436 IDE_AFLAG_NO_SPEED_SELECT = BIT(8), 437 IDE_AFLAG_VERTOS_300_SSD = BIT(9), 438 IDE_AFLAG_VERTOS_600_ESD = BIT(10), 439 IDE_AFLAG_SANYO_3CD = BIT(11), 440 IDE_AFLAG_FULL_CAPS_PAGE = BIT(12), 441 IDE_AFLAG_PLAY_AUDIO_OK = BIT(13), 442 IDE_AFLAG_LE_SPEED_FIELDS = BIT(14), 443 444 /* ide-floppy */ 445 /* Avoid commands not supported in Clik drive */ 446 IDE_AFLAG_CLIK_DRIVE = BIT(15), 447 /* Requires BH algorithm for packets */ 448 IDE_AFLAG_ZIP_DRIVE = BIT(16), 449 /* Supports format progress report */ 450 IDE_AFLAG_SRFP = BIT(17), 451 452 /* ide-tape */ 453 IDE_AFLAG_IGNORE_DSC = BIT(18), 454 /* 0 When the tape position is unknown */ 455 IDE_AFLAG_ADDRESS_VALID = BIT(19), 456 /* Device already opened */ 457 IDE_AFLAG_BUSY = BIT(20), 458 /* Attempt to auto-detect the current user block size */ 459 IDE_AFLAG_DETECT_BS = BIT(21), 460 /* Currently on a filemark */ 461 IDE_AFLAG_FILEMARK = BIT(22), 462 /* 0 = no tape is loaded, so we don't rewind after ejecting */ 463 IDE_AFLAG_MEDIUM_PRESENT = BIT(23), 464 465 IDE_AFLAG_NO_AUTOCLOSE = BIT(24), 466}; 467 468/* device flags */ 469enum { 470 /* restore settings after device reset */ 471 IDE_DFLAG_KEEP_SETTINGS = BIT(0), 472 /* device is using DMA for read/write */ 473 IDE_DFLAG_USING_DMA = BIT(1), 474 /* okay to unmask other IRQs */ 475 IDE_DFLAG_UNMASK = BIT(2), 476 /* don't attempt flushes */ 477 IDE_DFLAG_NOFLUSH = BIT(3), 478 /* DSC overlap */ 479 IDE_DFLAG_DSC_OVERLAP = BIT(4), 480 /* give potential excess bandwidth */ 481 IDE_DFLAG_NICE1 = BIT(5), 482 /* device is physically present */ 483 IDE_DFLAG_PRESENT = BIT(6), 484 /* disable Host Protected Area */ 485 IDE_DFLAG_NOHPA = BIT(7), 486 /* id read from device (synthetic if not set) */ 487 IDE_DFLAG_ID_READ = BIT(8), 488 IDE_DFLAG_NOPROBE = BIT(9), 489 /* need to do check_media_change() */ 490 IDE_DFLAG_REMOVABLE = BIT(10), 491 /* needed for removable devices */ 492 IDE_DFLAG_ATTACH = BIT(11), 493 IDE_DFLAG_FORCED_GEOM = BIT(12), 494 /* disallow setting unmask bit */ 495 IDE_DFLAG_NO_UNMASK = BIT(13), 496 /* disallow enabling 32-bit I/O */ 497 IDE_DFLAG_NO_IO_32BIT = BIT(14), 498 /* for removable only: door lock/unlock works */ 499 IDE_DFLAG_DOORLOCKING = BIT(15), 500 /* disallow DMA */ 501 IDE_DFLAG_NODMA = BIT(16), 502 /* powermanagement told us not to do anything, so sleep nicely */ 503 IDE_DFLAG_BLOCKED = BIT(17), 504 /* sleeping & sleep field valid */ 505 IDE_DFLAG_SLEEPING = BIT(18), 506 IDE_DFLAG_POST_RESET = BIT(19), 507 IDE_DFLAG_UDMA33_WARNED = BIT(20), 508 IDE_DFLAG_LBA48 = BIT(21), 509 /* status of write cache */ 510 IDE_DFLAG_WCACHE = BIT(22), 511 /* used for ignoring ATA_DF */ 512 IDE_DFLAG_NOWERR = BIT(23), 513 /* retrying in PIO */ 514 IDE_DFLAG_DMA_PIO_RETRY = BIT(24), 515 IDE_DFLAG_LBA = BIT(25), 516 /* don't unload heads */ 517 IDE_DFLAG_NO_UNLOAD = BIT(26), 518 /* heads unloaded, please don't reset port */ 519 IDE_DFLAG_PARKED = BIT(27), 520 IDE_DFLAG_MEDIA_CHANGED = BIT(28), 521 /* write protect */ 522 IDE_DFLAG_WP = BIT(29), 523 IDE_DFLAG_FORMAT_IN_PROGRESS = BIT(30), 524 IDE_DFLAG_NIEN_QUIRK = BIT(31), 525}; 526 527struct ide_drive_s { 528 char name[4]; /* drive name, such as "hda" */ 529 char driver_req[10]; /* requests specific driver */ 530 531 struct request_queue *queue; /* request queue */ 532 533 bool (*prep_rq)(struct ide_drive_s *, struct request *); 534 535 struct blk_mq_tag_set tag_set; 536 537 struct request *rq; /* current request */ 538 void *driver_data; /* extra driver data */ 539 u16 *id; /* identification info */ 540#ifdef CONFIG_IDE_PROC_FS 541 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ 542 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */ 543#endif 544 struct hwif_s *hwif; /* actually (ide_hwif_t *) */ 545 546 const struct ide_disk_ops *disk_ops; 547 548 unsigned long dev_flags; 549 550 unsigned long sleep; /* sleep until this time */ 551 unsigned long timeout; /* max time to wait for irq */ 552 553 u8 special_flags; /* special action flags */ 554 555 u8 select; /* basic drive/head select reg value */ 556 u8 retry_pio; /* retrying dma capable host in pio */ 557 u8 waiting_for_dma; /* dma currently in progress */ 558 u8 dma; /* atapi dma flag */ 559 560 u8 init_speed; /* transfer rate set at boot */ 561 u8 current_speed; /* current transfer rate set */ 562 u8 desired_speed; /* desired transfer rate set */ 563 u8 pio_mode; /* for ->set_pio_mode _only_ */ 564 u8 dma_mode; /* for ->set_dma_mode _only_ */ 565 u8 dn; /* now wide spread use */ 566 u8 acoustic; /* acoustic management */ 567 u8 media; /* disk, cdrom, tape, floppy, ... */ 568 u8 ready_stat; /* min status value for drive ready */ 569 u8 mult_count; /* current multiple sector setting */ 570 u8 mult_req; /* requested multiple sector setting */ 571 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ 572 u8 bad_wstat; /* used for ignoring ATA_DF */ 573 u8 head; /* "real" number of heads */ 574 u8 sect; /* "real" sectors per track */ 575 u8 bios_head; /* BIOS/fdisk/LILO number of heads */ 576 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ 577 578 /* delay this long before sending packet command */ 579 u8 pc_delay; 580 581 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ 582 unsigned int cyl; /* "real" number of cyls */ 583 void *drive_data; /* used by set_pio_mode/dev_select() */ 584 unsigned int failures; /* current failure count */ 585 unsigned int max_failures; /* maximum allowed failure count */ 586 u64 probed_capacity;/* initial/native media capacity */ 587 u64 capacity64; /* total number of sectors */ 588 589 int lun; /* logical unit */ 590 int crc_count; /* crc counter to reduce drive speed */ 591 592 unsigned long debug_mask; /* debugging levels switch */ 593 594#ifdef CONFIG_BLK_DEV_IDEACPI 595 struct ide_acpi_drive_link *acpidata; 596#endif 597 struct list_head list; 598 struct device gendev; 599 struct completion gendev_rel_comp; /* to deal with device release() */ 600 601 /* current packet command */ 602 struct ide_atapi_pc *pc; 603 604 /* last failed packet command */ 605 struct ide_atapi_pc *failed_pc; 606 607 /* callback for packet commands */ 608 int (*pc_callback)(struct ide_drive_s *, int); 609 610 ide_startstop_t (*irq_handler)(struct ide_drive_s *); 611 612 unsigned long atapi_flags; 613 614 struct ide_atapi_pc request_sense_pc; 615 616 /* current sense rq and buffer */ 617 bool sense_rq_armed; 618 bool sense_rq_active; 619 struct request *sense_rq; 620 struct request_sense sense_data; 621 622 /* async sense insertion */ 623 struct work_struct rq_work; 624 struct list_head rq_list; 625}; 626 627typedef struct ide_drive_s ide_drive_t; 628 629#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev) 630 631#define to_ide_drv(obj, cont_type) \ 632 container_of(obj, struct cont_type, dev) 633 634#define ide_drv_g(disk, cont_type) \ 635 container_of((disk)->private_data, struct cont_type, driver) 636 637struct ide_port_info; 638 639struct ide_tp_ops { 640 void (*exec_command)(struct hwif_s *, u8); 641 u8 (*read_status)(struct hwif_s *); 642 u8 (*read_altstatus)(struct hwif_s *); 643 void (*write_devctl)(struct hwif_s *, u8); 644 645 void (*dev_select)(ide_drive_t *); 646 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8); 647 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8); 648 649 void (*input_data)(ide_drive_t *, struct ide_cmd *, 650 void *, unsigned int); 651 void (*output_data)(ide_drive_t *, struct ide_cmd *, 652 void *, unsigned int); 653}; 654 655extern const struct ide_tp_ops default_tp_ops; 656 657/** 658 * struct ide_port_ops - IDE port operations 659 * 660 * @init_dev: host specific initialization of a device 661 * @set_pio_mode: routine to program host for PIO mode 662 * @set_dma_mode: routine to program host for DMA mode 663 * @reset_poll: chipset polling based on hba specifics 664 * @pre_reset: chipset specific changes to default for device-hba resets 665 * @resetproc: routine to reset controller after a disk reset 666 * @maskproc: special host masking for drive selection 667 * @quirkproc: check host's drive quirk list 668 * @clear_irq: clear IRQ 669 * 670 * @mdma_filter: filter MDMA modes 671 * @udma_filter: filter UDMA modes 672 * 673 * @cable_detect: detect cable type 674 */ 675struct ide_port_ops { 676 void (*init_dev)(ide_drive_t *); 677 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *); 678 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *); 679 blk_status_t (*reset_poll)(ide_drive_t *); 680 void (*pre_reset)(ide_drive_t *); 681 void (*resetproc)(ide_drive_t *); 682 void (*maskproc)(ide_drive_t *, int); 683 void (*quirkproc)(ide_drive_t *); 684 void (*clear_irq)(ide_drive_t *); 685 int (*test_irq)(struct hwif_s *); 686 687 u8 (*mdma_filter)(ide_drive_t *); 688 u8 (*udma_filter)(ide_drive_t *); 689 690 u8 (*cable_detect)(struct hwif_s *); 691}; 692 693struct ide_dma_ops { 694 void (*dma_host_set)(struct ide_drive_s *, int); 695 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *); 696 void (*dma_start)(struct ide_drive_s *); 697 int (*dma_end)(struct ide_drive_s *); 698 int (*dma_test_irq)(struct ide_drive_s *); 699 void (*dma_lost_irq)(struct ide_drive_s *); 700 /* below ones are optional */ 701 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *); 702 int (*dma_timer_expiry)(struct ide_drive_s *); 703 void (*dma_clear)(struct ide_drive_s *); 704 /* 705 * The following method is optional and only required to be 706 * implemented for the SFF-8038i compatible controllers. 707 */ 708 u8 (*dma_sff_read_status)(struct hwif_s *); 709}; 710 711enum { 712 IDE_PFLAG_PROBING = BIT(0), 713}; 714 715struct ide_host; 716 717typedef struct hwif_s { 718 struct hwif_s *mate; /* other hwif from same PCI chip */ 719 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ 720 721 struct ide_host *host; 722 723 char name[6]; /* name of interface, eg. "ide0" */ 724 725 struct ide_io_ports io_ports; 726 727 unsigned long sata_scr[SATA_NR_PORTS]; 728 729 ide_drive_t *devices[MAX_DRIVES + 1]; 730 731 unsigned long port_flags; 732 733 u8 major; /* our major number */ 734 u8 index; /* 0 for ide0; 1 for ide1; ... */ 735 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ 736 737 u32 host_flags; 738 739 u8 pio_mask; 740 741 u8 ultra_mask; 742 u8 mwdma_mask; 743 u8 swdma_mask; 744 745 u8 cbl; /* cable type */ 746 747 hwif_chipset_t chipset; /* sub-module for tuning.. */ 748 749 struct device *dev; 750 751 void (*rw_disk)(ide_drive_t *, struct request *); 752 753 const struct ide_tp_ops *tp_ops; 754 const struct ide_port_ops *port_ops; 755 const struct ide_dma_ops *dma_ops; 756 757 /* dma physical region descriptor table (cpu view) */ 758 unsigned int *dmatable_cpu; 759 /* dma physical region descriptor table (dma view) */ 760 dma_addr_t dmatable_dma; 761 762 /* maximum number of PRD table entries */ 763 int prd_max_nents; 764 /* PRD entry size in bytes */ 765 int prd_ent_size; 766 767 /* Scatter-gather list used to build the above */ 768 struct scatterlist *sg_table; 769 int sg_max_nents; /* Maximum number of entries in it */ 770 771 struct ide_cmd cmd; /* current command */ 772 773 int rqsize; /* max sectors per request */ 774 int irq; /* our irq number */ 775 776 unsigned long dma_base; /* base addr for dma ports */ 777 778 unsigned long config_data; /* for use by chipset-specific code */ 779 unsigned long select_data; /* for use by chipset-specific code */ 780 781 unsigned long extra_base; /* extra addr for dma ports */ 782 unsigned extra_ports; /* number of extra dma ports */ 783 784 unsigned present : 1; /* this interface exists */ 785 unsigned busy : 1; /* serializes devices on a port */ 786 787 struct device gendev; 788 struct device *portdev; 789 790 struct completion gendev_rel_comp; /* To deal with device release() */ 791 792 void *hwif_data; /* extra hwif data */ 793 794#ifdef CONFIG_BLK_DEV_IDEACPI 795 struct ide_acpi_hwif_link *acpidata; 796#endif 797 798 /* IRQ handler, if active */ 799 ide_startstop_t (*handler)(ide_drive_t *); 800 801 /* BOOL: polling active & poll_timeout field valid */ 802 unsigned int polling : 1; 803 804 /* current drive */ 805 ide_drive_t *cur_dev; 806 807 /* current request */ 808 struct request *rq; 809 810 /* failsafe timer */ 811 struct timer_list timer; 812 /* timeout value during long polls */ 813 unsigned long poll_timeout; 814 /* queried upon timeouts */ 815 int (*expiry)(ide_drive_t *); 816 817 int req_gen; 818 int req_gen_timer; 819 820 spinlock_t lock; 821} ____cacheline_internodealigned_in_smp ide_hwif_t; 822 823#define MAX_HOST_PORTS 4 824 825struct ide_host { 826 ide_hwif_t *ports[MAX_HOST_PORTS + 1]; 827 unsigned int n_ports; 828 struct device *dev[2]; 829 830 int (*init_chipset)(struct pci_dev *); 831 832 void (*get_lock)(irq_handler_t, void *); 833 void (*release_lock)(void); 834 835 irq_handler_t irq_handler; 836 837 unsigned long host_flags; 838 839 int irq_flags; 840 841 void *host_priv; 842 ide_hwif_t *cur_port; /* for hosts requiring serialization */ 843 844 /* used for hosts requiring serialization */ 845 volatile unsigned long host_busy; 846}; 847 848#define IDE_HOST_BUSY 0 849 850/* 851 * internal ide interrupt handler type 852 */ 853typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); 854typedef int (ide_expiry_t)(ide_drive_t *); 855 856/* used by ide-cd, ide-floppy, etc. */ 857typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned); 858 859extern struct mutex ide_setting_mtx; 860 861/* 862 * configurable drive settings 863 */ 864 865#define DS_SYNC BIT(0) 866 867struct ide_devset { 868 int (*get)(ide_drive_t *); 869 int (*set)(ide_drive_t *, int); 870 unsigned int flags; 871}; 872 873#define __DEVSET(_flags, _get, _set) { \ 874 .flags = _flags, \ 875 .get = _get, \ 876 .set = _set, \ 877} 878 879#define ide_devset_get(name, field) \ 880static int get_##name(ide_drive_t *drive) \ 881{ \ 882 return drive->field; \ 883} 884 885#define ide_devset_set(name, field) \ 886static int set_##name(ide_drive_t *drive, int arg) \ 887{ \ 888 drive->field = arg; \ 889 return 0; \ 890} 891 892#define ide_devset_get_flag(name, flag) \ 893static int get_##name(ide_drive_t *drive) \ 894{ \ 895 return !!(drive->dev_flags & flag); \ 896} 897 898#define ide_devset_set_flag(name, flag) \ 899static int set_##name(ide_drive_t *drive, int arg) \ 900{ \ 901 if (arg) \ 902 drive->dev_flags |= flag; \ 903 else \ 904 drive->dev_flags &= ~flag; \ 905 return 0; \ 906} 907 908#define __IDE_DEVSET(_name, _flags, _get, _set) \ 909const struct ide_devset ide_devset_##_name = \ 910 __DEVSET(_flags, _get, _set) 911 912#define IDE_DEVSET(_name, _flags, _get, _set) \ 913static __IDE_DEVSET(_name, _flags, _get, _set) 914 915#define ide_devset_rw(_name, _func) \ 916IDE_DEVSET(_name, 0, get_##_func, set_##_func) 917 918#define ide_devset_w(_name, _func) \ 919IDE_DEVSET(_name, 0, NULL, set_##_func) 920 921#define ide_ext_devset_rw(_name, _func) \ 922__IDE_DEVSET(_name, 0, get_##_func, set_##_func) 923 924#define ide_ext_devset_rw_sync(_name, _func) \ 925__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func) 926 927#define ide_decl_devset(_name) \ 928extern const struct ide_devset ide_devset_##_name 929 930ide_decl_devset(io_32bit); 931ide_decl_devset(keepsettings); 932ide_decl_devset(pio_mode); 933ide_decl_devset(unmaskirq); 934ide_decl_devset(using_dma); 935 936#ifdef CONFIG_IDE_PROC_FS 937/* 938 * /proc/ide interface 939 */ 940 941#define ide_devset_rw_field(_name, _field) \ 942ide_devset_get(_name, _field); \ 943ide_devset_set(_name, _field); \ 944IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) 945 946#define ide_devset_rw_flag(_name, _field) \ 947ide_devset_get_flag(_name, _field); \ 948ide_devset_set_flag(_name, _field); \ 949IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) 950 951struct ide_proc_devset { 952 const char *name; 953 const struct ide_devset *setting; 954 int min, max; 955 int (*mulf)(ide_drive_t *); 956 int (*divf)(ide_drive_t *); 957}; 958 959#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \ 960 .name = __stringify(_name), \ 961 .setting = &ide_devset_##_name, \ 962 .min = _min, \ 963 .max = _max, \ 964 .mulf = _mulf, \ 965 .divf = _divf, \ 966} 967 968#define IDE_PROC_DEVSET(_name, _min, _max) \ 969__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL) 970 971typedef struct { 972 const char *name; 973 umode_t mode; 974 int (*show)(struct seq_file *, void *); 975} ide_proc_entry_t; 976 977void proc_ide_create(void); 978void proc_ide_destroy(void); 979void ide_proc_register_port(ide_hwif_t *); 980void ide_proc_port_register_devices(ide_hwif_t *); 981void ide_proc_unregister_device(ide_drive_t *); 982void ide_proc_unregister_port(ide_hwif_t *); 983void ide_proc_register_driver(ide_drive_t *, struct ide_driver *); 984void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *); 985 986int ide_capacity_proc_show(struct seq_file *m, void *v); 987int ide_geometry_proc_show(struct seq_file *m, void *v); 988#else 989static inline void proc_ide_create(void) { ; } 990static inline void proc_ide_destroy(void) { ; } 991static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } 992static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } 993static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } 994static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } 995static inline void ide_proc_register_driver(ide_drive_t *drive, 996 struct ide_driver *driver) { ; } 997static inline void ide_proc_unregister_driver(ide_drive_t *drive, 998 struct ide_driver *driver) { ; } 999#endif 1000 1001enum { 1002 /* enter/exit functions */ 1003 IDE_DBG_FUNC = BIT(0), 1004 /* sense key/asc handling */ 1005 IDE_DBG_SENSE = BIT(1), 1006 /* packet commands handling */ 1007 IDE_DBG_PC = BIT(2), 1008 /* request handling */ 1009 IDE_DBG_RQ = BIT(3), 1010 /* driver probing/setup */ 1011 IDE_DBG_PROBE = BIT(4), 1012}; 1013 1014/* DRV_NAME has to be defined in the driver before using the macro below */ 1015#define __ide_debug_log(lvl, fmt, args...) \ 1016{ \ 1017 if (unlikely(drive->debug_mask & lvl)) \ 1018 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \ 1019 __func__, ## args); \ 1020} 1021 1022/* 1023 * Power Management state machine (rq->pm->pm_step). 1024 * 1025 * For each step, the core calls ide_start_power_step() first. 1026 * This can return: 1027 * - ide_stopped : In this case, the core calls us back again unless 1028 * step have been set to ide_power_state_completed. 1029 * - ide_started : In this case, the channel is left busy until an 1030 * async event (interrupt) occurs. 1031 * Typically, ide_start_power_step() will issue a taskfile request with 1032 * do_rw_taskfile(). 1033 * 1034 * Upon reception of the interrupt, the core will call ide_complete_power_step() 1035 * with the error code if any. This routine should update the step value 1036 * and return. It should not start a new request. The core will call 1037 * ide_start_power_step() for the new step value, unless step have been 1038 * set to IDE_PM_COMPLETED. 1039 */ 1040enum { 1041 IDE_PM_START_SUSPEND, 1042 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND, 1043 IDE_PM_STANDBY, 1044 1045 IDE_PM_START_RESUME, 1046 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME, 1047 IDE_PM_IDLE, 1048 IDE_PM_RESTORE_DMA, 1049 1050 IDE_PM_COMPLETED, 1051}; 1052 1053int generic_ide_suspend(struct device *, pm_message_t); 1054int generic_ide_resume(struct device *); 1055 1056void ide_complete_power_step(ide_drive_t *, struct request *); 1057ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *); 1058void ide_complete_pm_rq(ide_drive_t *, struct request *); 1059void ide_check_pm_state(ide_drive_t *, struct request *); 1060 1061/* 1062 * Subdrivers support. 1063 * 1064 * The gendriver.owner field should be set to the module owner of this driver. 1065 * The gendriver.name field should be set to the name of this driver 1066 */ 1067struct ide_driver { 1068 const char *version; 1069 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); 1070 struct device_driver gen_driver; 1071 int (*probe)(ide_drive_t *); 1072 void (*remove)(ide_drive_t *); 1073 void (*resume)(ide_drive_t *); 1074 void (*shutdown)(ide_drive_t *); 1075#ifdef CONFIG_IDE_PROC_FS 1076 ide_proc_entry_t * (*proc_entries)(ide_drive_t *); 1077 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *); 1078#endif 1079}; 1080 1081#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver) 1082 1083int ide_device_get(ide_drive_t *); 1084void ide_device_put(ide_drive_t *); 1085 1086struct ide_ioctl_devset { 1087 unsigned int get_ioctl; 1088 unsigned int set_ioctl; 1089 const struct ide_devset *setting; 1090}; 1091 1092int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, 1093 unsigned long, const struct ide_ioctl_devset *); 1094 1095int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long); 1096 1097extern int ide_vlb_clk; 1098extern int ide_pci_clk; 1099 1100int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int); 1101void ide_kill_rq(ide_drive_t *, struct request *); 1102void ide_insert_request_head(ide_drive_t *, struct request *); 1103 1104void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); 1105void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int); 1106 1107void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *, 1108 unsigned int); 1109 1110void ide_pad_transfer(ide_drive_t *, int, int); 1111 1112ide_startstop_t ide_error(ide_drive_t *, const char *, u8); 1113 1114void ide_fix_driveid(u16 *); 1115 1116extern void ide_fixstring(u8 *, const int, const int); 1117 1118int ide_busy_sleep(ide_drive_t *, unsigned long, int); 1119 1120int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *); 1121int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); 1122 1123ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *); 1124ide_startstop_t ide_do_devset(ide_drive_t *, struct request *); 1125 1126extern ide_startstop_t ide_do_reset (ide_drive_t *); 1127 1128extern int ide_devset_execute(ide_drive_t *drive, 1129 const struct ide_devset *setting, int arg); 1130 1131void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8); 1132int ide_complete_rq(ide_drive_t *, blk_status_t, unsigned int); 1133 1134void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd); 1135void ide_tf_dump(const char *, struct ide_cmd *); 1136 1137void ide_exec_command(ide_hwif_t *, u8); 1138u8 ide_read_status(ide_hwif_t *); 1139u8 ide_read_altstatus(ide_hwif_t *); 1140void ide_write_devctl(ide_hwif_t *, u8); 1141 1142void ide_dev_select(ide_drive_t *); 1143void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8); 1144void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8); 1145 1146void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); 1147void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int); 1148 1149void SELECT_MASK(ide_drive_t *, int); 1150 1151u8 ide_read_error(ide_drive_t *); 1152void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *); 1153 1154int ide_check_ireason(ide_drive_t *, struct request *, int, int, int); 1155 1156int ide_check_atapi_device(ide_drive_t *, const char *); 1157 1158void ide_init_pc(struct ide_atapi_pc *); 1159 1160/* Disk head parking */ 1161extern wait_queue_head_t ide_park_wq; 1162ssize_t ide_park_show(struct device *dev, struct device_attribute *attr, 1163 char *buf); 1164ssize_t ide_park_store(struct device *dev, struct device_attribute *attr, 1165 const char *buf, size_t len); 1166 1167/* 1168 * Special requests for ide-tape block device strategy routine. 1169 * 1170 * In order to service a character device command, we add special requests to 1171 * the tail of our block device request queue and wait for their completion. 1172 */ 1173enum { 1174 REQ_IDETAPE_PC1 = BIT(0), /* packet command (first stage) */ 1175 REQ_IDETAPE_PC2 = BIT(1), /* packet command (second stage) */ 1176 REQ_IDETAPE_READ = BIT(2), 1177 REQ_IDETAPE_WRITE = BIT(3), 1178}; 1179 1180int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *, 1181 void *, unsigned int); 1182 1183int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *); 1184int ide_do_start_stop(ide_drive_t *, struct gendisk *, int); 1185int ide_set_media_lock(ide_drive_t *, struct gendisk *, int); 1186void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *); 1187void ide_retry_pc(ide_drive_t *drive); 1188 1189void ide_prep_sense(ide_drive_t *drive, struct request *rq); 1190int ide_queue_sense_rq(ide_drive_t *drive, void *special); 1191 1192int ide_cd_expiry(ide_drive_t *); 1193 1194int ide_cd_get_xferlen(struct request *); 1195 1196ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *); 1197 1198ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *); 1199 1200void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int); 1201 1202void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8); 1203 1204int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16); 1205int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *); 1206 1207int ide_taskfile_ioctl(ide_drive_t *, unsigned long); 1208 1209int ide_dev_read_id(ide_drive_t *, u8, u16 *, int); 1210 1211extern int ide_driveid_update(ide_drive_t *); 1212extern int ide_config_drive_speed(ide_drive_t *, u8); 1213extern u8 eighty_ninty_three (ide_drive_t *); 1214extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); 1215 1216extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); 1217 1218extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); 1219 1220extern void ide_timer_expiry(struct timer_list *t); 1221extern irqreturn_t ide_intr(int irq, void *dev_id); 1222extern blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *); 1223extern blk_status_t ide_issue_rq(ide_drive_t *, struct request *, bool); 1224extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq); 1225 1226void ide_init_disk(struct gendisk *, ide_drive_t *); 1227 1228#ifdef CONFIG_IDEPCI_PCIBUS_ORDER 1229extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); 1230#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) 1231#else 1232#define ide_pci_register_driver(d) pci_register_driver(d) 1233#endif 1234 1235static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) 1236{ 1237 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) 1238 return 1; 1239 return 0; 1240} 1241 1242void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, 1243 struct ide_hw *, struct ide_hw **); 1244void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); 1245 1246#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 1247int ide_pci_set_master(struct pci_dev *, const char *); 1248unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *); 1249int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *); 1250int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); 1251#else 1252static inline int ide_hwif_setup_dma(ide_hwif_t *hwif, 1253 const struct ide_port_info *d) 1254{ 1255 return -EINVAL; 1256} 1257#endif 1258 1259struct ide_pci_enablebit { 1260 u8 reg; /* byte pci reg holding the enable-bit */ 1261 u8 mask; /* mask to isolate the enable-bit */ 1262 u8 val; /* value of masked reg when "enabled" */ 1263}; 1264 1265enum { 1266 /* Uses ISA control ports not PCI ones. */ 1267 IDE_HFLAG_ISA_PORTS = BIT(0), 1268 /* single port device */ 1269 IDE_HFLAG_SINGLE = BIT(1), 1270 /* don't use legacy PIO blacklist */ 1271 IDE_HFLAG_PIO_NO_BLACKLIST = BIT(2), 1272 /* set for the second port of QD65xx */ 1273 IDE_HFLAG_QD_2ND_PORT = BIT(3), 1274 /* use PIO8/9 for prefetch off/on */ 1275 IDE_HFLAG_ABUSE_PREFETCH = BIT(4), 1276 /* use PIO6/7 for fast-devsel off/on */ 1277 IDE_HFLAG_ABUSE_FAST_DEVSEL = BIT(5), 1278 /* use 100-102 and 200-202 PIO values to set DMA modes */ 1279 IDE_HFLAG_ABUSE_DMA_MODES = BIT(6), 1280 /* 1281 * keep DMA setting when programming PIO mode, may be used only 1282 * for hosts which have separate PIO and DMA timings (ie. PMAC) 1283 */ 1284 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = BIT(7), 1285 /* program host for the transfer mode after programming device */ 1286 IDE_HFLAG_POST_SET_MODE = BIT(8), 1287 /* don't program host/device for the transfer mode ("smart" hosts) */ 1288 IDE_HFLAG_NO_SET_MODE = BIT(9), 1289 /* trust BIOS for programming chipset/device for DMA */ 1290 IDE_HFLAG_TRUST_BIOS_FOR_DMA = BIT(10), 1291 /* host is CS5510/CS5520 */ 1292 IDE_HFLAG_CS5520 = BIT(11), 1293 /* ATAPI DMA is unsupported */ 1294 IDE_HFLAG_NO_ATAPI_DMA = BIT(12), 1295 /* set if host is a "non-bootable" controller */ 1296 IDE_HFLAG_NON_BOOTABLE = BIT(13), 1297 /* host doesn't support DMA */ 1298 IDE_HFLAG_NO_DMA = BIT(14), 1299 /* check if host is PCI IDE device before allowing DMA */ 1300 IDE_HFLAG_NO_AUTODMA = BIT(15), 1301 /* host uses MMIO */ 1302 IDE_HFLAG_MMIO = BIT(16), 1303 /* no LBA48 */ 1304 IDE_HFLAG_NO_LBA48 = BIT(17), 1305 /* no LBA48 DMA */ 1306 IDE_HFLAG_NO_LBA48_DMA = BIT(18), 1307 /* data FIFO is cleared by an error */ 1308 IDE_HFLAG_ERROR_STOPS_FIFO = BIT(19), 1309 /* serialize ports */ 1310 IDE_HFLAG_SERIALIZE = BIT(20), 1311 /* host is DTC2278 */ 1312 IDE_HFLAG_DTC2278 = BIT(21), 1313 /* 4 devices on a single set of I/O ports */ 1314 IDE_HFLAG_4DRIVES = BIT(22), 1315 /* host is TRM290 */ 1316 IDE_HFLAG_TRM290 = BIT(23), 1317 /* use 32-bit I/O ops */ 1318 IDE_HFLAG_IO_32BIT = BIT(24), 1319 /* unmask IRQs */ 1320 IDE_HFLAG_UNMASK_IRQS = BIT(25), 1321 IDE_HFLAG_BROKEN_ALTSTATUS = BIT(26), 1322 /* serialize ports if DMA is possible (for sl82c105) */ 1323 IDE_HFLAG_SERIALIZE_DMA = BIT(27), 1324 /* force host out of "simplex" mode */ 1325 IDE_HFLAG_CLEAR_SIMPLEX = BIT(28), 1326 /* DSC overlap is unsupported */ 1327 IDE_HFLAG_NO_DSC = BIT(29), 1328 /* never use 32-bit I/O ops */ 1329 IDE_HFLAG_NO_IO_32BIT = BIT(30), 1330 /* never unmask IRQs */ 1331 IDE_HFLAG_NO_UNMASK_IRQS = BIT(31), 1332}; 1333 1334#ifdef CONFIG_BLK_DEV_OFFBOARD 1335# define IDE_HFLAG_OFF_BOARD 0 1336#else 1337# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE 1338#endif 1339 1340struct ide_port_info { 1341 char *name; 1342 1343 int (*init_chipset)(struct pci_dev *); 1344 1345 void (*get_lock)(irq_handler_t, void *); 1346 void (*release_lock)(void); 1347 1348 void (*init_iops)(ide_hwif_t *); 1349 void (*init_hwif)(ide_hwif_t *); 1350 int (*init_dma)(ide_hwif_t *, 1351 const struct ide_port_info *); 1352 1353 const struct ide_tp_ops *tp_ops; 1354 const struct ide_port_ops *port_ops; 1355 const struct ide_dma_ops *dma_ops; 1356 1357 struct ide_pci_enablebit enablebits[2]; 1358 1359 hwif_chipset_t chipset; 1360 1361 u16 max_sectors; /* if < than the default one */ 1362 1363 u32 host_flags; 1364 1365 int irq_flags; 1366 1367 u8 pio_mask; 1368 u8 swdma_mask; 1369 u8 mwdma_mask; 1370 u8 udma_mask; 1371}; 1372 1373/* 1374 * State information carried for REQ_TYPE_ATA_PM_SUSPEND and REQ_TYPE_ATA_PM_RESUME 1375 * requests. 1376 */ 1377struct ide_pm_state { 1378 /* PM state machine step value, currently driver specific */ 1379 int pm_step; 1380 /* requested PM state value (S1, S2, S3, S4, ...) */ 1381 u32 pm_state; 1382 void* data; /* for driver use */ 1383}; 1384 1385 1386int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *); 1387int ide_pci_init_two(struct pci_dev *, struct pci_dev *, 1388 const struct ide_port_info *, void *); 1389void ide_pci_remove(struct pci_dev *); 1390 1391#ifdef CONFIG_PM 1392int ide_pci_suspend(struct pci_dev *, pm_message_t); 1393int ide_pci_resume(struct pci_dev *); 1394#else 1395#define ide_pci_suspend NULL 1396#define ide_pci_resume NULL 1397#endif 1398 1399void ide_map_sg(ide_drive_t *, struct ide_cmd *); 1400void ide_init_sg_cmd(struct ide_cmd *, unsigned int); 1401 1402#define BAD_DMA_DRIVE 0 1403#define GOOD_DMA_DRIVE 1 1404 1405struct drive_list_entry { 1406 const char *id_model; 1407 const char *id_firmware; 1408}; 1409 1410int ide_in_drive_list(u16 *, const struct drive_list_entry *); 1411 1412#ifdef CONFIG_BLK_DEV_IDEDMA 1413int ide_dma_good_drive(ide_drive_t *); 1414int __ide_dma_bad_drive(ide_drive_t *); 1415 1416u8 ide_find_dma_mode(ide_drive_t *, u8); 1417 1418static inline u8 ide_max_dma_mode(ide_drive_t *drive) 1419{ 1420 return ide_find_dma_mode(drive, XFER_UDMA_6); 1421} 1422 1423void ide_dma_off_quietly(ide_drive_t *); 1424void ide_dma_off(ide_drive_t *); 1425void ide_dma_on(ide_drive_t *); 1426int ide_set_dma(ide_drive_t *); 1427void ide_check_dma_crc(ide_drive_t *); 1428ide_startstop_t ide_dma_intr(ide_drive_t *); 1429 1430int ide_allocate_dma_engine(ide_hwif_t *); 1431void ide_release_dma_engine(ide_hwif_t *); 1432 1433int ide_dma_prepare(ide_drive_t *, struct ide_cmd *); 1434void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *); 1435 1436#ifdef CONFIG_BLK_DEV_IDEDMA_SFF 1437int config_drive_for_dma(ide_drive_t *); 1438int ide_build_dmatable(ide_drive_t *, struct ide_cmd *); 1439void ide_dma_host_set(ide_drive_t *, int); 1440int ide_dma_setup(ide_drive_t *, struct ide_cmd *); 1441extern void ide_dma_start(ide_drive_t *); 1442int ide_dma_end(ide_drive_t *); 1443int ide_dma_test_irq(ide_drive_t *); 1444int ide_dma_sff_timer_expiry(ide_drive_t *); 1445u8 ide_dma_sff_read_status(ide_hwif_t *); 1446extern const struct ide_dma_ops sff_dma_ops; 1447#else 1448static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } 1449#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ 1450 1451void ide_dma_lost_irq(ide_drive_t *); 1452ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int); 1453 1454#else 1455static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } 1456static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } 1457static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } 1458static inline void ide_dma_off(ide_drive_t *drive) { ; } 1459static inline void ide_dma_on(ide_drive_t *drive) { ; } 1460static inline void ide_dma_verbose(ide_drive_t *drive) { ; } 1461static inline int ide_set_dma(ide_drive_t *drive) { return 1; } 1462static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } 1463static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; } 1464static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; } 1465static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } 1466static inline int ide_dma_prepare(ide_drive_t *drive, 1467 struct ide_cmd *cmd) { return 1; } 1468static inline void ide_dma_unmap_sg(ide_drive_t *drive, 1469 struct ide_cmd *cmd) { ; } 1470#endif /* CONFIG_BLK_DEV_IDEDMA */ 1471 1472#ifdef CONFIG_BLK_DEV_IDEACPI 1473int ide_acpi_init(void); 1474bool ide_port_acpi(ide_hwif_t *hwif); 1475extern int ide_acpi_exec_tfs(ide_drive_t *drive); 1476extern void ide_acpi_get_timing(ide_hwif_t *hwif); 1477extern void ide_acpi_push_timing(ide_hwif_t *hwif); 1478void ide_acpi_init_port(ide_hwif_t *); 1479void ide_acpi_port_init_devices(ide_hwif_t *); 1480extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); 1481#else 1482static inline int ide_acpi_init(void) { return 0; } 1483static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; } 1484static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } 1485static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } 1486static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } 1487static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; } 1488static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } 1489static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} 1490#endif 1491 1492void ide_register_region(struct gendisk *); 1493void ide_unregister_region(struct gendisk *); 1494 1495void ide_check_nien_quirk_list(ide_drive_t *); 1496void ide_undecoded_slave(ide_drive_t *); 1497 1498void ide_port_apply_params(ide_hwif_t *); 1499int ide_sysfs_register_port(ide_hwif_t *); 1500 1501struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **, 1502 unsigned int); 1503void ide_host_free(struct ide_host *); 1504int ide_host_register(struct ide_host *, const struct ide_port_info *, 1505 struct ide_hw **); 1506int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int, 1507 struct ide_host **); 1508void ide_host_remove(struct ide_host *); 1509int ide_legacy_device_add(const struct ide_port_info *, unsigned long); 1510void ide_port_unregister_devices(ide_hwif_t *); 1511void ide_port_scan(ide_hwif_t *); 1512 1513static inline void *ide_get_hwifdata (ide_hwif_t * hwif) 1514{ 1515 return hwif->hwif_data; 1516} 1517 1518static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) 1519{ 1520 hwif->hwif_data = data; 1521} 1522 1523u64 ide_get_lba_addr(struct ide_cmd *, int); 1524u8 ide_dump_status(ide_drive_t *, const char *, u8); 1525 1526struct ide_timing { 1527 u8 mode; 1528 u8 setup; /* t1 */ 1529 u16 act8b; /* t2 for 8-bit io */ 1530 u16 rec8b; /* t2i for 8-bit io */ 1531 u16 cyc8b; /* t0 for 8-bit io */ 1532 u16 active; /* t2 or tD */ 1533 u16 recover; /* t2i or tK */ 1534 u16 cycle; /* t0 */ 1535 u16 udma; /* t2CYCTYP/2 */ 1536}; 1537 1538enum { 1539 IDE_TIMING_SETUP = BIT(0), 1540 IDE_TIMING_ACT8B = BIT(1), 1541 IDE_TIMING_REC8B = BIT(2), 1542 IDE_TIMING_CYC8B = BIT(3), 1543 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | 1544 IDE_TIMING_CYC8B, 1545 IDE_TIMING_ACTIVE = BIT(4), 1546 IDE_TIMING_RECOVER = BIT(5), 1547 IDE_TIMING_CYCLE = BIT(6), 1548 IDE_TIMING_UDMA = BIT(7), 1549 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | 1550 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | 1551 IDE_TIMING_CYCLE | IDE_TIMING_UDMA, 1552}; 1553 1554struct ide_timing *ide_timing_find_mode(u8); 1555u16 ide_pio_cycle_time(ide_drive_t *, u8); 1556void ide_timing_merge(struct ide_timing *, struct ide_timing *, 1557 struct ide_timing *, unsigned int); 1558int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int); 1559 1560#ifdef CONFIG_IDE_XFER_MODE 1561int ide_scan_pio_blacklist(char *); 1562const char *ide_xfer_verbose(u8); 1563int ide_pio_need_iordy(ide_drive_t *, const u8); 1564int ide_set_pio_mode(ide_drive_t *, u8); 1565int ide_set_dma_mode(ide_drive_t *, u8); 1566void ide_set_pio(ide_drive_t *, u8); 1567int ide_set_xfer_rate(ide_drive_t *, u8); 1568#else 1569static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; } 1570static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; } 1571#endif 1572 1573static inline void ide_set_max_pio(ide_drive_t *drive) 1574{ 1575 ide_set_pio(drive, 255); 1576} 1577 1578char *ide_media_string(ide_drive_t *); 1579 1580extern const struct attribute_group *ide_dev_groups[]; 1581extern struct bus_type ide_bus_type; 1582extern struct class *ide_port_class; 1583 1584static inline void ide_dump_identify(u8 *id) 1585{ 1586 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); 1587} 1588 1589static inline int hwif_to_node(ide_hwif_t *hwif) 1590{ 1591 return hwif->dev ? dev_to_node(hwif->dev) : -1; 1592} 1593 1594static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive) 1595{ 1596 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1]; 1597 1598 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; 1599} 1600 1601static inline void *ide_get_drivedata(ide_drive_t *drive) 1602{ 1603 return drive->drive_data; 1604} 1605 1606static inline void ide_set_drivedata(ide_drive_t *drive, void *data) 1607{ 1608 drive->drive_data = data; 1609} 1610 1611#define ide_port_for_each_dev(i, dev, port) \ 1612 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) 1613 1614#define ide_port_for_each_present_dev(i, dev, port) \ 1615 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \ 1616 if ((dev)->dev_flags & IDE_DFLAG_PRESENT) 1617 1618#define ide_host_for_each_port(i, port, host) \ 1619 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++) 1620 1621 1622#endif /* _IDE_H */