tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1* Marvell Armada 375 Ethernet Controller (PPv2.1)
2 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
3
4Required properties:
5
6- compatible: should be one of:
7 "marvell,armada-375-pp2"
8 "marvell,armada-7k-pp2"
9- reg: addresses and length of the register sets for the device.
10 For "marvell,armada-375-pp2", must contain the following register
11 sets:
12 - common controller registers
13 - LMS registers
14 - one register area per Ethernet port
15 For "marvell,armada-7k-pp2", must contain the following register
16 sets:
17 - packet processor registers
18 - networking interfaces registers
19
20- clocks: pointers to the reference clocks for this device, consequently:
21 - main controller clock (for both armada-375-pp2 and armada-7k-pp2)
22 - GOP clock (for both armada-375-pp2 and armada-7k-pp2)
23 - MG clock (only for armada-7k-pp2)
24 - MG Core clock (only for armada-7k-pp2)
25 - AXI clock (only for armada-7k-pp2)
26- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
27 "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
28
29The ethernet ports are represented by subnodes. At least one port is
30required.
31
32Required properties (port):
33
34- interrupts: interrupt(s) for the port
35- port-id: ID of the port from the MAC point of view
36- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
37 GOP (Group Of Ports) point of view. This ID is used to index the
38 per-port registers in the second register area.
39- phy-mode: See ethernet.txt file in the same directory
40
41Optional properties (port):
42
43- marvell,loopback: port is loopback mode
44- phy: a phandle to a phy node defining the PHY address (as the reg
45 property, a single integer).
46- interrupt-names: if more than a single interrupt for is given, must be the
47 name associated to the interrupts listed. Valid names are:
48 "hifX", with X in [0..8], and "link". The names "tx-cpu0",
49 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
50 for backward compatibility but shouldn't be used for new
51 additions.
52- marvell,system-controller: a phandle to the system controller.
53
54Example for marvell,armada-375-pp2:
55
56ethernet@f0000 {
57 compatible = "marvell,armada-375-pp2";
58 reg = <0xf0000 0xa000>,
59 <0xc0000 0x3060>,
60 <0xc4000 0x100>,
61 <0xc5000 0x100>;
62 clocks = <&gateclk 3>, <&gateclk 19>;
63 clock-names = "pp_clk", "gop_clk";
64
65 eth0: eth0@c4000 {
66 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
67 port-id = <0>;
68 phy = <&phy0>;
69 phy-mode = "gmii";
70 };
71
72 eth1: eth1@c5000 {
73 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
74 port-id = <1>;
75 phy = <&phy3>;
76 phy-mode = "gmii";
77 };
78};
79
80Example for marvell,armada-7k-pp2:
81
82cpm_ethernet: ethernet@0 {
83 compatible = "marvell,armada-7k-pp22";
84 reg = <0x0 0x100000>, <0x129000 0xb000>;
85 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
86 <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
87 clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
88
89 eth0: eth0 {
90 interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
91 <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
92 <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
93 <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
94 <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,
95 <ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,
96 <ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,
97 <ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,
98 <ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,
99 <ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;
100 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
101 "hif5", "hif6", "hif7", "hif8", "link";
102 port-id = <0>;
103 gop-port-id = <0>;
104 };
105
106 eth1: eth1 {
107 interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
108 <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
109 <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
110 <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
111 <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,
112 <ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,
113 <ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,
114 <ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,
115 <ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,
116 <ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
118 "hif5", "hif6", "hif7", "hif8", "link";
119 port-id = <1>;
120 gop-port-id = <2>;
121 };
122
123 eth2: eth2 {
124 interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
125 <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
126 <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
127 <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
128 <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,
129 <ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,
130 <ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,
131 <ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,
132 <ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,
133 <ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
135 "hif5", "hif6", "hif7", "hif8", "link";
136 port-id = <2>;
137 gop-port-id = <3>;
138 };
139};