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at v5.4-rc5 35 lines 812 B view raw
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Copyright 2009 Freescale Semiconductor, Inc. 4 * 5 * Cache SRAM handling for QorIQ platform 6 * 7 * Author: Vivek Mahajan <vivek.mahajan@freescale.com> 8 9 * This file is derived from the original work done 10 * by Sylvain Munaut for the Bestcomm SRAM allocator. 11 */ 12 13#ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ 14#define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__ 15 16#include <asm/rheap.h> 17#include <linux/spinlock.h> 18 19/* 20 * Cache-SRAM 21 */ 22 23struct mpc85xx_cache_sram { 24 phys_addr_t base_phys; 25 void *base_virt; 26 unsigned int size; 27 rh_info_t *rh; 28 spinlock_t lock; 29}; 30 31extern void mpc85xx_cache_sram_free(void *ptr); 32extern void *mpc85xx_cache_sram_alloc(unsigned int size, 33 phys_addr_t *phys, unsigned int align); 34 35#endif /* __AMS_POWERPC_FSL_85XX_CACHE_SRAM_H__ */