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1/* 2 * Copyright 2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24#ifndef __AMDGPU_MN_H__ 25#define __AMDGPU_MN_H__ 26 27#include <linux/types.h> 28#include <linux/hmm.h> 29#include <linux/rwsem.h> 30#include <linux/workqueue.h> 31#include <linux/interval_tree.h> 32 33enum amdgpu_mn_type { 34 AMDGPU_MN_TYPE_GFX, 35 AMDGPU_MN_TYPE_HSA, 36}; 37 38/** 39 * struct amdgpu_mn 40 * 41 * @adev: amdgpu device pointer 42 * @mm: process address space 43 * @type: type of MMU notifier 44 * @work: destruction work item 45 * @node: hash table node to find structure by adev and mn 46 * @lock: rw semaphore protecting the notifier nodes 47 * @objects: interval tree containing amdgpu_mn_nodes 48 * @mirror: HMM mirror function support 49 * 50 * Data for each amdgpu device and process address space. 51 */ 52struct amdgpu_mn { 53 /* constant after initialisation */ 54 struct amdgpu_device *adev; 55 struct mm_struct *mm; 56 enum amdgpu_mn_type type; 57 58 /* only used on destruction */ 59 struct work_struct work; 60 61 /* protected by adev->mn_lock */ 62 struct hlist_node node; 63 64 /* objects protected by lock */ 65 struct rw_semaphore lock; 66 struct rb_root_cached objects; 67 68#ifdef CONFIG_HMM_MIRROR 69 /* HMM mirror */ 70 struct hmm_mirror mirror; 71#endif 72}; 73 74#if defined(CONFIG_HMM_MIRROR) 75void amdgpu_mn_lock(struct amdgpu_mn *mn); 76void amdgpu_mn_unlock(struct amdgpu_mn *mn); 77struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev, 78 enum amdgpu_mn_type type); 79int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr); 80void amdgpu_mn_unregister(struct amdgpu_bo *bo); 81void amdgpu_hmm_init_range(struct hmm_range *range); 82#else 83static inline void amdgpu_mn_lock(struct amdgpu_mn *mn) {} 84static inline void amdgpu_mn_unlock(struct amdgpu_mn *mn) {} 85static inline struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev, 86 enum amdgpu_mn_type type) 87{ 88 return NULL; 89} 90static inline int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr) 91{ 92 DRM_WARN_ONCE("HMM_MIRROR kernel config option is not enabled, " 93 "add CONFIG_ZONE_DEVICE=y in config file to fix this\n"); 94 return -ENODEV; 95} 96static inline void amdgpu_mn_unregister(struct amdgpu_bo *bo) {} 97#endif 98 99#endif