at v5.4-rc2 393 lines 10 kB view raw
1/* 2 * Copyright © 2007 David Airlie 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * David Airlie 25 */ 26 27#include <linux/module.h> 28#include <linux/pm_runtime.h> 29#include <linux/slab.h> 30#include <linux/vga_switcheroo.h> 31 32#include <drm/amdgpu_drm.h> 33#include <drm/drm_crtc.h> 34#include <drm/drm_crtc_helper.h> 35#include <drm/drm_fb_helper.h> 36#include <drm/drm_fourcc.h> 37 38#include "amdgpu.h" 39#include "cikd.h" 40#include "amdgpu_gem.h" 41 42#include "amdgpu_display.h" 43 44/* object hierarchy - 45 this contains a helper + a amdgpu fb 46 the helper contains a pointer to amdgpu framebuffer baseclass. 47*/ 48 49static int 50amdgpufb_open(struct fb_info *info, int user) 51{ 52 struct drm_fb_helper *fb_helper = info->par; 53 int ret = pm_runtime_get_sync(fb_helper->dev->dev); 54 if (ret < 0 && ret != -EACCES) { 55 pm_runtime_mark_last_busy(fb_helper->dev->dev); 56 pm_runtime_put_autosuspend(fb_helper->dev->dev); 57 return ret; 58 } 59 return 0; 60} 61 62static int 63amdgpufb_release(struct fb_info *info, int user) 64{ 65 struct drm_fb_helper *fb_helper = info->par; 66 67 pm_runtime_mark_last_busy(fb_helper->dev->dev); 68 pm_runtime_put_autosuspend(fb_helper->dev->dev); 69 return 0; 70} 71 72static struct fb_ops amdgpufb_ops = { 73 .owner = THIS_MODULE, 74 DRM_FB_HELPER_DEFAULT_OPS, 75 .fb_open = amdgpufb_open, 76 .fb_release = amdgpufb_release, 77 .fb_fillrect = drm_fb_helper_cfb_fillrect, 78 .fb_copyarea = drm_fb_helper_cfb_copyarea, 79 .fb_imageblit = drm_fb_helper_cfb_imageblit, 80}; 81 82 83int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) 84{ 85 int aligned = width; 86 int pitch_mask = 0; 87 88 switch (cpp) { 89 case 1: 90 pitch_mask = 255; 91 break; 92 case 2: 93 pitch_mask = 127; 94 break; 95 case 3: 96 case 4: 97 pitch_mask = 63; 98 break; 99 } 100 101 aligned += pitch_mask; 102 aligned &= ~pitch_mask; 103 return aligned * cpp; 104} 105 106static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj) 107{ 108 struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj); 109 int ret; 110 111 ret = amdgpu_bo_reserve(abo, true); 112 if (likely(ret == 0)) { 113 amdgpu_bo_kunmap(abo); 114 amdgpu_bo_unpin(abo); 115 amdgpu_bo_unreserve(abo); 116 } 117 drm_gem_object_put_unlocked(gobj); 118} 119 120static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, 121 struct drm_mode_fb_cmd2 *mode_cmd, 122 struct drm_gem_object **gobj_p) 123{ 124 const struct drm_format_info *info; 125 struct amdgpu_device *adev = rfbdev->adev; 126 struct drm_gem_object *gobj = NULL; 127 struct amdgpu_bo *abo = NULL; 128 bool fb_tiled = false; /* useful for testing */ 129 u32 tiling_flags = 0, domain; 130 int ret; 131 int aligned_size, size; 132 int height = mode_cmd->height; 133 u32 cpp; 134 u64 flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | 135 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | 136 AMDGPU_GEM_CREATE_VRAM_CLEARED | 137 AMDGPU_GEM_CREATE_CPU_GTT_USWC; 138 139 info = drm_get_format_info(adev->ddev, mode_cmd); 140 cpp = info->cpp[0]; 141 142 /* need to align pitch with crtc limits */ 143 mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, 144 fb_tiled); 145 domain = amdgpu_display_supported_domains(adev, flags); 146 height = ALIGN(mode_cmd->height, 8); 147 size = mode_cmd->pitches[0] * height; 148 aligned_size = ALIGN(size, PAGE_SIZE); 149 ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain, flags, 150 ttm_bo_type_kernel, NULL, &gobj); 151 if (ret) { 152 pr_err("failed to allocate framebuffer (%d)\n", aligned_size); 153 return -ENOMEM; 154 } 155 abo = gem_to_amdgpu_bo(gobj); 156 157 if (fb_tiled) 158 tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1); 159 160 ret = amdgpu_bo_reserve(abo, false); 161 if (unlikely(ret != 0)) 162 goto out_unref; 163 164 if (tiling_flags) { 165 ret = amdgpu_bo_set_tiling_flags(abo, 166 tiling_flags); 167 if (ret) 168 dev_err(adev->dev, "FB failed to set tiling flags\n"); 169 } 170 171 ret = amdgpu_bo_pin(abo, domain); 172 if (ret) { 173 amdgpu_bo_unreserve(abo); 174 goto out_unref; 175 } 176 177 ret = amdgpu_ttm_alloc_gart(&abo->tbo); 178 if (ret) { 179 amdgpu_bo_unreserve(abo); 180 dev_err(adev->dev, "%p bind failed\n", abo); 181 goto out_unref; 182 } 183 184 ret = amdgpu_bo_kmap(abo, NULL); 185 amdgpu_bo_unreserve(abo); 186 if (ret) { 187 goto out_unref; 188 } 189 190 *gobj_p = gobj; 191 return 0; 192out_unref: 193 amdgpufb_destroy_pinned_object(gobj); 194 *gobj_p = NULL; 195 return ret; 196} 197 198static int amdgpufb_create(struct drm_fb_helper *helper, 199 struct drm_fb_helper_surface_size *sizes) 200{ 201 struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper; 202 struct amdgpu_device *adev = rfbdev->adev; 203 struct fb_info *info; 204 struct drm_framebuffer *fb = NULL; 205 struct drm_mode_fb_cmd2 mode_cmd; 206 struct drm_gem_object *gobj = NULL; 207 struct amdgpu_bo *abo = NULL; 208 int ret; 209 unsigned long tmp; 210 211 mode_cmd.width = sizes->surface_width; 212 mode_cmd.height = sizes->surface_height; 213 214 if (sizes->surface_bpp == 24) 215 sizes->surface_bpp = 32; 216 217 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, 218 sizes->surface_depth); 219 220 ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj); 221 if (ret) { 222 DRM_ERROR("failed to create fbcon object %d\n", ret); 223 return ret; 224 } 225 226 abo = gem_to_amdgpu_bo(gobj); 227 228 /* okay we have an object now allocate the framebuffer */ 229 info = drm_fb_helper_alloc_fbi(helper); 230 if (IS_ERR(info)) { 231 ret = PTR_ERR(info); 232 goto out; 233 } 234 235 ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb, 236 &mode_cmd, gobj); 237 if (ret) { 238 DRM_ERROR("failed to initialize framebuffer %d\n", ret); 239 goto out; 240 } 241 242 fb = &rfbdev->rfb.base; 243 244 /* setup helper */ 245 rfbdev->helper.fb = fb; 246 247 info->fbops = &amdgpufb_ops; 248 249 tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; 250 info->fix.smem_start = adev->gmc.aper_base + tmp; 251 info->fix.smem_len = amdgpu_bo_size(abo); 252 info->screen_base = amdgpu_bo_kptr(abo); 253 info->screen_size = amdgpu_bo_size(abo); 254 255 drm_fb_helper_fill_info(info, &rfbdev->helper, sizes); 256 257 /* setup aperture base/size for vesafb takeover */ 258 info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; 259 info->apertures->ranges[0].size = adev->gmc.aper_size; 260 261 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ 262 263 if (info->screen_base == NULL) { 264 ret = -ENOSPC; 265 goto out; 266 } 267 268 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); 269 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->gmc.aper_base); 270 DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo)); 271 DRM_INFO("fb depth is %d\n", fb->format->depth); 272 DRM_INFO(" pitch is %d\n", fb->pitches[0]); 273 274 vga_switcheroo_client_fb_set(adev->ddev->pdev, info); 275 return 0; 276 277out: 278 if (abo) { 279 280 } 281 if (fb && ret) { 282 drm_gem_object_put_unlocked(gobj); 283 drm_framebuffer_unregister_private(fb); 284 drm_framebuffer_cleanup(fb); 285 kfree(fb); 286 } 287 return ret; 288} 289 290static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev) 291{ 292 struct amdgpu_framebuffer *rfb = &rfbdev->rfb; 293 294 drm_fb_helper_unregister_fbi(&rfbdev->helper); 295 296 if (rfb->base.obj[0]) { 297 amdgpufb_destroy_pinned_object(rfb->base.obj[0]); 298 rfb->base.obj[0] = NULL; 299 drm_framebuffer_unregister_private(&rfb->base); 300 drm_framebuffer_cleanup(&rfb->base); 301 } 302 drm_fb_helper_fini(&rfbdev->helper); 303 304 return 0; 305} 306 307static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = { 308 .fb_probe = amdgpufb_create, 309}; 310 311int amdgpu_fbdev_init(struct amdgpu_device *adev) 312{ 313 struct amdgpu_fbdev *rfbdev; 314 int bpp_sel = 32; 315 int ret; 316 317 /* don't init fbdev on hw without DCE */ 318 if (!adev->mode_info.mode_config_initialized) 319 return 0; 320 321 /* don't init fbdev if there are no connectors */ 322 if (list_empty(&adev->ddev->mode_config.connector_list)) 323 return 0; 324 325 /* select 8 bpp console on low vram cards */ 326 if (adev->gmc.real_vram_size <= (32*1024*1024)) 327 bpp_sel = 8; 328 329 rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL); 330 if (!rfbdev) 331 return -ENOMEM; 332 333 rfbdev->adev = adev; 334 adev->mode_info.rfbdev = rfbdev; 335 336 drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, 337 &amdgpu_fb_helper_funcs); 338 339 ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, 340 AMDGPUFB_CONN_LIMIT); 341 if (ret) { 342 kfree(rfbdev); 343 return ret; 344 } 345 346 drm_fb_helper_single_add_all_connectors(&rfbdev->helper); 347 348 /* disable all the possible outputs/crtcs before entering KMS mode */ 349 if (!amdgpu_device_has_dc_support(adev)) 350 drm_helper_disable_unused_functions(adev->ddev); 351 352 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); 353 return 0; 354} 355 356void amdgpu_fbdev_fini(struct amdgpu_device *adev) 357{ 358 if (!adev->mode_info.rfbdev) 359 return; 360 361 amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); 362 kfree(adev->mode_info.rfbdev); 363 adev->mode_info.rfbdev = NULL; 364} 365 366void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) 367{ 368 if (adev->mode_info.rfbdev) 369 drm_fb_helper_set_suspend_unlocked(&adev->mode_info.rfbdev->helper, 370 state); 371} 372 373int amdgpu_fbdev_total_size(struct amdgpu_device *adev) 374{ 375 struct amdgpu_bo *robj; 376 int size = 0; 377 378 if (!adev->mode_info.rfbdev) 379 return 0; 380 381 robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0]); 382 size += amdgpu_bo_size(robj); 383 return size; 384} 385 386bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) 387{ 388 if (!adev->mode_info.rfbdev) 389 return false; 390 if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.base.obj[0])) 391 return true; 392 return false; 393}