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1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * PCI HotPlug Core Functions
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 *
9 * All rights reserved.
10 *
11 * Send feedback to <kristen.c.accardi@intel.com>
12 *
13 */
14#ifndef _PCI_HOTPLUG_H
15#define _PCI_HOTPLUG_H
16
17/**
18 * struct hotplug_slot_ops -the callbacks that the hotplug pci core can use
19 * @enable_slot: Called when the user wants to enable a specific pci slot
20 * @disable_slot: Called when the user wants to disable a specific pci slot
21 * @set_attention_status: Called to set the specific slot's attention LED to
22 * the specified value
23 * @hardware_test: Called to run a specified hardware test on the specified
24 * slot.
25 * @get_power_status: Called to get the current power status of a slot.
26 * @get_attention_status: Called to get the current attention status of a slot.
27 * @get_latch_status: Called to get the current latch status of a slot.
28 * @get_adapter_status: Called to get see if an adapter is present in the slot or not.
29 * @reset_slot: Optional interface to allow override of a bus reset for the
30 * slot for cases where a secondary bus reset can result in spurious
31 * hotplug events or where a slot can be reset independent of the bus.
32 *
33 * The table of function pointers that is passed to the hotplug pci core by a
34 * hotplug pci driver. These functions are called by the hotplug pci core when
35 * the user wants to do something to a specific slot (query it for information,
36 * set an LED, enable / disable power, etc.)
37 */
38struct hotplug_slot_ops {
39 int (*enable_slot) (struct hotplug_slot *slot);
40 int (*disable_slot) (struct hotplug_slot *slot);
41 int (*set_attention_status) (struct hotplug_slot *slot, u8 value);
42 int (*hardware_test) (struct hotplug_slot *slot, u32 value);
43 int (*get_power_status) (struct hotplug_slot *slot, u8 *value);
44 int (*get_attention_status) (struct hotplug_slot *slot, u8 *value);
45 int (*get_latch_status) (struct hotplug_slot *slot, u8 *value);
46 int (*get_adapter_status) (struct hotplug_slot *slot, u8 *value);
47 int (*reset_slot) (struct hotplug_slot *slot, int probe);
48};
49
50/**
51 * struct hotplug_slot - used to register a physical slot with the hotplug pci core
52 * @ops: pointer to the &struct hotplug_slot_ops to be used for this slot
53 * @owner: The module owner of this structure
54 * @mod_name: The module name (KBUILD_MODNAME) of this structure
55 */
56struct hotplug_slot {
57 const struct hotplug_slot_ops *ops;
58
59 /* Variables below this are for use only by the hotplug pci core. */
60 struct list_head slot_list;
61 struct pci_slot *pci_slot;
62 struct module *owner;
63 const char *mod_name;
64};
65
66static inline const char *hotplug_slot_name(const struct hotplug_slot *slot)
67{
68 return pci_slot_name(slot->pci_slot);
69}
70
71int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *pbus, int nr,
72 const char *name, struct module *owner,
73 const char *mod_name);
74int __pci_hp_initialize(struct hotplug_slot *slot, struct pci_bus *bus, int nr,
75 const char *name, struct module *owner,
76 const char *mod_name);
77int pci_hp_add(struct hotplug_slot *slot);
78
79void pci_hp_del(struct hotplug_slot *slot);
80void pci_hp_destroy(struct hotplug_slot *slot);
81void pci_hp_deregister(struct hotplug_slot *slot);
82
83/* use a define to avoid include chaining to get THIS_MODULE & friends */
84#define pci_hp_register(slot, pbus, devnr, name) \
85 __pci_hp_register(slot, pbus, devnr, name, THIS_MODULE, KBUILD_MODNAME)
86#define pci_hp_initialize(slot, bus, nr, name) \
87 __pci_hp_initialize(slot, bus, nr, name, THIS_MODULE, KBUILD_MODNAME)
88
89/* PCI Setting Record (Type 0) */
90struct hpp_type0 {
91 u32 revision;
92 u8 cache_line_size;
93 u8 latency_timer;
94 u8 enable_serr;
95 u8 enable_perr;
96};
97
98/* PCI-X Setting Record (Type 1) */
99struct hpp_type1 {
100 u32 revision;
101 u8 max_mem_read;
102 u8 avg_max_split;
103 u16 tot_max_split;
104};
105
106/* PCI Express Setting Record (Type 2) */
107struct hpp_type2 {
108 u32 revision;
109 u32 unc_err_mask_and;
110 u32 unc_err_mask_or;
111 u32 unc_err_sever_and;
112 u32 unc_err_sever_or;
113 u32 cor_err_mask_and;
114 u32 cor_err_mask_or;
115 u32 adv_err_cap_and;
116 u32 adv_err_cap_or;
117 u16 pci_exp_devctl_and;
118 u16 pci_exp_devctl_or;
119 u16 pci_exp_lnkctl_and;
120 u16 pci_exp_lnkctl_or;
121 u32 sec_unc_err_sever_and;
122 u32 sec_unc_err_sever_or;
123 u32 sec_unc_err_mask_and;
124 u32 sec_unc_err_mask_or;
125};
126
127/*
128 * _HPX PCI Express Setting Record (Type 3)
129 */
130struct hpx_type3 {
131 u16 device_type;
132 u16 function_type;
133 u16 config_space_location;
134 u16 pci_exp_cap_id;
135 u16 pci_exp_cap_ver;
136 u16 pci_exp_vendor_id;
137 u16 dvsec_id;
138 u16 dvsec_rev;
139 u16 match_offset;
140 u32 match_mask_and;
141 u32 match_value;
142 u16 reg_offset;
143 u32 reg_mask_and;
144 u32 reg_mask_or;
145};
146
147struct hotplug_program_ops {
148 void (*program_type0)(struct pci_dev *dev, struct hpp_type0 *hpp);
149 void (*program_type1)(struct pci_dev *dev, struct hpp_type1 *hpp);
150 void (*program_type2)(struct pci_dev *dev, struct hpp_type2 *hpp);
151 void (*program_type3)(struct pci_dev *dev, struct hpx_type3 *hpp);
152};
153
154enum hpx_type3_dev_type {
155 HPX_TYPE_ENDPOINT = BIT(0),
156 HPX_TYPE_LEG_END = BIT(1),
157 HPX_TYPE_RC_END = BIT(2),
158 HPX_TYPE_RC_EC = BIT(3),
159 HPX_TYPE_ROOT_PORT = BIT(4),
160 HPX_TYPE_UPSTREAM = BIT(5),
161 HPX_TYPE_DOWNSTREAM = BIT(6),
162 HPX_TYPE_PCI_BRIDGE = BIT(7),
163 HPX_TYPE_PCIE_BRIDGE = BIT(8),
164};
165
166enum hpx_type3_fn_type {
167 HPX_FN_NORMAL = BIT(0),
168 HPX_FN_SRIOV_PHYS = BIT(1),
169 HPX_FN_SRIOV_VIRT = BIT(2),
170};
171
172enum hpx_type3_cfg_loc {
173 HPX_CFG_PCICFG = 0,
174 HPX_CFG_PCIE_CAP = 1,
175 HPX_CFG_PCIE_CAP_EXT = 2,
176 HPX_CFG_VEND_CAP = 3,
177 HPX_CFG_DVSEC = 4,
178 HPX_CFG_MAX,
179};
180
181#ifdef CONFIG_ACPI
182#include <linux/acpi.h>
183int pci_acpi_program_hp_params(struct pci_dev *dev,
184 const struct hotplug_program_ops *hp_ops);
185bool pciehp_is_native(struct pci_dev *bridge);
186int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge);
187bool shpchp_is_native(struct pci_dev *bridge);
188int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle);
189int acpi_pci_detect_ejectable(acpi_handle handle);
190#else
191static inline int pci_acpi_program_hp_params(struct pci_dev *dev,
192 const struct hotplug_program_ops *hp_ops)
193{
194 return -ENODEV;
195}
196
197static inline int acpi_get_hp_hw_control_from_firmware(struct pci_dev *bridge)
198{
199 return 0;
200}
201static inline bool pciehp_is_native(struct pci_dev *bridge) { return true; }
202static inline bool shpchp_is_native(struct pci_dev *bridge) { return true; }
203#endif
204
205static inline bool hotplug_is_native(struct pci_dev *bridge)
206{
207 return pciehp_is_native(bridge) || shpchp_is_native(bridge);
208}
209#endif