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1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * linux/drivers/usb/gadget/s3c2410_udc.c 4 * 5 * Samsung S3C24xx series on-chip full speed USB device controllers 6 * 7 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard 8 * Additional cleanups by Ben Dooks <ben-linux@fluff.org> 9 */ 10 11#define pr_fmt(fmt) "s3c2410_udc: " fmt 12 13#include <linux/module.h> 14#include <linux/kernel.h> 15#include <linux/delay.h> 16#include <linux/ioport.h> 17#include <linux/sched.h> 18#include <linux/slab.h> 19#include <linux/errno.h> 20#include <linux/init.h> 21#include <linux/timer.h> 22#include <linux/list.h> 23#include <linux/interrupt.h> 24#include <linux/platform_device.h> 25#include <linux/clk.h> 26#include <linux/gpio.h> 27#include <linux/prefetch.h> 28#include <linux/io.h> 29 30#include <linux/debugfs.h> 31#include <linux/seq_file.h> 32 33#include <linux/usb.h> 34#include <linux/usb/gadget.h> 35 36#include <asm/byteorder.h> 37#include <asm/irq.h> 38#include <asm/unaligned.h> 39#include <mach/irqs.h> 40 41#include <mach/hardware.h> 42 43#include <plat/regs-udc.h> 44#include <linux/platform_data/usb-s3c2410_udc.h> 45 46 47#include "s3c2410_udc.h" 48 49#define DRIVER_DESC "S3C2410 USB Device Controller Gadget" 50#define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \ 51 "Arnaud Patard <arnaud.patard@rtp-net.org>" 52 53static const char gadget_name[] = "s3c2410_udc"; 54static const char driver_desc[] = DRIVER_DESC; 55 56static struct s3c2410_udc *the_controller; 57static struct clk *udc_clock; 58static struct clk *usb_bus_clock; 59static void __iomem *base_addr; 60static u64 rsrc_start; 61static u64 rsrc_len; 62static struct dentry *s3c2410_udc_debugfs_root; 63 64static inline u32 udc_read(u32 reg) 65{ 66 return readb(base_addr + reg); 67} 68 69static inline void udc_write(u32 value, u32 reg) 70{ 71 writeb(value, base_addr + reg); 72} 73 74static inline void udc_writeb(void __iomem *base, u32 value, u32 reg) 75{ 76 writeb(value, base + reg); 77} 78 79static struct s3c2410_udc_mach_info *udc_info; 80 81/*************************** DEBUG FUNCTION ***************************/ 82#define DEBUG_NORMAL 1 83#define DEBUG_VERBOSE 2 84 85#ifdef CONFIG_USB_S3C2410_DEBUG 86#define USB_S3C2410_DEBUG_LEVEL 0 87 88static uint32_t s3c2410_ticks = 0; 89 90__printf(2, 3) 91static void dprintk(int level, const char *fmt, ...) 92{ 93 static long prevticks; 94 static int invocation; 95 struct va_format vaf; 96 va_list args; 97 98 if (level > USB_S3C2410_DEBUG_LEVEL) 99 return; 100 101 va_start(args, fmt); 102 103 vaf.fmt = fmt; 104 vaf.va = &args; 105 106 if (s3c2410_ticks != prevticks) { 107 prevticks = s3c2410_ticks; 108 invocation = 0; 109 } 110 111 pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf); 112 113 va_end(args); 114} 115#else 116__printf(2, 3) 117static void dprintk(int level, const char *fmt, ...) 118{ 119} 120#endif 121 122static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p) 123{ 124 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg; 125 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; 126 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2; 127 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2; 128 129 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG); 130 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); 131 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG); 132 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG); 133 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 134 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG); 135 udc_write(0, S3C2410_UDC_INDEX_REG); 136 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 137 udc_write(1, S3C2410_UDC_INDEX_REG); 138 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 139 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 140 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 141 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 142 udc_write(2, S3C2410_UDC_INDEX_REG); 143 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 144 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 145 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 146 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 147 148 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n" 149 "PWR_REG : 0x%04X\n" 150 "EP_INT_REG : 0x%04X\n" 151 "USB_INT_REG : 0x%04X\n" 152 "EP_INT_EN_REG : 0x%04X\n" 153 "USB_INT_EN_REG : 0x%04X\n" 154 "EP0_CSR : 0x%04X\n" 155 "EP1_I_CSR1 : 0x%04X\n" 156 "EP1_I_CSR2 : 0x%04X\n" 157 "EP1_O_CSR1 : 0x%04X\n" 158 "EP1_O_CSR2 : 0x%04X\n" 159 "EP2_I_CSR1 : 0x%04X\n" 160 "EP2_I_CSR2 : 0x%04X\n" 161 "EP2_O_CSR1 : 0x%04X\n" 162 "EP2_O_CSR2 : 0x%04X\n", 163 addr_reg, pwr_reg, ep_int_reg, usb_int_reg, 164 ep_int_en_reg, usb_int_en_reg, ep0_csr, 165 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2, 166 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2 167 ); 168 169 return 0; 170} 171DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs); 172 173/* io macros */ 174 175static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base) 176{ 177 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 178 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY, 179 S3C2410_UDC_EP0_CSR_REG); 180} 181 182static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base) 183{ 184 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 185 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG); 186} 187 188static inline void s3c2410_udc_clear_ep0_se(void __iomem *base) 189{ 190 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 191 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG); 192} 193 194static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base) 195{ 196 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 197 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG); 198} 199 200static inline void s3c2410_udc_set_ep0_de(void __iomem *base) 201{ 202 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 203 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG); 204} 205 206inline void s3c2410_udc_set_ep0_ss(void __iomem *b) 207{ 208 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 209 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG); 210} 211 212static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base) 213{ 214 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 215 216 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY 217 | S3C2410_UDC_EP0_CSR_DE), 218 S3C2410_UDC_EP0_CSR_REG); 219} 220 221static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base) 222{ 223 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 224 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY 225 | S3C2410_UDC_EP0_CSR_DE), 226 S3C2410_UDC_EP0_CSR_REG); 227} 228 229/*------------------------- I/O ----------------------------------*/ 230 231/* 232 * s3c2410_udc_done 233 */ 234static void s3c2410_udc_done(struct s3c2410_ep *ep, 235 struct s3c2410_request *req, int status) 236{ 237 unsigned halted = ep->halted; 238 239 list_del_init(&req->queue); 240 241 if (likely(req->req.status == -EINPROGRESS)) 242 req->req.status = status; 243 else 244 status = req->req.status; 245 246 ep->halted = 1; 247 usb_gadget_giveback_request(&ep->ep, &req->req); 248 ep->halted = halted; 249} 250 251static void s3c2410_udc_nuke(struct s3c2410_udc *udc, 252 struct s3c2410_ep *ep, int status) 253{ 254 /* Sanity check */ 255 if (&ep->queue == NULL) 256 return; 257 258 while (!list_empty(&ep->queue)) { 259 struct s3c2410_request *req; 260 req = list_entry(ep->queue.next, struct s3c2410_request, 261 queue); 262 s3c2410_udc_done(ep, req, status); 263 } 264} 265 266static inline int s3c2410_udc_fifo_count_out(void) 267{ 268 int tmp; 269 270 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8; 271 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG); 272 return tmp; 273} 274 275/* 276 * s3c2410_udc_write_packet 277 */ 278static inline int s3c2410_udc_write_packet(int fifo, 279 struct s3c2410_request *req, 280 unsigned max) 281{ 282 unsigned len = min(req->req.length - req->req.actual, max); 283 u8 *buf = req->req.buf + req->req.actual; 284 285 prefetch(buf); 286 287 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__, 288 req->req.actual, req->req.length, len, req->req.actual + len); 289 290 req->req.actual += len; 291 292 udelay(5); 293 writesb(base_addr + fifo, buf, len); 294 return len; 295} 296 297/* 298 * s3c2410_udc_write_fifo 299 * 300 * return: 0 = still running, 1 = completed, negative = errno 301 */ 302static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep, 303 struct s3c2410_request *req) 304{ 305 unsigned count; 306 int is_last; 307 u32 idx; 308 int fifo_reg; 309 u32 ep_csr; 310 311 idx = ep->bEndpointAddress & 0x7F; 312 switch (idx) { 313 default: 314 idx = 0; 315 case 0: 316 fifo_reg = S3C2410_UDC_EP0_FIFO_REG; 317 break; 318 case 1: 319 fifo_reg = S3C2410_UDC_EP1_FIFO_REG; 320 break; 321 case 2: 322 fifo_reg = S3C2410_UDC_EP2_FIFO_REG; 323 break; 324 case 3: 325 fifo_reg = S3C2410_UDC_EP3_FIFO_REG; 326 break; 327 case 4: 328 fifo_reg = S3C2410_UDC_EP4_FIFO_REG; 329 break; 330 } 331 332 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket); 333 334 /* last packet is often short (sometimes a zlp) */ 335 if (count != ep->ep.maxpacket) 336 is_last = 1; 337 else if (req->req.length != req->req.actual || req->req.zero) 338 is_last = 0; 339 else 340 is_last = 2; 341 342 /* Only ep0 debug messages are interesting */ 343 if (idx == 0) 344 dprintk(DEBUG_NORMAL, 345 "Written ep%d %d.%d of %d b [last %d,z %d]\n", 346 idx, count, req->req.actual, req->req.length, 347 is_last, req->req.zero); 348 349 if (is_last) { 350 /* The order is important. It prevents sending 2 packets 351 * at the same time */ 352 353 if (idx == 0) { 354 /* Reset signal => no need to say 'data sent' */ 355 if (!(udc_read(S3C2410_UDC_USB_INT_REG) 356 & S3C2410_UDC_USBINT_RESET)) 357 s3c2410_udc_set_ep0_de_in(base_addr); 358 ep->dev->ep0state = EP0_IDLE; 359 } else { 360 udc_write(idx, S3C2410_UDC_INDEX_REG); 361 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 362 udc_write(idx, S3C2410_UDC_INDEX_REG); 363 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, 364 S3C2410_UDC_IN_CSR1_REG); 365 } 366 367 s3c2410_udc_done(ep, req, 0); 368 is_last = 1; 369 } else { 370 if (idx == 0) { 371 /* Reset signal => no need to say 'data sent' */ 372 if (!(udc_read(S3C2410_UDC_USB_INT_REG) 373 & S3C2410_UDC_USBINT_RESET)) 374 s3c2410_udc_set_ep0_ipr(base_addr); 375 } else { 376 udc_write(idx, S3C2410_UDC_INDEX_REG); 377 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 378 udc_write(idx, S3C2410_UDC_INDEX_REG); 379 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, 380 S3C2410_UDC_IN_CSR1_REG); 381 } 382 } 383 384 return is_last; 385} 386 387static inline int s3c2410_udc_read_packet(int fifo, u8 *buf, 388 struct s3c2410_request *req, unsigned avail) 389{ 390 unsigned len; 391 392 len = min(req->req.length - req->req.actual, avail); 393 req->req.actual += len; 394 395 readsb(fifo + base_addr, buf, len); 396 return len; 397} 398 399/* 400 * return: 0 = still running, 1 = queue empty, negative = errno 401 */ 402static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep, 403 struct s3c2410_request *req) 404{ 405 u8 *buf; 406 u32 ep_csr; 407 unsigned bufferspace; 408 int is_last = 1; 409 unsigned avail; 410 int fifo_count = 0; 411 u32 idx; 412 int fifo_reg; 413 414 idx = ep->bEndpointAddress & 0x7F; 415 416 switch (idx) { 417 default: 418 idx = 0; 419 case 0: 420 fifo_reg = S3C2410_UDC_EP0_FIFO_REG; 421 break; 422 case 1: 423 fifo_reg = S3C2410_UDC_EP1_FIFO_REG; 424 break; 425 case 2: 426 fifo_reg = S3C2410_UDC_EP2_FIFO_REG; 427 break; 428 case 3: 429 fifo_reg = S3C2410_UDC_EP3_FIFO_REG; 430 break; 431 case 4: 432 fifo_reg = S3C2410_UDC_EP4_FIFO_REG; 433 break; 434 } 435 436 if (!req->req.length) 437 return 1; 438 439 buf = req->req.buf + req->req.actual; 440 bufferspace = req->req.length - req->req.actual; 441 if (!bufferspace) { 442 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__); 443 return -1; 444 } 445 446 udc_write(idx, S3C2410_UDC_INDEX_REG); 447 448 fifo_count = s3c2410_udc_fifo_count_out(); 449 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count); 450 451 if (fifo_count > ep->ep.maxpacket) 452 avail = ep->ep.maxpacket; 453 else 454 avail = fifo_count; 455 456 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail); 457 458 /* checking this with ep0 is not accurate as we already 459 * read a control request 460 **/ 461 if (idx != 0 && fifo_count < ep->ep.maxpacket) { 462 is_last = 1; 463 /* overflowed this request? flush extra data */ 464 if (fifo_count != avail) 465 req->req.status = -EOVERFLOW; 466 } else { 467 is_last = (req->req.length <= req->req.actual) ? 1 : 0; 468 } 469 470 udc_write(idx, S3C2410_UDC_INDEX_REG); 471 fifo_count = s3c2410_udc_fifo_count_out(); 472 473 /* Only ep0 debug messages are interesting */ 474 if (idx == 0) 475 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n", 476 __func__, fifo_count, is_last); 477 478 if (is_last) { 479 if (idx == 0) { 480 s3c2410_udc_set_ep0_de_out(base_addr); 481 ep->dev->ep0state = EP0_IDLE; 482 } else { 483 udc_write(idx, S3C2410_UDC_INDEX_REG); 484 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); 485 udc_write(idx, S3C2410_UDC_INDEX_REG); 486 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, 487 S3C2410_UDC_OUT_CSR1_REG); 488 } 489 490 s3c2410_udc_done(ep, req, 0); 491 } else { 492 if (idx == 0) { 493 s3c2410_udc_clear_ep0_opr(base_addr); 494 } else { 495 udc_write(idx, S3C2410_UDC_INDEX_REG); 496 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); 497 udc_write(idx, S3C2410_UDC_INDEX_REG); 498 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, 499 S3C2410_UDC_OUT_CSR1_REG); 500 } 501 } 502 503 return is_last; 504} 505 506static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq) 507{ 508 unsigned char *outbuf = (unsigned char *)crq; 509 int bytes_read = 0; 510 511 udc_write(0, S3C2410_UDC_INDEX_REG); 512 513 bytes_read = s3c2410_udc_fifo_count_out(); 514 515 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read); 516 517 if (bytes_read > sizeof(struct usb_ctrlrequest)) 518 bytes_read = sizeof(struct usb_ctrlrequest); 519 520 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read); 521 522 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__, 523 bytes_read, crq->bRequest, crq->bRequestType, 524 crq->wValue, crq->wIndex, crq->wLength); 525 526 return bytes_read; 527} 528 529static int s3c2410_udc_get_status(struct s3c2410_udc *dev, 530 struct usb_ctrlrequest *crq) 531{ 532 u16 status = 0; 533 u8 ep_num = crq->wIndex & 0x7F; 534 u8 is_in = crq->wIndex & USB_DIR_IN; 535 536 switch (crq->bRequestType & USB_RECIP_MASK) { 537 case USB_RECIP_INTERFACE: 538 break; 539 540 case USB_RECIP_DEVICE: 541 status = dev->devstatus; 542 break; 543 544 case USB_RECIP_ENDPOINT: 545 if (ep_num > 4 || crq->wLength > 2) 546 return 1; 547 548 if (ep_num == 0) { 549 udc_write(0, S3C2410_UDC_INDEX_REG); 550 status = udc_read(S3C2410_UDC_IN_CSR1_REG); 551 status = status & S3C2410_UDC_EP0_CSR_SENDSTL; 552 } else { 553 udc_write(ep_num, S3C2410_UDC_INDEX_REG); 554 if (is_in) { 555 status = udc_read(S3C2410_UDC_IN_CSR1_REG); 556 status = status & S3C2410_UDC_ICSR1_SENDSTL; 557 } else { 558 status = udc_read(S3C2410_UDC_OUT_CSR1_REG); 559 status = status & S3C2410_UDC_OCSR1_SENDSTL; 560 } 561 } 562 563 status = status ? 1 : 0; 564 break; 565 566 default: 567 return 1; 568 } 569 570 /* Seems to be needed to get it working. ouch :( */ 571 udelay(5); 572 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG); 573 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG); 574 s3c2410_udc_set_ep0_de_in(base_addr); 575 576 return 0; 577} 578/*------------------------- usb state machine -------------------------------*/ 579static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value); 580 581static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev, 582 struct s3c2410_ep *ep, 583 struct usb_ctrlrequest *crq, 584 u32 ep0csr) 585{ 586 int len, ret, tmp; 587 588 /* start control request? */ 589 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY)) 590 return; 591 592 s3c2410_udc_nuke(dev, ep, -EPROTO); 593 594 len = s3c2410_udc_read_fifo_crq(crq); 595 if (len != sizeof(*crq)) { 596 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR" 597 " wanted %d bytes got %d. Stalling out...\n", 598 sizeof(*crq), len); 599 s3c2410_udc_set_ep0_ss(base_addr); 600 return; 601 } 602 603 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n", 604 crq->bRequest, crq->bRequestType, crq->wLength); 605 606 /* cope with automagic for some standard requests. */ 607 dev->req_std = (crq->bRequestType & USB_TYPE_MASK) 608 == USB_TYPE_STANDARD; 609 dev->req_config = 0; 610 dev->req_pending = 1; 611 612 switch (crq->bRequest) { 613 case USB_REQ_SET_CONFIGURATION: 614 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n"); 615 616 if (crq->bRequestType == USB_RECIP_DEVICE) { 617 dev->req_config = 1; 618 s3c2410_udc_set_ep0_de_out(base_addr); 619 } 620 break; 621 622 case USB_REQ_SET_INTERFACE: 623 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n"); 624 625 if (crq->bRequestType == USB_RECIP_INTERFACE) { 626 dev->req_config = 1; 627 s3c2410_udc_set_ep0_de_out(base_addr); 628 } 629 break; 630 631 case USB_REQ_SET_ADDRESS: 632 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n"); 633 634 if (crq->bRequestType == USB_RECIP_DEVICE) { 635 tmp = crq->wValue & 0x7F; 636 dev->address = tmp; 637 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE), 638 S3C2410_UDC_FUNC_ADDR_REG); 639 s3c2410_udc_set_ep0_de_out(base_addr); 640 return; 641 } 642 break; 643 644 case USB_REQ_GET_STATUS: 645 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n"); 646 s3c2410_udc_clear_ep0_opr(base_addr); 647 648 if (dev->req_std) { 649 if (!s3c2410_udc_get_status(dev, crq)) 650 return; 651 } 652 break; 653 654 case USB_REQ_CLEAR_FEATURE: 655 s3c2410_udc_clear_ep0_opr(base_addr); 656 657 if (crq->bRequestType != USB_RECIP_ENDPOINT) 658 break; 659 660 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) 661 break; 662 663 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0); 664 s3c2410_udc_set_ep0_de_out(base_addr); 665 return; 666 667 case USB_REQ_SET_FEATURE: 668 s3c2410_udc_clear_ep0_opr(base_addr); 669 670 if (crq->bRequestType != USB_RECIP_ENDPOINT) 671 break; 672 673 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) 674 break; 675 676 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1); 677 s3c2410_udc_set_ep0_de_out(base_addr); 678 return; 679 680 default: 681 s3c2410_udc_clear_ep0_opr(base_addr); 682 break; 683 } 684 685 if (crq->bRequestType & USB_DIR_IN) 686 dev->ep0state = EP0_IN_DATA_PHASE; 687 else 688 dev->ep0state = EP0_OUT_DATA_PHASE; 689 690 if (!dev->driver) 691 return; 692 693 /* deliver the request to the gadget driver */ 694 ret = dev->driver->setup(&dev->gadget, crq); 695 if (ret < 0) { 696 if (dev->req_config) { 697 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n", 698 crq->bRequest, ret); 699 return; 700 } 701 702 if (ret == -EOPNOTSUPP) 703 dprintk(DEBUG_NORMAL, "Operation not supported\n"); 704 else 705 dprintk(DEBUG_NORMAL, 706 "dev->driver->setup failed. (%d)\n", ret); 707 708 udelay(5); 709 s3c2410_udc_set_ep0_ss(base_addr); 710 s3c2410_udc_set_ep0_de_out(base_addr); 711 dev->ep0state = EP0_IDLE; 712 /* deferred i/o == no response yet */ 713 } else if (dev->req_pending) { 714 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n"); 715 dev->req_pending = 0; 716 } 717 718 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]); 719} 720 721static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev) 722{ 723 u32 ep0csr; 724 struct s3c2410_ep *ep = &dev->ep[0]; 725 struct s3c2410_request *req; 726 struct usb_ctrlrequest crq; 727 728 if (list_empty(&ep->queue)) 729 req = NULL; 730 else 731 req = list_entry(ep->queue.next, struct s3c2410_request, queue); 732 733 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to 734 * S3C2410_UDC_EP0_CSR_REG when index is zero */ 735 736 udc_write(0, S3C2410_UDC_INDEX_REG); 737 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 738 739 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n", 740 ep0csr, ep0states[dev->ep0state]); 741 742 /* clear stall status */ 743 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) { 744 s3c2410_udc_nuke(dev, ep, -EPIPE); 745 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n"); 746 s3c2410_udc_clear_ep0_sst(base_addr); 747 dev->ep0state = EP0_IDLE; 748 return; 749 } 750 751 /* clear setup end */ 752 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) { 753 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n"); 754 s3c2410_udc_nuke(dev, ep, 0); 755 s3c2410_udc_clear_ep0_se(base_addr); 756 dev->ep0state = EP0_IDLE; 757 } 758 759 switch (dev->ep0state) { 760 case EP0_IDLE: 761 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr); 762 break; 763 764 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 765 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n"); 766 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) 767 s3c2410_udc_write_fifo(ep, req); 768 break; 769 770 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ 771 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n"); 772 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req) 773 s3c2410_udc_read_fifo(ep, req); 774 break; 775 776 case EP0_END_XFER: 777 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n"); 778 dev->ep0state = EP0_IDLE; 779 break; 780 781 case EP0_STALL: 782 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n"); 783 dev->ep0state = EP0_IDLE; 784 break; 785 } 786} 787 788/* 789 * handle_ep - Manage I/O endpoints 790 */ 791 792static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) 793{ 794 struct s3c2410_request *req; 795 int is_in = ep->bEndpointAddress & USB_DIR_IN; 796 u32 ep_csr1; 797 u32 idx; 798 799 if (likely(!list_empty(&ep->queue))) 800 req = list_entry(ep->queue.next, 801 struct s3c2410_request, queue); 802 else 803 req = NULL; 804 805 idx = ep->bEndpointAddress & 0x7F; 806 807 if (is_in) { 808 udc_write(idx, S3C2410_UDC_INDEX_REG); 809 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 810 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n", 811 idx, ep_csr1, req ? 1 : 0); 812 813 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) { 814 dprintk(DEBUG_VERBOSE, "st\n"); 815 udc_write(idx, S3C2410_UDC_INDEX_REG); 816 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL, 817 S3C2410_UDC_IN_CSR1_REG); 818 return; 819 } 820 821 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) 822 s3c2410_udc_write_fifo(ep, req); 823 } else { 824 udc_write(idx, S3C2410_UDC_INDEX_REG); 825 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG); 826 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1); 827 828 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) { 829 udc_write(idx, S3C2410_UDC_INDEX_REG); 830 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL, 831 S3C2410_UDC_OUT_CSR1_REG); 832 return; 833 } 834 835 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) 836 s3c2410_udc_read_fifo(ep, req); 837 } 838} 839 840#include <mach/regs-irq.h> 841 842/* 843 * s3c2410_udc_irq - interrupt handler 844 */ 845static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev) 846{ 847 struct s3c2410_udc *dev = _dev; 848 int usb_status; 849 int usbd_status; 850 int pwr_reg; 851 int ep0csr; 852 int i; 853 u32 idx, idx2; 854 unsigned long flags; 855 856 spin_lock_irqsave(&dev->lock, flags); 857 858 /* Driver connected ? */ 859 if (!dev->driver) { 860 /* Clear interrupts */ 861 udc_write(udc_read(S3C2410_UDC_USB_INT_REG), 862 S3C2410_UDC_USB_INT_REG); 863 udc_write(udc_read(S3C2410_UDC_EP_INT_REG), 864 S3C2410_UDC_EP_INT_REG); 865 } 866 867 /* Save index */ 868 idx = udc_read(S3C2410_UDC_INDEX_REG); 869 870 /* Read status registers */ 871 usb_status = udc_read(S3C2410_UDC_USB_INT_REG); 872 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG); 873 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); 874 875 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 876 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 877 878 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n", 879 usb_status, usbd_status, pwr_reg, ep0csr); 880 881 /* 882 * Now, handle interrupts. There's two types : 883 * - Reset, Resume, Suspend coming -> usb_int_reg 884 * - EP -> ep_int_reg 885 */ 886 887 /* RESET */ 888 if (usb_status & S3C2410_UDC_USBINT_RESET) { 889 /* two kind of reset : 890 * - reset start -> pwr reg = 8 891 * - reset end -> pwr reg = 0 892 **/ 893 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n", 894 ep0csr, pwr_reg); 895 896 dev->gadget.speed = USB_SPEED_UNKNOWN; 897 udc_write(0x00, S3C2410_UDC_INDEX_REG); 898 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3, 899 S3C2410_UDC_MAXP_REG); 900 dev->address = 0; 901 902 dev->ep0state = EP0_IDLE; 903 dev->gadget.speed = USB_SPEED_FULL; 904 905 /* clear interrupt */ 906 udc_write(S3C2410_UDC_USBINT_RESET, 907 S3C2410_UDC_USB_INT_REG); 908 909 udc_write(idx, S3C2410_UDC_INDEX_REG); 910 spin_unlock_irqrestore(&dev->lock, flags); 911 return IRQ_HANDLED; 912 } 913 914 /* RESUME */ 915 if (usb_status & S3C2410_UDC_USBINT_RESUME) { 916 dprintk(DEBUG_NORMAL, "USB resume\n"); 917 918 /* clear interrupt */ 919 udc_write(S3C2410_UDC_USBINT_RESUME, 920 S3C2410_UDC_USB_INT_REG); 921 922 if (dev->gadget.speed != USB_SPEED_UNKNOWN 923 && dev->driver 924 && dev->driver->resume) 925 dev->driver->resume(&dev->gadget); 926 } 927 928 /* SUSPEND */ 929 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) { 930 dprintk(DEBUG_NORMAL, "USB suspend\n"); 931 932 /* clear interrupt */ 933 udc_write(S3C2410_UDC_USBINT_SUSPEND, 934 S3C2410_UDC_USB_INT_REG); 935 936 if (dev->gadget.speed != USB_SPEED_UNKNOWN 937 && dev->driver 938 && dev->driver->suspend) 939 dev->driver->suspend(&dev->gadget); 940 941 dev->ep0state = EP0_IDLE; 942 } 943 944 /* EP */ 945 /* control traffic */ 946 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready 947 * generate an interrupt 948 */ 949 if (usbd_status & S3C2410_UDC_INT_EP0) { 950 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n"); 951 /* Clear the interrupt bit by setting it to 1 */ 952 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG); 953 s3c2410_udc_handle_ep0(dev); 954 } 955 956 /* endpoint data transfers */ 957 for (i = 1; i < S3C2410_ENDPOINTS; i++) { 958 u32 tmp = 1 << i; 959 if (usbd_status & tmp) { 960 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i); 961 962 /* Clear the interrupt bit by setting it to 1 */ 963 udc_write(tmp, S3C2410_UDC_EP_INT_REG); 964 s3c2410_udc_handle_ep(&dev->ep[i]); 965 } 966 } 967 968 /* what else causes this interrupt? a receive! who is it? */ 969 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { 970 for (i = 1; i < S3C2410_ENDPOINTS; i++) { 971 idx2 = udc_read(S3C2410_UDC_INDEX_REG); 972 udc_write(i, S3C2410_UDC_INDEX_REG); 973 974 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1) 975 s3c2410_udc_handle_ep(&dev->ep[i]); 976 977 /* restore index */ 978 udc_write(idx2, S3C2410_UDC_INDEX_REG); 979 } 980 } 981 982 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD); 983 984 /* Restore old index */ 985 udc_write(idx, S3C2410_UDC_INDEX_REG); 986 987 spin_unlock_irqrestore(&dev->lock, flags); 988 989 return IRQ_HANDLED; 990} 991/*------------------------- s3c2410_ep_ops ----------------------------------*/ 992 993static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep) 994{ 995 return container_of(ep, struct s3c2410_ep, ep); 996} 997 998static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget) 999{ 1000 return container_of(gadget, struct s3c2410_udc, gadget); 1001} 1002 1003static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req) 1004{ 1005 return container_of(req, struct s3c2410_request, req); 1006} 1007 1008/* 1009 * s3c2410_udc_ep_enable 1010 */ 1011static int s3c2410_udc_ep_enable(struct usb_ep *_ep, 1012 const struct usb_endpoint_descriptor *desc) 1013{ 1014 struct s3c2410_udc *dev; 1015 struct s3c2410_ep *ep; 1016 u32 max, tmp; 1017 unsigned long flags; 1018 u32 csr1, csr2; 1019 u32 int_en_reg; 1020 1021 ep = to_s3c2410_ep(_ep); 1022 1023 if (!_ep || !desc 1024 || _ep->name == ep0name 1025 || desc->bDescriptorType != USB_DT_ENDPOINT) 1026 return -EINVAL; 1027 1028 dev = ep->dev; 1029 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) 1030 return -ESHUTDOWN; 1031 1032 max = usb_endpoint_maxp(desc); 1033 1034 local_irq_save(flags); 1035 _ep->maxpacket = max; 1036 ep->ep.desc = desc; 1037 ep->halted = 0; 1038 ep->bEndpointAddress = desc->bEndpointAddress; 1039 1040 /* set max packet */ 1041 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1042 udc_write(max >> 3, S3C2410_UDC_MAXP_REG); 1043 1044 /* set type, direction, address; reset fifo counters */ 1045 if (desc->bEndpointAddress & USB_DIR_IN) { 1046 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT; 1047 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN; 1048 1049 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1050 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); 1051 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1052 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); 1053 } else { 1054 /* don't flush in fifo or it will cause endpoint interrupt */ 1055 csr1 = S3C2410_UDC_ICSR1_CLRDT; 1056 csr2 = S3C2410_UDC_ICSR2_DMAIEN; 1057 1058 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1059 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); 1060 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1061 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); 1062 1063 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT; 1064 csr2 = S3C2410_UDC_OCSR2_DMAIEN; 1065 1066 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1067 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG); 1068 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1069 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG); 1070 } 1071 1072 /* enable irqs */ 1073 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 1074 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG); 1075 1076 /* print some debug message */ 1077 tmp = desc->bEndpointAddress; 1078 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n", 1079 _ep->name, ep->num, tmp, 1080 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max); 1081 1082 local_irq_restore(flags); 1083 s3c2410_udc_set_halt(_ep, 0); 1084 1085 return 0; 1086} 1087 1088/* 1089 * s3c2410_udc_ep_disable 1090 */ 1091static int s3c2410_udc_ep_disable(struct usb_ep *_ep) 1092{ 1093 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1094 unsigned long flags; 1095 u32 int_en_reg; 1096 1097 if (!_ep || !ep->ep.desc) { 1098 dprintk(DEBUG_NORMAL, "%s not enabled\n", 1099 _ep ? ep->ep.name : NULL); 1100 return -EINVAL; 1101 } 1102 1103 local_irq_save(flags); 1104 1105 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name); 1106 1107 ep->ep.desc = NULL; 1108 ep->halted = 1; 1109 1110 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN); 1111 1112 /* disable irqs */ 1113 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 1114 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG); 1115 1116 local_irq_restore(flags); 1117 1118 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name); 1119 1120 return 0; 1121} 1122 1123/* 1124 * s3c2410_udc_alloc_request 1125 */ 1126static struct usb_request * 1127s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags) 1128{ 1129 struct s3c2410_request *req; 1130 1131 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags); 1132 1133 if (!_ep) 1134 return NULL; 1135 1136 req = kzalloc(sizeof(struct s3c2410_request), mem_flags); 1137 if (!req) 1138 return NULL; 1139 1140 INIT_LIST_HEAD(&req->queue); 1141 return &req->req; 1142} 1143 1144/* 1145 * s3c2410_udc_free_request 1146 */ 1147static void 1148s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req) 1149{ 1150 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1151 struct s3c2410_request *req = to_s3c2410_req(_req); 1152 1153 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); 1154 1155 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name)) 1156 return; 1157 1158 WARN_ON(!list_empty(&req->queue)); 1159 kfree(req); 1160} 1161 1162/* 1163 * s3c2410_udc_queue 1164 */ 1165static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, 1166 gfp_t gfp_flags) 1167{ 1168 struct s3c2410_request *req = to_s3c2410_req(_req); 1169 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1170 struct s3c2410_udc *dev; 1171 u32 ep_csr = 0; 1172 int fifo_count = 0; 1173 unsigned long flags; 1174 1175 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { 1176 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__); 1177 return -EINVAL; 1178 } 1179 1180 dev = ep->dev; 1181 if (unlikely(!dev->driver 1182 || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 1183 return -ESHUTDOWN; 1184 } 1185 1186 local_irq_save(flags); 1187 1188 if (unlikely(!_req || !_req->complete 1189 || !_req->buf || !list_empty(&req->queue))) { 1190 if (!_req) 1191 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__); 1192 else { 1193 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n", 1194 __func__, !_req->complete, !_req->buf, 1195 !list_empty(&req->queue)); 1196 } 1197 1198 local_irq_restore(flags); 1199 return -EINVAL; 1200 } 1201 1202 _req->status = -EINPROGRESS; 1203 _req->actual = 0; 1204 1205 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n", 1206 __func__, ep->bEndpointAddress, _req->length); 1207 1208 if (ep->bEndpointAddress) { 1209 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG); 1210 1211 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) 1212 ? S3C2410_UDC_IN_CSR1_REG 1213 : S3C2410_UDC_OUT_CSR1_REG); 1214 fifo_count = s3c2410_udc_fifo_count_out(); 1215 } else { 1216 udc_write(0, S3C2410_UDC_INDEX_REG); 1217 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 1218 fifo_count = s3c2410_udc_fifo_count_out(); 1219 } 1220 1221 /* kickstart this i/o queue? */ 1222 if (list_empty(&ep->queue) && !ep->halted) { 1223 if (ep->bEndpointAddress == 0 /* ep0 */) { 1224 switch (dev->ep0state) { 1225 case EP0_IN_DATA_PHASE: 1226 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY) 1227 && s3c2410_udc_write_fifo(ep, 1228 req)) { 1229 dev->ep0state = EP0_IDLE; 1230 req = NULL; 1231 } 1232 break; 1233 1234 case EP0_OUT_DATA_PHASE: 1235 if ((!_req->length) 1236 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) 1237 && s3c2410_udc_read_fifo(ep, 1238 req))) { 1239 dev->ep0state = EP0_IDLE; 1240 req = NULL; 1241 } 1242 break; 1243 1244 default: 1245 local_irq_restore(flags); 1246 return -EL2HLT; 1247 } 1248 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0 1249 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY)) 1250 && s3c2410_udc_write_fifo(ep, req)) { 1251 req = NULL; 1252 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) 1253 && fifo_count 1254 && s3c2410_udc_read_fifo(ep, req)) { 1255 req = NULL; 1256 } 1257 } 1258 1259 /* pio or dma irq handler advances the queue. */ 1260 if (likely(req)) 1261 list_add_tail(&req->queue, &ep->queue); 1262 1263 local_irq_restore(flags); 1264 1265 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__); 1266 return 0; 1267} 1268 1269/* 1270 * s3c2410_udc_dequeue 1271 */ 1272static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) 1273{ 1274 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1275 struct s3c2410_udc *udc; 1276 int retval = -EINVAL; 1277 unsigned long flags; 1278 struct s3c2410_request *req = NULL; 1279 1280 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); 1281 1282 if (!the_controller->driver) 1283 return -ESHUTDOWN; 1284 1285 if (!_ep || !_req) 1286 return retval; 1287 1288 udc = to_s3c2410_udc(ep->gadget); 1289 1290 local_irq_save(flags); 1291 1292 list_for_each_entry(req, &ep->queue, queue) { 1293 if (&req->req == _req) { 1294 list_del_init(&req->queue); 1295 _req->status = -ECONNRESET; 1296 retval = 0; 1297 break; 1298 } 1299 } 1300 1301 if (retval == 0) { 1302 dprintk(DEBUG_VERBOSE, 1303 "dequeued req %p from %s, len %d buf %p\n", 1304 req, _ep->name, _req->length, _req->buf); 1305 1306 s3c2410_udc_done(ep, req, -ECONNRESET); 1307 } 1308 1309 local_irq_restore(flags); 1310 return retval; 1311} 1312 1313/* 1314 * s3c2410_udc_set_halt 1315 */ 1316static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value) 1317{ 1318 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1319 u32 ep_csr = 0; 1320 unsigned long flags; 1321 u32 idx; 1322 1323 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { 1324 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__); 1325 return -EINVAL; 1326 } 1327 1328 local_irq_save(flags); 1329 1330 idx = ep->bEndpointAddress & 0x7F; 1331 1332 if (idx == 0) { 1333 s3c2410_udc_set_ep0_ss(base_addr); 1334 s3c2410_udc_set_ep0_de_out(base_addr); 1335 } else { 1336 udc_write(idx, S3C2410_UDC_INDEX_REG); 1337 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) 1338 ? S3C2410_UDC_IN_CSR1_REG 1339 : S3C2410_UDC_OUT_CSR1_REG); 1340 1341 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 1342 if (value) 1343 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL, 1344 S3C2410_UDC_IN_CSR1_REG); 1345 else { 1346 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL; 1347 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); 1348 ep_csr |= S3C2410_UDC_ICSR1_CLRDT; 1349 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); 1350 } 1351 } else { 1352 if (value) 1353 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL, 1354 S3C2410_UDC_OUT_CSR1_REG); 1355 else { 1356 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL; 1357 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); 1358 ep_csr |= S3C2410_UDC_OCSR1_CLRDT; 1359 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); 1360 } 1361 } 1362 } 1363 1364 ep->halted = value ? 1 : 0; 1365 local_irq_restore(flags); 1366 1367 return 0; 1368} 1369 1370static const struct usb_ep_ops s3c2410_ep_ops = { 1371 .enable = s3c2410_udc_ep_enable, 1372 .disable = s3c2410_udc_ep_disable, 1373 1374 .alloc_request = s3c2410_udc_alloc_request, 1375 .free_request = s3c2410_udc_free_request, 1376 1377 .queue = s3c2410_udc_queue, 1378 .dequeue = s3c2410_udc_dequeue, 1379 1380 .set_halt = s3c2410_udc_set_halt, 1381}; 1382 1383/*------------------------- usb_gadget_ops ----------------------------------*/ 1384 1385/* 1386 * s3c2410_udc_get_frame 1387 */ 1388static int s3c2410_udc_get_frame(struct usb_gadget *_gadget) 1389{ 1390 int tmp; 1391 1392 dprintk(DEBUG_VERBOSE, "%s()\n", __func__); 1393 1394 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8; 1395 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG); 1396 return tmp; 1397} 1398 1399/* 1400 * s3c2410_udc_wakeup 1401 */ 1402static int s3c2410_udc_wakeup(struct usb_gadget *_gadget) 1403{ 1404 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1405 return 0; 1406} 1407 1408/* 1409 * s3c2410_udc_set_selfpowered 1410 */ 1411static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value) 1412{ 1413 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1414 1415 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1416 1417 gadget->is_selfpowered = (value != 0); 1418 if (value) 1419 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED); 1420 else 1421 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1422 1423 return 0; 1424} 1425 1426static void s3c2410_udc_disable(struct s3c2410_udc *dev); 1427static void s3c2410_udc_enable(struct s3c2410_udc *dev); 1428 1429static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on) 1430{ 1431 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1432 1433 if (udc_info && (udc_info->udc_command || 1434 gpio_is_valid(udc_info->pullup_pin))) { 1435 1436 if (is_on) 1437 s3c2410_udc_enable(udc); 1438 else { 1439 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 1440 if (udc->driver && udc->driver->disconnect) 1441 udc->driver->disconnect(&udc->gadget); 1442 1443 } 1444 s3c2410_udc_disable(udc); 1445 } 1446 } else { 1447 return -EOPNOTSUPP; 1448 } 1449 1450 return 0; 1451} 1452 1453static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active) 1454{ 1455 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1456 1457 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1458 1459 udc->vbus = (is_active != 0); 1460 s3c2410_udc_set_pullup(udc, is_active); 1461 return 0; 1462} 1463 1464static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on) 1465{ 1466 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1467 1468 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1469 1470 s3c2410_udc_set_pullup(udc, is_on); 1471 return 0; 1472} 1473 1474static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev) 1475{ 1476 struct s3c2410_udc *dev = _dev; 1477 unsigned int value; 1478 1479 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1480 1481 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0; 1482 if (udc_info->vbus_pin_inverted) 1483 value = !value; 1484 1485 if (value != dev->vbus) 1486 s3c2410_udc_vbus_session(&dev->gadget, value); 1487 1488 return IRQ_HANDLED; 1489} 1490 1491static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1492{ 1493 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1494 1495 if (udc_info && udc_info->vbus_draw) { 1496 udc_info->vbus_draw(ma); 1497 return 0; 1498 } 1499 1500 return -ENOTSUPP; 1501} 1502 1503static int s3c2410_udc_start(struct usb_gadget *g, 1504 struct usb_gadget_driver *driver); 1505static int s3c2410_udc_stop(struct usb_gadget *g); 1506 1507static const struct usb_gadget_ops s3c2410_ops = { 1508 .get_frame = s3c2410_udc_get_frame, 1509 .wakeup = s3c2410_udc_wakeup, 1510 .set_selfpowered = s3c2410_udc_set_selfpowered, 1511 .pullup = s3c2410_udc_pullup, 1512 .vbus_session = s3c2410_udc_vbus_session, 1513 .vbus_draw = s3c2410_vbus_draw, 1514 .udc_start = s3c2410_udc_start, 1515 .udc_stop = s3c2410_udc_stop, 1516}; 1517 1518static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd) 1519{ 1520 if (!udc_info) 1521 return; 1522 1523 if (udc_info->udc_command) { 1524 udc_info->udc_command(cmd); 1525 } else if (gpio_is_valid(udc_info->pullup_pin)) { 1526 int value; 1527 1528 switch (cmd) { 1529 case S3C2410_UDC_P_ENABLE: 1530 value = 1; 1531 break; 1532 case S3C2410_UDC_P_DISABLE: 1533 value = 0; 1534 break; 1535 default: 1536 return; 1537 } 1538 value ^= udc_info->pullup_pin_inverted; 1539 1540 gpio_set_value(udc_info->pullup_pin, value); 1541 } 1542} 1543 1544/*------------------------- gadget driver handling---------------------------*/ 1545/* 1546 * s3c2410_udc_disable 1547 */ 1548static void s3c2410_udc_disable(struct s3c2410_udc *dev) 1549{ 1550 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1551 1552 /* Disable all interrupts */ 1553 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG); 1554 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG); 1555 1556 /* Clear the interrupt registers */ 1557 udc_write(S3C2410_UDC_USBINT_RESET 1558 | S3C2410_UDC_USBINT_RESUME 1559 | S3C2410_UDC_USBINT_SUSPEND, 1560 S3C2410_UDC_USB_INT_REG); 1561 1562 udc_write(0x1F, S3C2410_UDC_EP_INT_REG); 1563 1564 /* Good bye, cruel world */ 1565 s3c2410_udc_command(S3C2410_UDC_P_DISABLE); 1566 1567 /* Set speed to unknown */ 1568 dev->gadget.speed = USB_SPEED_UNKNOWN; 1569} 1570 1571/* 1572 * s3c2410_udc_reinit 1573 */ 1574static void s3c2410_udc_reinit(struct s3c2410_udc *dev) 1575{ 1576 u32 i; 1577 1578 /* device/ep0 records init */ 1579 INIT_LIST_HEAD(&dev->gadget.ep_list); 1580 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); 1581 dev->ep0state = EP0_IDLE; 1582 1583 for (i = 0; i < S3C2410_ENDPOINTS; i++) { 1584 struct s3c2410_ep *ep = &dev->ep[i]; 1585 1586 if (i != 0) 1587 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); 1588 1589 ep->dev = dev; 1590 ep->ep.desc = NULL; 1591 ep->halted = 0; 1592 INIT_LIST_HEAD(&ep->queue); 1593 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket); 1594 } 1595} 1596 1597/* 1598 * s3c2410_udc_enable 1599 */ 1600static void s3c2410_udc_enable(struct s3c2410_udc *dev) 1601{ 1602 int i; 1603 1604 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n"); 1605 1606 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */ 1607 dev->gadget.speed = USB_SPEED_FULL; 1608 1609 /* Set MAXP for all endpoints */ 1610 for (i = 0; i < S3C2410_ENDPOINTS; i++) { 1611 udc_write(i, S3C2410_UDC_INDEX_REG); 1612 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3, 1613 S3C2410_UDC_MAXP_REG); 1614 } 1615 1616 /* Set default power state */ 1617 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG); 1618 1619 /* Enable reset and suspend interrupt interrupts */ 1620 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND, 1621 S3C2410_UDC_USB_INT_EN_REG); 1622 1623 /* Enable ep0 interrupt */ 1624 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); 1625 1626 /* time to say "hello, world" */ 1627 s3c2410_udc_command(S3C2410_UDC_P_ENABLE); 1628} 1629 1630static int s3c2410_udc_start(struct usb_gadget *g, 1631 struct usb_gadget_driver *driver) 1632{ 1633 struct s3c2410_udc *udc = to_s3c2410(g); 1634 1635 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); 1636 1637 /* Hook the driver */ 1638 udc->driver = driver; 1639 1640 /* Enable udc */ 1641 s3c2410_udc_enable(udc); 1642 1643 return 0; 1644} 1645 1646static int s3c2410_udc_stop(struct usb_gadget *g) 1647{ 1648 struct s3c2410_udc *udc = to_s3c2410(g); 1649 1650 udc->driver = NULL; 1651 1652 /* Disable udc */ 1653 s3c2410_udc_disable(udc); 1654 1655 return 0; 1656} 1657 1658/*---------------------------------------------------------------------------*/ 1659static struct s3c2410_udc memory = { 1660 .gadget = { 1661 .ops = &s3c2410_ops, 1662 .ep0 = &memory.ep[0].ep, 1663 .name = gadget_name, 1664 .dev = { 1665 .init_name = "gadget", 1666 }, 1667 }, 1668 1669 /* control endpoint */ 1670 .ep[0] = { 1671 .num = 0, 1672 .ep = { 1673 .name = ep0name, 1674 .ops = &s3c2410_ep_ops, 1675 .maxpacket = EP0_FIFO_SIZE, 1676 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, 1677 USB_EP_CAPS_DIR_ALL), 1678 }, 1679 .dev = &memory, 1680 }, 1681 1682 /* first group of endpoints */ 1683 .ep[1] = { 1684 .num = 1, 1685 .ep = { 1686 .name = "ep1-bulk", 1687 .ops = &s3c2410_ep_ops, 1688 .maxpacket = EP_FIFO_SIZE, 1689 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, 1690 USB_EP_CAPS_DIR_ALL), 1691 }, 1692 .dev = &memory, 1693 .fifo_size = EP_FIFO_SIZE, 1694 .bEndpointAddress = 1, 1695 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1696 }, 1697 .ep[2] = { 1698 .num = 2, 1699 .ep = { 1700 .name = "ep2-bulk", 1701 .ops = &s3c2410_ep_ops, 1702 .maxpacket = EP_FIFO_SIZE, 1703 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, 1704 USB_EP_CAPS_DIR_ALL), 1705 }, 1706 .dev = &memory, 1707 .fifo_size = EP_FIFO_SIZE, 1708 .bEndpointAddress = 2, 1709 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1710 }, 1711 .ep[3] = { 1712 .num = 3, 1713 .ep = { 1714 .name = "ep3-bulk", 1715 .ops = &s3c2410_ep_ops, 1716 .maxpacket = EP_FIFO_SIZE, 1717 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, 1718 USB_EP_CAPS_DIR_ALL), 1719 }, 1720 .dev = &memory, 1721 .fifo_size = EP_FIFO_SIZE, 1722 .bEndpointAddress = 3, 1723 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1724 }, 1725 .ep[4] = { 1726 .num = 4, 1727 .ep = { 1728 .name = "ep4-bulk", 1729 .ops = &s3c2410_ep_ops, 1730 .maxpacket = EP_FIFO_SIZE, 1731 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, 1732 USB_EP_CAPS_DIR_ALL), 1733 }, 1734 .dev = &memory, 1735 .fifo_size = EP_FIFO_SIZE, 1736 .bEndpointAddress = 4, 1737 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1738 } 1739 1740}; 1741 1742/* 1743 * probe - binds to the platform device 1744 */ 1745static int s3c2410_udc_probe(struct platform_device *pdev) 1746{ 1747 struct s3c2410_udc *udc = &memory; 1748 struct device *dev = &pdev->dev; 1749 int retval; 1750 int irq; 1751 1752 dev_dbg(dev, "%s()\n", __func__); 1753 1754 usb_bus_clock = clk_get(NULL, "usb-bus-gadget"); 1755 if (IS_ERR(usb_bus_clock)) { 1756 dev_err(dev, "failed to get usb bus clock source\n"); 1757 return PTR_ERR(usb_bus_clock); 1758 } 1759 1760 clk_prepare_enable(usb_bus_clock); 1761 1762 udc_clock = clk_get(NULL, "usb-device"); 1763 if (IS_ERR(udc_clock)) { 1764 dev_err(dev, "failed to get udc clock source\n"); 1765 return PTR_ERR(udc_clock); 1766 } 1767 1768 clk_prepare_enable(udc_clock); 1769 1770 mdelay(10); 1771 1772 dev_dbg(dev, "got and enabled clocks\n"); 1773 1774 if (strncmp(pdev->name, "s3c2440", 7) == 0) { 1775 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n"); 1776 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE; 1777 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE; 1778 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE; 1779 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE; 1780 } 1781 1782 spin_lock_init(&udc->lock); 1783 udc_info = dev_get_platdata(&pdev->dev); 1784 1785 rsrc_start = S3C2410_PA_USBDEV; 1786 rsrc_len = S3C24XX_SZ_USBDEV; 1787 1788 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name)) 1789 return -EBUSY; 1790 1791 base_addr = ioremap(rsrc_start, rsrc_len); 1792 if (!base_addr) { 1793 retval = -ENOMEM; 1794 goto err_mem; 1795 } 1796 1797 the_controller = udc; 1798 platform_set_drvdata(pdev, udc); 1799 1800 s3c2410_udc_disable(udc); 1801 s3c2410_udc_reinit(udc); 1802 1803 /* irq setup after old hardware state is cleaned up */ 1804 retval = request_irq(IRQ_USBD, s3c2410_udc_irq, 1805 0, gadget_name, udc); 1806 1807 if (retval != 0) { 1808 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval); 1809 retval = -EBUSY; 1810 goto err_map; 1811 } 1812 1813 dev_dbg(dev, "got irq %i\n", IRQ_USBD); 1814 1815 if (udc_info && udc_info->vbus_pin > 0) { 1816 retval = gpio_request(udc_info->vbus_pin, "udc vbus"); 1817 if (retval < 0) { 1818 dev_err(dev, "cannot claim vbus pin\n"); 1819 goto err_int; 1820 } 1821 1822 irq = gpio_to_irq(udc_info->vbus_pin); 1823 if (irq < 0) { 1824 dev_err(dev, "no irq for gpio vbus pin\n"); 1825 retval = irq; 1826 goto err_gpio_claim; 1827 } 1828 1829 retval = request_irq(irq, s3c2410_udc_vbus_irq, 1830 IRQF_TRIGGER_RISING 1831 | IRQF_TRIGGER_FALLING | IRQF_SHARED, 1832 gadget_name, udc); 1833 1834 if (retval != 0) { 1835 dev_err(dev, "can't get vbus irq %d, err %d\n", 1836 irq, retval); 1837 retval = -EBUSY; 1838 goto err_gpio_claim; 1839 } 1840 1841 dev_dbg(dev, "got irq %i\n", irq); 1842 } else { 1843 udc->vbus = 1; 1844 } 1845 1846 if (udc_info && !udc_info->udc_command && 1847 gpio_is_valid(udc_info->pullup_pin)) { 1848 1849 retval = gpio_request_one(udc_info->pullup_pin, 1850 udc_info->vbus_pin_inverted ? 1851 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW, 1852 "udc pullup"); 1853 if (retval) 1854 goto err_vbus_irq; 1855 } 1856 1857 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); 1858 if (retval) 1859 goto err_add_udc; 1860 1861 udc->regs_info = debugfs_create_file("registers", S_IRUGO, 1862 s3c2410_udc_debugfs_root, udc, 1863 &s3c2410_udc_debugfs_fops); 1864 1865 dev_dbg(dev, "probe ok\n"); 1866 1867 return 0; 1868 1869err_add_udc: 1870 if (udc_info && !udc_info->udc_command && 1871 gpio_is_valid(udc_info->pullup_pin)) 1872 gpio_free(udc_info->pullup_pin); 1873err_vbus_irq: 1874 if (udc_info && udc_info->vbus_pin > 0) 1875 free_irq(gpio_to_irq(udc_info->vbus_pin), udc); 1876err_gpio_claim: 1877 if (udc_info && udc_info->vbus_pin > 0) 1878 gpio_free(udc_info->vbus_pin); 1879err_int: 1880 free_irq(IRQ_USBD, udc); 1881err_map: 1882 iounmap(base_addr); 1883err_mem: 1884 release_mem_region(rsrc_start, rsrc_len); 1885 1886 return retval; 1887} 1888 1889/* 1890 * s3c2410_udc_remove 1891 */ 1892static int s3c2410_udc_remove(struct platform_device *pdev) 1893{ 1894 struct s3c2410_udc *udc = platform_get_drvdata(pdev); 1895 unsigned int irq; 1896 1897 dev_dbg(&pdev->dev, "%s()\n", __func__); 1898 1899 if (udc->driver) 1900 return -EBUSY; 1901 1902 usb_del_gadget_udc(&udc->gadget); 1903 debugfs_remove(udc->regs_info); 1904 1905 if (udc_info && !udc_info->udc_command && 1906 gpio_is_valid(udc_info->pullup_pin)) 1907 gpio_free(udc_info->pullup_pin); 1908 1909 if (udc_info && udc_info->vbus_pin > 0) { 1910 irq = gpio_to_irq(udc_info->vbus_pin); 1911 free_irq(irq, udc); 1912 } 1913 1914 free_irq(IRQ_USBD, udc); 1915 1916 iounmap(base_addr); 1917 release_mem_region(rsrc_start, rsrc_len); 1918 1919 if (!IS_ERR(udc_clock) && udc_clock != NULL) { 1920 clk_disable_unprepare(udc_clock); 1921 clk_put(udc_clock); 1922 udc_clock = NULL; 1923 } 1924 1925 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) { 1926 clk_disable_unprepare(usb_bus_clock); 1927 clk_put(usb_bus_clock); 1928 usb_bus_clock = NULL; 1929 } 1930 1931 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__); 1932 return 0; 1933} 1934 1935#ifdef CONFIG_PM 1936static int 1937s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) 1938{ 1939 s3c2410_udc_command(S3C2410_UDC_P_DISABLE); 1940 1941 return 0; 1942} 1943 1944static int s3c2410_udc_resume(struct platform_device *pdev) 1945{ 1946 s3c2410_udc_command(S3C2410_UDC_P_ENABLE); 1947 1948 return 0; 1949} 1950#else 1951#define s3c2410_udc_suspend NULL 1952#define s3c2410_udc_resume NULL 1953#endif 1954 1955static const struct platform_device_id s3c_udc_ids[] = { 1956 { "s3c2410-usbgadget", }, 1957 { "s3c2440-usbgadget", }, 1958 { } 1959}; 1960MODULE_DEVICE_TABLE(platform, s3c_udc_ids); 1961 1962static struct platform_driver udc_driver_24x0 = { 1963 .driver = { 1964 .name = "s3c24x0-usbgadget", 1965 }, 1966 .probe = s3c2410_udc_probe, 1967 .remove = s3c2410_udc_remove, 1968 .suspend = s3c2410_udc_suspend, 1969 .resume = s3c2410_udc_resume, 1970 .id_table = s3c_udc_ids, 1971}; 1972 1973static int __init udc_init(void) 1974{ 1975 int retval; 1976 1977 dprintk(DEBUG_NORMAL, "%s\n", gadget_name); 1978 1979 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL); 1980 1981 retval = platform_driver_register(&udc_driver_24x0); 1982 if (retval) 1983 goto err; 1984 1985 return 0; 1986 1987err: 1988 debugfs_remove(s3c2410_udc_debugfs_root); 1989 return retval; 1990} 1991 1992static void __exit udc_exit(void) 1993{ 1994 platform_driver_unregister(&udc_driver_24x0); 1995 debugfs_remove_recursive(s3c2410_udc_debugfs_root); 1996} 1997 1998module_init(udc_init); 1999module_exit(udc_exit); 2000 2001MODULE_AUTHOR(DRIVER_AUTHOR); 2002MODULE_DESCRIPTION(DRIVER_DESC); 2003MODULE_LICENSE("GPL");