Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1# SPDX-License-Identifier: GPL-2.0-only
2config ARCH_HAS_RESET_CONTROLLER
3 bool
4
5menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
8 help
9 Generic Reset Controller support.
10
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
13
14 If unsure, say no.
15
16if RESET_CONTROLLER
17
18config RESET_A10SR
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
21 help
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
24
25config RESET_ATH79
26 bool "AR71xx Reset Driver" if COMPILE_TEST
27 default ATH79
28 help
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
31
32config RESET_AXS10X
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
35 help
36 This enables the reset controller driver for AXS10x.
37
38config RESET_BERLIN
39 bool "Berlin Reset Driver" if COMPILE_TEST
40 default ARCH_BERLIN
41 help
42 This enables the reset controller driver for Marvell Berlin SoCs.
43
44config RESET_BRCMSTB
45 tristate "Broadcom STB reset controller"
46 depends on ARCH_BRCMSTB || COMPILE_TEST
47 default ARCH_BRCMSTB
48 help
49 This enables the reset controller driver for Broadcom STB SoCs using
50 a SUN_TOP_CTRL_SW_INIT style controller.
51
52config RESET_HSDK
53 bool "Synopsys HSDK Reset Driver"
54 depends on HAS_IOMEM
55 depends on ARC_SOC_HSDK || COMPILE_TEST
56 help
57 This enables the reset controller driver for HSDK board.
58
59config RESET_IMX7
60 bool "i.MX7/8 Reset Driver" if COMPILE_TEST
61 depends on HAS_IOMEM
62 default SOC_IMX7D || (ARM64 && ARCH_MXC)
63 select MFD_SYSCON
64 help
65 This enables the reset controller driver for i.MX7 SoCs.
66
67config RESET_LANTIQ
68 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
69 default SOC_TYPE_XWAY
70 help
71 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
72
73config RESET_LPC18XX
74 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
75 default ARCH_LPC18XX
76 help
77 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
78
79config RESET_MESON
80 bool "Meson Reset Driver" if COMPILE_TEST
81 default ARCH_MESON
82 help
83 This enables the reset driver for Amlogic Meson SoCs.
84
85config RESET_MESON_AUDIO_ARB
86 tristate "Meson Audio Memory Arbiter Reset Driver"
87 depends on ARCH_MESON || COMPILE_TEST
88 help
89 This enables the reset driver for Audio Memory Arbiter of
90 Amlogic's A113 based SoCs
91
92config RESET_OXNAS
93 bool
94
95config RESET_PISTACHIO
96 bool "Pistachio Reset Driver" if COMPILE_TEST
97 default MACH_PISTACHIO
98 help
99 This enables the reset driver for ImgTec Pistachio SoCs.
100
101config RESET_QCOM_AOSS
102 bool "Qcom AOSS Reset Driver"
103 depends on ARCH_QCOM || COMPILE_TEST
104 help
105 This enables the AOSS (always on subsystem) reset driver
106 for Qualcomm SDM845 SoCs. Say Y if you want to control
107 reset signals provided by AOSS for Modem, Venus, ADSP,
108 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
109
110config RESET_QCOM_PDC
111 tristate "Qualcomm PDC Reset Driver"
112 depends on ARCH_QCOM || COMPILE_TEST
113 help
114 This enables the PDC (Power Domain Controller) reset driver
115 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
116 to control reset signals provided by PDC for Modem, Compute,
117 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
118
119config RESET_SIMPLE
120 bool "Simple Reset Controller Driver" if COMPILE_TEST
121 default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN
122 help
123 This enables a simple reset controller driver for reset lines that
124 that can be asserted and deasserted by toggling bits in a contiguous,
125 exclusive register space.
126
127 Currently this driver supports:
128 - Altera SoCFPGAs
129 - ASPEED BMC SoCs
130 - RCC reset controller in STM32 MCUs
131 - Allwinner SoCs
132 - ZTE's zx2967 family
133 - Bitmain BM1880 SoC
134
135config RESET_STM32MP157
136 bool "STM32MP157 Reset Driver" if COMPILE_TEST
137 default MACH_STM32MP157
138 help
139 This enables the RCC reset controller driver for STM32 MPUs.
140
141config RESET_SOCFPGA
142 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
143 default ARCH_SOCFPGA
144 select RESET_SIMPLE
145 help
146 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
147 driver gets initialized early during platform init calls.
148
149config RESET_SUNXI
150 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
151 default ARCH_SUNXI
152 select RESET_SIMPLE
153 help
154 This enables the reset driver for Allwinner SoCs.
155
156config RESET_TI_SCI
157 tristate "TI System Control Interface (TI-SCI) reset driver"
158 depends on TI_SCI_PROTOCOL
159 help
160 This enables the reset driver support over TI System Control Interface
161 available on some new TI's SoCs. If you wish to use reset resources
162 managed by the TI System Controller, say Y here. Otherwise, say N.
163
164config RESET_TI_SYSCON
165 tristate "TI SYSCON Reset Driver"
166 depends on HAS_IOMEM
167 select MFD_SYSCON
168 help
169 This enables the reset driver support for TI devices with
170 memory-mapped reset registers as part of a syscon device node. If
171 you wish to use the reset framework for such memory-mapped devices,
172 say Y here. Otherwise, say N.
173
174config RESET_UNIPHIER
175 tristate "Reset controller driver for UniPhier SoCs"
176 depends on ARCH_UNIPHIER || COMPILE_TEST
177 depends on OF && MFD_SYSCON
178 default ARCH_UNIPHIER
179 help
180 Support for reset controllers on UniPhier SoCs.
181 Say Y if you want to control reset signals provided by System Control
182 block, Media I/O block, Peripheral Block.
183
184config RESET_UNIPHIER_GLUE
185 tristate "Reset driver in glue layer for UniPhier SoCs"
186 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
187 default ARCH_UNIPHIER
188 select RESET_SIMPLE
189 help
190 Support for peripheral core reset included in its own glue layer
191 on UniPhier SoCs. Say Y if you want to control reset signals
192 provided by the glue layer.
193
194config RESET_ZYNQ
195 bool "ZYNQ Reset Driver" if COMPILE_TEST
196 default ARCH_ZYNQ
197 help
198 This enables the reset controller driver for Xilinx Zynq SoCs.
199
200source "drivers/reset/sti/Kconfig"
201source "drivers/reset/hisilicon/Kconfig"
202source "drivers/reset/tegra/Kconfig"
203
204endif