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1Microsemi Ocelot network Switch
2===============================
3
4The Microsemi Ocelot network switch can be found on Microsemi SoCs (VSC7513,
5VSC7514)
6
7Required properties:
8- compatible: Should be "mscc,vsc7514-switch"
9- reg: Must contain an (offset, length) pair of the register set for each
10 entry in reg-names.
11- reg-names: Must include the following entries:
12 - "sys"
13 - "rew"
14 - "qs"
15 - "qsys"
16 - "ana"
17 - "portX" with X from 0 to the number of last port index available on that
18 switch
19- interrupts: Should contain the switch interrupts for frame extraction and
20 frame injection
21- interrupt-names: should contain the interrupt names: "xtr", "inj"
22- ethernet-ports: A container for child nodes representing switch ports.
23
24The ethernet-ports container has the following properties
25
26Required properties:
27
28- #address-cells: Must be 1
29- #size-cells: Must be 0
30
31Each port node must have the following mandatory properties:
32- reg: Describes the port address in the switch
33
34Port nodes may also contain the following optional standardised
35properties, described in binding documents:
36
37- phy-handle: Phandle to a PHY on an MDIO bus. See
38 Documentation/devicetree/bindings/net/ethernet.txt for details.
39
40Example:
41
42 switch@1010000 {
43 compatible = "mscc,vsc7514-switch";
44 reg = <0x1010000 0x10000>,
45 <0x1030000 0x10000>,
46 <0x1080000 0x100>,
47 <0x11e0000 0x100>,
48 <0x11f0000 0x100>,
49 <0x1200000 0x100>,
50 <0x1210000 0x100>,
51 <0x1220000 0x100>,
52 <0x1230000 0x100>,
53 <0x1240000 0x100>,
54 <0x1250000 0x100>,
55 <0x1260000 0x100>,
56 <0x1270000 0x100>,
57 <0x1280000 0x100>,
58 <0x1800000 0x80000>,
59 <0x1880000 0x10000>;
60 reg-names = "sys", "rew", "qs", "port0", "port1", "port2",
61 "port3", "port4", "port5", "port6", "port7",
62 "port8", "port9", "port10", "qsys", "ana";
63 interrupts = <21 22>;
64 interrupt-names = "xtr", "inj";
65
66 ethernet-ports {
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 port0: port@0 {
71 reg = <0>;
72 phy-handle = <&phy0>;
73 };
74 port1: port@1 {
75 reg = <1>;
76 phy-handle = <&phy1>;
77 };
78 };
79 };