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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved. 4 */ 5 6#ifndef TEGRA_HUB_H 7#define TEGRA_HUB_H 1 8 9#include <drm/drmP.h> 10#include <drm/drm_plane.h> 11 12#include "plane.h" 13 14struct tegra_dc; 15 16struct tegra_windowgroup { 17 unsigned int usecount; 18 struct mutex lock; 19 20 unsigned int index; 21 struct device *parent; 22 struct reset_control *rst; 23}; 24 25struct tegra_shared_plane { 26 struct tegra_plane base; 27 struct tegra_windowgroup *wgrp; 28}; 29 30static inline struct tegra_shared_plane * 31to_tegra_shared_plane(struct drm_plane *plane) 32{ 33 return container_of(plane, struct tegra_shared_plane, base.base); 34} 35 36struct tegra_display_hub_soc { 37 unsigned int num_wgrps; 38 bool supports_dsc; 39}; 40 41struct tegra_display_hub { 42 struct drm_private_obj base; 43 struct host1x_client client; 44 struct clk *clk_disp; 45 struct clk *clk_dsc; 46 struct clk *clk_hub; 47 struct reset_control *rst; 48 49 unsigned int num_heads; 50 struct clk **clk_heads; 51 52 const struct tegra_display_hub_soc *soc; 53 struct tegra_windowgroup *wgrps; 54}; 55 56static inline struct tegra_display_hub * 57to_tegra_display_hub(struct host1x_client *client) 58{ 59 return container_of(client, struct tegra_display_hub, client); 60} 61 62struct tegra_display_hub_state { 63 struct drm_private_state base; 64 65 struct tegra_dc *dc; 66 unsigned long rate; 67 struct clk *clk; 68}; 69 70static inline struct tegra_display_hub_state * 71to_tegra_display_hub_state(struct drm_private_state *priv) 72{ 73 return container_of(priv, struct tegra_display_hub_state, base); 74} 75 76struct tegra_dc; 77struct tegra_plane; 78 79int tegra_display_hub_prepare(struct tegra_display_hub *hub); 80void tegra_display_hub_cleanup(struct tegra_display_hub *hub); 81 82struct drm_plane *tegra_shared_plane_create(struct drm_device *drm, 83 struct tegra_dc *dc, 84 unsigned int wgrp, 85 unsigned int index); 86 87int tegra_display_hub_atomic_check(struct drm_device *drm, 88 struct drm_atomic_state *state); 89void tegra_display_hub_atomic_commit(struct drm_device *drm, 90 struct drm_atomic_state *state); 91 92#define DC_CMD_IHUB_COMMON_MISC_CTL 0x068 93#define LATENCY_EVENT (1 << 3) 94 95#define DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER 0x451 96#define CURS_SLOTS(x) (((x) & 0xff) << 8) 97#define WGRP_SLOTS(x) (((x) & 0xff) << 0) 98 99#endif /* TEGRA_HUB_H */