Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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1/* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23#ifndef __VEGA20_PPT_H__ 24#define __VEGA20_PPT_H__ 25 26#define VEGA20_UMD_PSTATE_GFXCLK_LEVEL 0x3 27#define VEGA20_UMD_PSTATE_SOCCLK_LEVEL 0x3 28#define VEGA20_UMD_PSTATE_MCLK_LEVEL 0x2 29#define VEGA20_UMD_PSTATE_UVDCLK_LEVEL 0x3 30#define VEGA20_UMD_PSTATE_VCEMCLK_LEVEL 0x3 31 32#define MAX_REGULAR_DPM_NUMBER 16 33#define MAX_PCIE_CONF 2 34 35#define VOLTAGE_SCALE 4 36#define AVFS_CURVE 0 37#define OD8_HOTCURVE_TEMPERATURE 85 38 39struct vega20_dpm_level { 40 bool enabled; 41 uint32_t value; 42 uint32_t param1; 43}; 44 45struct vega20_dpm_state { 46 uint32_t soft_min_level; 47 uint32_t soft_max_level; 48 uint32_t hard_min_level; 49 uint32_t hard_max_level; 50}; 51 52struct vega20_single_dpm_table { 53 uint32_t count; 54 struct vega20_dpm_state dpm_state; 55 struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; 56}; 57 58struct vega20_pcie_table { 59 uint16_t count; 60 uint8_t pcie_gen[MAX_PCIE_CONF]; 61 uint8_t pcie_lane[MAX_PCIE_CONF]; 62 uint32_t lclk[MAX_PCIE_CONF]; 63}; 64 65struct vega20_dpm_table { 66 struct vega20_single_dpm_table soc_table; 67 struct vega20_single_dpm_table gfx_table; 68 struct vega20_single_dpm_table mem_table; 69 struct vega20_single_dpm_table eclk_table; 70 struct vega20_single_dpm_table vclk_table; 71 struct vega20_single_dpm_table dclk_table; 72 struct vega20_single_dpm_table dcef_table; 73 struct vega20_single_dpm_table pixel_table; 74 struct vega20_single_dpm_table display_table; 75 struct vega20_single_dpm_table phy_table; 76 struct vega20_single_dpm_table fclk_table; 77 struct vega20_pcie_table pcie_table; 78}; 79 80enum OD8_FEATURE_ID 81{ 82 OD8_GFXCLK_LIMITS = 1 << 0, 83 OD8_GFXCLK_CURVE = 1 << 1, 84 OD8_UCLK_MAX = 1 << 2, 85 OD8_POWER_LIMIT = 1 << 3, 86 OD8_ACOUSTIC_LIMIT_SCLK = 1 << 4, //FanMaximumRpm 87 OD8_FAN_SPEED_MIN = 1 << 5, //FanMinimumPwm 88 OD8_TEMPERATURE_FAN = 1 << 6, //FanTargetTemperature 89 OD8_TEMPERATURE_SYSTEM = 1 << 7, //MaxOpTemp 90 OD8_MEMORY_TIMING_TUNE = 1 << 8, 91 OD8_FAN_ZERO_RPM_CONTROL = 1 << 9 92}; 93 94enum OD8_SETTING_ID 95{ 96 OD8_SETTING_GFXCLK_FMIN = 0, 97 OD8_SETTING_GFXCLK_FMAX, 98 OD8_SETTING_GFXCLK_FREQ1, 99 OD8_SETTING_GFXCLK_VOLTAGE1, 100 OD8_SETTING_GFXCLK_FREQ2, 101 OD8_SETTING_GFXCLK_VOLTAGE2, 102 OD8_SETTING_GFXCLK_FREQ3, 103 OD8_SETTING_GFXCLK_VOLTAGE3, 104 OD8_SETTING_UCLK_FMAX, 105 OD8_SETTING_POWER_PERCENTAGE, 106 OD8_SETTING_FAN_ACOUSTIC_LIMIT, 107 OD8_SETTING_FAN_MIN_SPEED, 108 OD8_SETTING_FAN_TARGET_TEMP, 109 OD8_SETTING_OPERATING_TEMP_MAX, 110 OD8_SETTING_AC_TIMING, 111 OD8_SETTING_FAN_ZERO_RPM_CONTROL, 112 OD8_SETTING_COUNT 113}; 114 115struct vega20_od8_single_setting { 116 uint32_t feature_id; 117 int32_t min_value; 118 int32_t max_value; 119 int32_t current_value; 120 int32_t default_value; 121}; 122 123struct vega20_od8_settings { 124 struct vega20_od8_single_setting od8_settings_array[OD8_SETTING_COUNT]; 125}; 126 127extern void vega20_set_ppt_funcs(struct smu_context *smu); 128 129#endif