Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1What: /sys/class/habanalabs/hl<n>/armcp_kernel_ver
2Date: Jan 2019
3KernelVersion: 5.1
4Contact: oded.gabbay@gmail.com
5Description: Version of the Linux kernel running on the device's CPU
6
7What: /sys/class/habanalabs/hl<n>/armcp_ver
8Date: Jan 2019
9KernelVersion: 5.1
10Contact: oded.gabbay@gmail.com
11Description: Version of the application running on the device's CPU
12
13What: /sys/class/habanalabs/hl<n>/cpld_ver
14Date: Jan 2019
15KernelVersion: 5.1
16Contact: oded.gabbay@gmail.com
17Description: Version of the Device's CPLD F/W
18
19What: /sys/class/habanalabs/hl<n>/device_type
20Date: Jan 2019
21KernelVersion: 5.1
22Contact: oded.gabbay@gmail.com
23Description: Displays the code name of the device according to its type.
24 The supported values are: "GOYA"
25
26What: /sys/class/habanalabs/hl<n>/eeprom
27Date: Jan 2019
28KernelVersion: 5.1
29Contact: oded.gabbay@gmail.com
30Description: A binary file attribute that contains the contents of the
31 on-board EEPROM
32
33What: /sys/class/habanalabs/hl<n>/fuse_ver
34Date: Jan 2019
35KernelVersion: 5.1
36Contact: oded.gabbay@gmail.com
37Description: Displays the device's version from the eFuse
38
39What: /sys/class/habanalabs/hl<n>/hard_reset
40Date: Jan 2019
41KernelVersion: 5.1
42Contact: oded.gabbay@gmail.com
43Description: Interface to trigger a hard-reset operation for the device.
44 Hard-reset will reset ALL internal components of the device
45 except for the PCI interface and the internal PLLs
46
47What: /sys/class/habanalabs/hl<n>/hard_reset_cnt
48Date: Jan 2019
49KernelVersion: 5.1
50Contact: oded.gabbay@gmail.com
51Description: Displays how many times the device have undergone a hard-reset
52 operation since the driver was loaded
53
54What: /sys/class/habanalabs/hl<n>/high_pll
55Date: Jan 2019
56KernelVersion: 5.1
57Contact: oded.gabbay@gmail.com
58Description: Allows the user to set the maximum clock frequency for MME, TPC
59 and IC when the power management profile is set to "automatic".
60
61What: /sys/class/habanalabs/hl<n>/ic_clk
62Date: Jan 2019
63KernelVersion: 5.1
64Contact: oded.gabbay@gmail.com
65Description: Allows the user to set the maximum clock frequency of the
66 Interconnect fabric. Writes to this parameter affect the device
67 only when the power management profile is set to "manual" mode.
68 The device IC clock might be set to lower value then the
69 maximum. The user should read the ic_clk_curr to see the actual
70 frequency value of the IC
71
72What: /sys/class/habanalabs/hl<n>/ic_clk_curr
73Date: Jan 2019
74KernelVersion: 5.1
75Contact: oded.gabbay@gmail.com
76Description: Displays the current clock frequency of the Interconnect fabric
77
78What: /sys/class/habanalabs/hl<n>/infineon_ver
79Date: Jan 2019
80KernelVersion: 5.1
81Contact: oded.gabbay@gmail.com
82Description: Version of the Device's power supply F/W code
83
84What: /sys/class/habanalabs/hl<n>/max_power
85Date: Jan 2019
86KernelVersion: 5.1
87Contact: oded.gabbay@gmail.com
88Description: Allows the user to set the maximum power consumption of the
89 device in milliwatts.
90
91What: /sys/class/habanalabs/hl<n>/mme_clk
92Date: Jan 2019
93KernelVersion: 5.1
94Contact: oded.gabbay@gmail.com
95Description: Allows the user to set the maximum clock frequency of the
96 MME compute engine. Writes to this parameter affect the device
97 only when the power management profile is set to "manual" mode.
98 The device MME clock might be set to lower value then the
99 maximum. The user should read the mme_clk_curr to see the actual
100 frequency value of the MME
101
102What: /sys/class/habanalabs/hl<n>/mme_clk_curr
103Date: Jan 2019
104KernelVersion: 5.1
105Contact: oded.gabbay@gmail.com
106Description: Displays the current clock frequency of the MME compute engine
107
108What: /sys/class/habanalabs/hl<n>/pci_addr
109Date: Jan 2019
110KernelVersion: 5.1
111Contact: oded.gabbay@gmail.com
112Description: Displays the PCI address of the device. This is needed so the
113 user would be able to open a device based on its PCI address
114
115What: /sys/class/habanalabs/hl<n>/pm_mng_profile
116Date: Jan 2019
117KernelVersion: 5.1
118Contact: oded.gabbay@gmail.com
119Description: Power management profile. Values are "auto", "manual". In "auto"
120 mode, the driver will set the maximum clock frequency to a high
121 value when a user-space process opens the device's file (unless
122 it was already opened by another process). The driver will set
123 the max clock frequency to a low value when there are no user
124 processes that are opened on the device's file. In "manual"
125 mode, the user sets the maximum clock frequency by writing to
126 ic_clk, mme_clk and tpc_clk
127
128
129What: /sys/class/habanalabs/hl<n>/preboot_btl_ver
130Date: Jan 2019
131KernelVersion: 5.1
132Contact: oded.gabbay@gmail.com
133Description: Version of the device's preboot F/W code
134
135What: /sys/class/habanalabs/hl<n>/soft_reset
136Date: Jan 2019
137KernelVersion: 5.1
138Contact: oded.gabbay@gmail.com
139Description: Interface to trigger a soft-reset operation for the device.
140 Soft-reset will reset only the compute and DMA engines of the
141 device
142
143What: /sys/class/habanalabs/hl<n>/soft_reset_cnt
144Date: Jan 2019
145KernelVersion: 5.1
146Contact: oded.gabbay@gmail.com
147Description: Displays how many times the device have undergone a soft-reset
148 operation since the driver was loaded
149
150What: /sys/class/habanalabs/hl<n>/status
151Date: Jan 2019
152KernelVersion: 5.1
153Contact: oded.gabbay@gmail.com
154Description: Status of the card: "Operational", "Malfunction", "In reset".
155
156What: /sys/class/habanalabs/hl<n>/thermal_ver
157Date: Jan 2019
158KernelVersion: 5.1
159Contact: oded.gabbay@gmail.com
160Description: Version of the Device's thermal daemon
161
162What: /sys/class/habanalabs/hl<n>/tpc_clk
163Date: Jan 2019
164KernelVersion: 5.1
165Contact: oded.gabbay@gmail.com
166Description: Allows the user to set the maximum clock frequency of the
167 TPC compute engines. Writes to this parameter affect the device
168 only when the power management profile is set to "manual" mode.
169 The device TPC clock might be set to lower value then the
170 maximum. The user should read the tpc_clk_curr to see the actual
171 frequency value of the TPC
172
173What: /sys/class/habanalabs/hl<n>/tpc_clk_curr
174Date: Jan 2019
175KernelVersion: 5.1
176Contact: oded.gabbay@gmail.com
177Description: Displays the current clock frequency of the TPC compute engines
178
179What: /sys/class/habanalabs/hl<n>/uboot_ver
180Date: Jan 2019
181KernelVersion: 5.1
182Contact: oded.gabbay@gmail.com
183Description: Version of the u-boot running on the device's CPU
184
185What: /sys/class/habanalabs/hl<n>/write_open_cnt
186Date: Jan 2019
187KernelVersion: 5.1
188Contact: oded.gabbay@gmail.com
189Description: Displays the total number of user processes that are currently
190 opened on the device's file