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at v5.2-rc6 69 lines 1.3 kB view raw
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* Copyright (C) 2003-2006, Advanced Micro Devices, Inc. 3 */ 4 5#ifndef _GEODE_AES_H_ 6#define _GEODE_AES_H_ 7 8/* driver logic flags */ 9#define AES_MODE_ECB 0 10#define AES_MODE_CBC 1 11 12#define AES_DIR_DECRYPT 0 13#define AES_DIR_ENCRYPT 1 14 15#define AES_FLAGS_HIDDENKEY (1 << 0) 16 17/* Register definitions */ 18 19#define AES_CTRLA_REG 0x0000 20 21#define AES_CTRL_START 0x01 22#define AES_CTRL_DECRYPT 0x00 23#define AES_CTRL_ENCRYPT 0x02 24#define AES_CTRL_WRKEY 0x04 25#define AES_CTRL_DCA 0x08 26#define AES_CTRL_SCA 0x10 27#define AES_CTRL_CBC 0x20 28 29#define AES_INTR_REG 0x0008 30 31#define AES_INTRA_PENDING (1 << 16) 32#define AES_INTRB_PENDING (1 << 17) 33 34#define AES_INTR_PENDING (AES_INTRA_PENDING | AES_INTRB_PENDING) 35#define AES_INTR_MASK 0x07 36 37#define AES_SOURCEA_REG 0x0010 38#define AES_DSTA_REG 0x0014 39#define AES_LENA_REG 0x0018 40#define AES_WRITEKEY0_REG 0x0030 41#define AES_WRITEIV0_REG 0x0040 42 43/* A very large counter that is used to gracefully bail out of an 44 * operation in case of trouble 45 */ 46 47#define AES_OP_TIMEOUT 0x50000 48 49struct geode_aes_op { 50 51 void *src; 52 void *dst; 53 54 u32 mode; 55 u32 dir; 56 u32 flags; 57 int len; 58 59 u8 key[AES_KEYSIZE_128]; 60 u8 *iv; 61 62 union { 63 struct crypto_blkcipher *blk; 64 struct crypto_cipher *cip; 65 } fallback; 66 u32 keylen; 67}; 68 69#endif