Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2//
3// This file is provided under a dual BSD/GPLv2 license. When using or
4// redistributing this file, you may do so under either license.
5//
6// Copyright(c) 2018 Intel Corporation. All rights reserved.
7//
8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9//
10// Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
11// by platform driver code.
12//
13
14#include <linux/mutex.h>
15#include <linux/types.h>
16
17#include "sof-priv.h"
18#include "ops.h"
19
20/*
21 * IPC message default size and timeout (ms).
22 * TODO: allow platforms to set size and timeout.
23 */
24#define IPC_TIMEOUT_MS 300
25
26static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id);
27static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd);
28
29/*
30 * IPC message Tx/Rx message handling.
31 */
32
33/* SOF generic IPC data */
34struct snd_sof_ipc {
35 struct snd_sof_dev *sdev;
36
37 /* protects messages and the disable flag */
38 struct mutex tx_mutex;
39 /* disables further sending of ipc's */
40 bool disable_ipc_tx;
41
42 struct snd_sof_ipc_msg msg;
43};
44
45struct sof_ipc_ctrl_data_params {
46 size_t msg_bytes;
47 size_t hdr_bytes;
48 size_t pl_size;
49 size_t elems;
50 u32 num_msg;
51 u8 *src;
52 u8 *dst;
53};
54
55#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
56static void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
57{
58 u8 *str;
59 u8 *str2 = NULL;
60 u32 glb;
61 u32 type;
62
63 glb = cmd & SOF_GLB_TYPE_MASK;
64 type = cmd & SOF_CMD_TYPE_MASK;
65
66 switch (glb) {
67 case SOF_IPC_GLB_REPLY:
68 str = "GLB_REPLY"; break;
69 case SOF_IPC_GLB_COMPOUND:
70 str = "GLB_COMPOUND"; break;
71 case SOF_IPC_GLB_TPLG_MSG:
72 str = "GLB_TPLG_MSG";
73 switch (type) {
74 case SOF_IPC_TPLG_COMP_NEW:
75 str2 = "COMP_NEW"; break;
76 case SOF_IPC_TPLG_COMP_FREE:
77 str2 = "COMP_FREE"; break;
78 case SOF_IPC_TPLG_COMP_CONNECT:
79 str2 = "COMP_CONNECT"; break;
80 case SOF_IPC_TPLG_PIPE_NEW:
81 str2 = "PIPE_NEW"; break;
82 case SOF_IPC_TPLG_PIPE_FREE:
83 str2 = "PIPE_FREE"; break;
84 case SOF_IPC_TPLG_PIPE_CONNECT:
85 str2 = "PIPE_CONNECT"; break;
86 case SOF_IPC_TPLG_PIPE_COMPLETE:
87 str2 = "PIPE_COMPLETE"; break;
88 case SOF_IPC_TPLG_BUFFER_NEW:
89 str2 = "BUFFER_NEW"; break;
90 case SOF_IPC_TPLG_BUFFER_FREE:
91 str2 = "BUFFER_FREE"; break;
92 default:
93 str2 = "unknown type"; break;
94 }
95 break;
96 case SOF_IPC_GLB_PM_MSG:
97 str = "GLB_PM_MSG";
98 switch (type) {
99 case SOF_IPC_PM_CTX_SAVE:
100 str2 = "CTX_SAVE"; break;
101 case SOF_IPC_PM_CTX_RESTORE:
102 str2 = "CTX_RESTORE"; break;
103 case SOF_IPC_PM_CTX_SIZE:
104 str2 = "CTX_SIZE"; break;
105 case SOF_IPC_PM_CLK_SET:
106 str2 = "CLK_SET"; break;
107 case SOF_IPC_PM_CLK_GET:
108 str2 = "CLK_GET"; break;
109 case SOF_IPC_PM_CLK_REQ:
110 str2 = "CLK_REQ"; break;
111 case SOF_IPC_PM_CORE_ENABLE:
112 str2 = "CORE_ENABLE"; break;
113 default:
114 str2 = "unknown type"; break;
115 }
116 break;
117 case SOF_IPC_GLB_COMP_MSG:
118 str = "GLB_COMP_MSG";
119 switch (type) {
120 case SOF_IPC_COMP_SET_VALUE:
121 str2 = "SET_VALUE"; break;
122 case SOF_IPC_COMP_GET_VALUE:
123 str2 = "GET_VALUE"; break;
124 case SOF_IPC_COMP_SET_DATA:
125 str2 = "SET_DATA"; break;
126 case SOF_IPC_COMP_GET_DATA:
127 str2 = "GET_DATA"; break;
128 default:
129 str2 = "unknown type"; break;
130 }
131 break;
132 case SOF_IPC_GLB_STREAM_MSG:
133 str = "GLB_STREAM_MSG";
134 switch (type) {
135 case SOF_IPC_STREAM_PCM_PARAMS:
136 str2 = "PCM_PARAMS"; break;
137 case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
138 str2 = "PCM_REPLY"; break;
139 case SOF_IPC_STREAM_PCM_FREE:
140 str2 = "PCM_FREE"; break;
141 case SOF_IPC_STREAM_TRIG_START:
142 str2 = "TRIG_START"; break;
143 case SOF_IPC_STREAM_TRIG_STOP:
144 str2 = "TRIG_STOP"; break;
145 case SOF_IPC_STREAM_TRIG_PAUSE:
146 str2 = "TRIG_PAUSE"; break;
147 case SOF_IPC_STREAM_TRIG_RELEASE:
148 str2 = "TRIG_RELEASE"; break;
149 case SOF_IPC_STREAM_TRIG_DRAIN:
150 str2 = "TRIG_DRAIN"; break;
151 case SOF_IPC_STREAM_TRIG_XRUN:
152 str2 = "TRIG_XRUN"; break;
153 case SOF_IPC_STREAM_POSITION:
154 str2 = "POSITION"; break;
155 case SOF_IPC_STREAM_VORBIS_PARAMS:
156 str2 = "VORBIS_PARAMS"; break;
157 case SOF_IPC_STREAM_VORBIS_FREE:
158 str2 = "VORBIS_FREE"; break;
159 default:
160 str2 = "unknown type"; break;
161 }
162 break;
163 case SOF_IPC_FW_READY:
164 str = "FW_READY"; break;
165 case SOF_IPC_GLB_DAI_MSG:
166 str = "GLB_DAI_MSG";
167 switch (type) {
168 case SOF_IPC_DAI_CONFIG:
169 str2 = "CONFIG"; break;
170 case SOF_IPC_DAI_LOOPBACK:
171 str2 = "LOOPBACK"; break;
172 default:
173 str2 = "unknown type"; break;
174 }
175 break;
176 case SOF_IPC_GLB_TRACE_MSG:
177 str = "GLB_TRACE_MSG"; break;
178 default:
179 str = "unknown GLB command"; break;
180 }
181
182 if (str2)
183 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
184 else
185 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
186}
187#else
188static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
189{
190 dev_dbg(dev, "%s: 0x%x\n", text, cmd);
191}
192#endif
193
194/* wait for IPC message reply */
195static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg,
196 void *reply_data)
197{
198 struct snd_sof_dev *sdev = ipc->sdev;
199 struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
200 int ret;
201
202 /* wait for DSP IPC completion */
203 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
204 msecs_to_jiffies(IPC_TIMEOUT_MS));
205
206 if (ret == 0) {
207 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n",
208 hdr->cmd, hdr->size);
209 snd_sof_dsp_dbg_dump(ipc->sdev, SOF_DBG_REGS | SOF_DBG_MBOX);
210 snd_sof_ipc_dump(ipc->sdev);
211 snd_sof_trace_notify_for_error(ipc->sdev);
212 ret = -ETIMEDOUT;
213 } else {
214 /* copy the data returned from DSP */
215 ret = msg->reply_error;
216 if (msg->reply_size)
217 memcpy(reply_data, msg->reply_data, msg->reply_size);
218 if (ret < 0)
219 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n",
220 hdr->cmd, msg->reply_size);
221 else
222 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
223 }
224
225 return ret;
226}
227
228/* send IPC message from host to DSP */
229static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header,
230 void *msg_data, size_t msg_bytes,
231 void *reply_data, size_t reply_bytes)
232{
233 struct snd_sof_dev *sdev = ipc->sdev;
234 struct snd_sof_ipc_msg *msg;
235 int ret;
236
237 if (ipc->disable_ipc_tx)
238 return -ENODEV;
239
240 /*
241 * The spin-lock is also still needed to protect message objects against
242 * other atomic contexts.
243 */
244 spin_lock_irq(&sdev->ipc_lock);
245
246 /* initialise the message */
247 msg = &ipc->msg;
248
249 msg->header = header;
250 msg->msg_size = msg_bytes;
251 msg->reply_size = reply_bytes;
252 msg->reply_error = 0;
253
254 /* attach any data */
255 if (msg_bytes)
256 memcpy(msg->msg_data, msg_data, msg_bytes);
257
258 sdev->msg = msg;
259
260 ret = snd_sof_dsp_send_msg(sdev, msg);
261 /* Next reply that we receive will be related to this message */
262 if (!ret)
263 msg->ipc_complete = false;
264
265 spin_unlock_irq(&sdev->ipc_lock);
266
267 if (ret < 0) {
268 /* So far IPC TX never fails, consider making the above void */
269 dev_err_ratelimited(sdev->dev,
270 "error: ipc tx failed with error %d\n",
271 ret);
272 return ret;
273 }
274
275 ipc_log_header(sdev->dev, "ipc tx", msg->header);
276
277 /* now wait for completion */
278 if (!ret)
279 ret = tx_wait_done(ipc, msg, reply_data);
280
281 return ret;
282}
283
284/* send IPC message from host to DSP */
285int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
286 void *msg_data, size_t msg_bytes, void *reply_data,
287 size_t reply_bytes)
288{
289 int ret;
290
291 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE ||
292 reply_bytes > SOF_IPC_MSG_MAX_SIZE)
293 return -ENOBUFS;
294
295 /* Serialise IPC TX */
296 mutex_lock(&ipc->tx_mutex);
297
298 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes,
299 reply_data, reply_bytes);
300
301 mutex_unlock(&ipc->tx_mutex);
302
303 return ret;
304}
305EXPORT_SYMBOL(sof_ipc_tx_message);
306
307/* handle reply message from DSP */
308int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
309{
310 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
311
312 if (msg->ipc_complete) {
313 dev_err(sdev->dev, "error: no reply expected, received 0x%x",
314 msg_id);
315 return -EINVAL;
316 }
317
318 /* wake up and return the error if we have waiters on this message ? */
319 msg->ipc_complete = true;
320 wake_up(&msg->waitq);
321
322 return 0;
323}
324EXPORT_SYMBOL(snd_sof_ipc_reply);
325
326/* DSP firmware has sent host a message */
327void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
328{
329 struct sof_ipc_cmd_hdr hdr;
330 u32 cmd, type;
331 int err = 0;
332
333 /* read back header */
334 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
335 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd);
336
337 cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
338 type = hdr.cmd & SOF_CMD_TYPE_MASK;
339
340 /* check message type */
341 switch (cmd) {
342 case SOF_IPC_GLB_REPLY:
343 dev_err(sdev->dev, "error: ipc reply unknown\n");
344 break;
345 case SOF_IPC_FW_READY:
346 /* check for FW boot completion */
347 if (!sdev->boot_complete) {
348 err = sof_ops(sdev)->fw_ready(sdev, cmd);
349 if (err < 0) {
350 /*
351 * this indicates a mismatch in ABI
352 * between the driver and fw
353 */
354 dev_err(sdev->dev, "error: ABI mismatch %d\n",
355 err);
356 } else {
357 /* firmware boot completed OK */
358 sdev->boot_complete = true;
359 }
360
361 /* wake up firmware loader */
362 wake_up(&sdev->boot_wait);
363 }
364 break;
365 case SOF_IPC_GLB_COMPOUND:
366 case SOF_IPC_GLB_TPLG_MSG:
367 case SOF_IPC_GLB_PM_MSG:
368 case SOF_IPC_GLB_COMP_MSG:
369 break;
370 case SOF_IPC_GLB_STREAM_MSG:
371 /* need to pass msg id into the function */
372 ipc_stream_message(sdev, hdr.cmd);
373 break;
374 case SOF_IPC_GLB_TRACE_MSG:
375 ipc_trace_message(sdev, type);
376 break;
377 default:
378 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd);
379 break;
380 }
381
382 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd);
383}
384EXPORT_SYMBOL(snd_sof_ipc_msgs_rx);
385
386/*
387 * IPC trace mechanism.
388 */
389
390static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id)
391{
392 struct sof_ipc_dma_trace_posn posn;
393
394 switch (msg_id) {
395 case SOF_IPC_TRACE_DMA_POSITION:
396 /* read back full message */
397 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn));
398 snd_sof_trace_update_pos(sdev, &posn);
399 break;
400 default:
401 dev_err(sdev->dev, "error: unhandled trace message %x\n",
402 msg_id);
403 break;
404 }
405}
406
407/*
408 * IPC stream position.
409 */
410
411static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
412{
413 struct snd_sof_pcm_stream *stream;
414 struct sof_ipc_stream_posn posn;
415 struct snd_sof_pcm *spcm;
416 int direction;
417
418 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
419 if (!spcm) {
420 dev_err(sdev->dev,
421 "error: period elapsed for unknown stream, msg_id %d\n",
422 msg_id);
423 return;
424 }
425
426 stream = &spcm->stream[direction];
427 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
428
429 dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
430 posn.host_posn, posn.dai_posn, posn.wallclock);
431
432 memcpy(&stream->posn, &posn, sizeof(posn));
433
434 /* only inform ALSA for period_wakeup mode */
435 if (!stream->substream->runtime->no_period_wakeup)
436 snd_sof_pcm_period_elapsed(stream->substream);
437}
438
439/* DSP notifies host of an XRUN within FW */
440static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id)
441{
442 struct snd_sof_pcm_stream *stream;
443 struct sof_ipc_stream_posn posn;
444 struct snd_sof_pcm *spcm;
445 int direction;
446
447 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
448 if (!spcm) {
449 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n",
450 msg_id);
451 return;
452 }
453
454 stream = &spcm->stream[direction];
455 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
456
457 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n",
458 posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
459
460#if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
461 /* stop PCM on XRUN - used for pipeline debug */
462 memcpy(&stream->posn, &posn, sizeof(posn));
463 snd_pcm_stop_xrun(stream->substream);
464#endif
465}
466
467/* stream notifications from DSP FW */
468static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd)
469{
470 /* get msg cmd type and msd id */
471 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK;
472 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd);
473
474 switch (msg_type) {
475 case SOF_IPC_STREAM_POSITION:
476 ipc_period_elapsed(sdev, msg_id);
477 break;
478 case SOF_IPC_STREAM_TRIG_XRUN:
479 ipc_xrun(sdev, msg_id);
480 break;
481 default:
482 dev_err(sdev->dev, "error: unhandled stream message %x\n",
483 msg_id);
484 break;
485 }
486}
487
488/* get stream position IPC - use faster MMIO method if available on platform */
489int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev,
490 struct snd_sof_pcm *spcm, int direction,
491 struct sof_ipc_stream_posn *posn)
492{
493 struct sof_ipc_stream stream;
494 int err;
495
496 /* read position via slower IPC */
497 stream.hdr.size = sizeof(stream);
498 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION;
499 stream.comp_id = spcm->stream[direction].comp_id;
500
501 /* send IPC to the DSP */
502 err = sof_ipc_tx_message(sdev->ipc,
503 stream.hdr.cmd, &stream, sizeof(stream), &posn,
504 sizeof(*posn));
505 if (err < 0) {
506 dev_err(sdev->dev, "error: failed to get stream %d position\n",
507 stream.comp_id);
508 return err;
509 }
510
511 return 0;
512}
513EXPORT_SYMBOL(snd_sof_ipc_stream_posn);
514
515static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,
516 struct sof_ipc_ctrl_data *src,
517 struct sof_ipc_ctrl_data *dst,
518 struct sof_ipc_ctrl_data_params *sparams)
519{
520 switch (ctrl_type) {
521 case SOF_CTRL_TYPE_VALUE_CHAN_GET:
522 case SOF_CTRL_TYPE_VALUE_CHAN_SET:
523 sparams->src = (u8 *)src->chanv;
524 sparams->dst = (u8 *)dst->chanv;
525 break;
526 case SOF_CTRL_TYPE_VALUE_COMP_GET:
527 case SOF_CTRL_TYPE_VALUE_COMP_SET:
528 sparams->src = (u8 *)src->compv;
529 sparams->dst = (u8 *)dst->compv;
530 break;
531 case SOF_CTRL_TYPE_DATA_GET:
532 case SOF_CTRL_TYPE_DATA_SET:
533 sparams->src = (u8 *)src->data->data;
534 sparams->dst = (u8 *)dst->data->data;
535 break;
536 default:
537 return -EINVAL;
538 }
539
540 /* calculate payload size and number of messages */
541 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes;
542 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size);
543
544 return 0;
545}
546
547static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev,
548 struct sof_ipc_ctrl_data *cdata,
549 struct sof_ipc_ctrl_data_params *sparams,
550 bool send)
551{
552 struct sof_ipc_ctrl_data *partdata;
553 size_t send_bytes;
554 size_t offset = 0;
555 size_t msg_bytes;
556 size_t pl_size;
557 int err;
558 int i;
559
560 /* allocate max ipc size because we have at least one */
561 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
562 if (!partdata)
563 return -ENOMEM;
564
565 if (send)
566 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata,
567 sparams);
568 else
569 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata,
570 sparams);
571 if (err < 0)
572 return err;
573
574 msg_bytes = sparams->msg_bytes;
575 pl_size = sparams->pl_size;
576
577 /* copy the header data */
578 memcpy(partdata, cdata, sparams->hdr_bytes);
579
580 /* Serialise IPC TX */
581 mutex_lock(&sdev->ipc->tx_mutex);
582
583 /* copy the payload data in a loop */
584 for (i = 0; i < sparams->num_msg; i++) {
585 send_bytes = min(msg_bytes, pl_size);
586 partdata->num_elems = send_bytes;
587 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes;
588 partdata->msg_index = i;
589 msg_bytes -= send_bytes;
590 partdata->elems_remaining = msg_bytes;
591
592 if (send)
593 memcpy(sparams->dst, sparams->src + offset, send_bytes);
594
595 err = sof_ipc_tx_message_unlocked(sdev->ipc,
596 partdata->rhdr.hdr.cmd,
597 partdata,
598 partdata->rhdr.hdr.size,
599 partdata,
600 partdata->rhdr.hdr.size);
601 if (err < 0)
602 break;
603
604 if (!send)
605 memcpy(sparams->dst + offset, sparams->src, send_bytes);
606
607 offset += pl_size;
608 }
609
610 mutex_unlock(&sdev->ipc->tx_mutex);
611
612 kfree(partdata);
613 return err;
614}
615
616/*
617 * IPC get()/set() for kcontrols.
618 */
619int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc,
620 struct snd_sof_control *scontrol,
621 u32 ipc_cmd,
622 enum sof_ipc_ctrl_type ctrl_type,
623 enum sof_ipc_ctrl_cmd ctrl_cmd,
624 bool send)
625{
626 struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
627 struct snd_sof_dev *sdev = ipc->sdev;
628 struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
629 struct sof_ipc_fw_version *v = &ready->version;
630 struct sof_ipc_ctrl_data_params sparams;
631 size_t send_bytes;
632 int err;
633
634 /* read or write firmware volume */
635 if (scontrol->readback_offset != 0) {
636 /* write/read value header via mmaped region */
637 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) *
638 cdata->num_elems;
639 if (send)
640 snd_sof_dsp_block_write(sdev, sdev->mmio_bar,
641 scontrol->readback_offset,
642 cdata->chanv, send_bytes);
643
644 else
645 snd_sof_dsp_block_read(sdev, sdev->mmio_bar,
646 scontrol->readback_offset,
647 cdata->chanv, send_bytes);
648 return 0;
649 }
650
651 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd;
652 cdata->cmd = ctrl_cmd;
653 cdata->type = ctrl_type;
654 cdata->comp_id = scontrol->comp_id;
655 cdata->msg_index = 0;
656
657 /* calculate header and data size */
658 switch (cdata->type) {
659 case SOF_CTRL_TYPE_VALUE_CHAN_GET:
660 case SOF_CTRL_TYPE_VALUE_CHAN_SET:
661 sparams.msg_bytes = scontrol->num_channels *
662 sizeof(struct sof_ipc_ctrl_value_chan);
663 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
664 sparams.elems = scontrol->num_channels;
665 break;
666 case SOF_CTRL_TYPE_VALUE_COMP_GET:
667 case SOF_CTRL_TYPE_VALUE_COMP_SET:
668 sparams.msg_bytes = scontrol->num_channels *
669 sizeof(struct sof_ipc_ctrl_value_comp);
670 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
671 sparams.elems = scontrol->num_channels;
672 break;
673 case SOF_CTRL_TYPE_DATA_GET:
674 case SOF_CTRL_TYPE_DATA_SET:
675 sparams.msg_bytes = cdata->data->size;
676 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) +
677 sizeof(struct sof_abi_hdr);
678 sparams.elems = cdata->data->size;
679 break;
680 default:
681 return -EINVAL;
682 }
683
684 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes;
685 cdata->num_elems = sparams.elems;
686 cdata->elems_remaining = 0;
687
688 /* send normal size ipc in one part */
689 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) {
690 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata,
691 cdata->rhdr.hdr.size, cdata,
692 cdata->rhdr.hdr.size);
693
694 if (err < 0)
695 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n",
696 cdata->comp_id);
697
698 return err;
699 }
700
701 /* data is bigger than max ipc size, chop into smaller pieces */
702 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n",
703 cdata->rhdr.hdr.size, scontrol->size);
704
705 /* large messages is only supported from ABI 3.3.0 onwards */
706 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) {
707 dev_err(sdev->dev, "error: incompatible FW ABI version\n");
708 return -EINVAL;
709 }
710
711 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send);
712
713 if (err < 0)
714 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n",
715 cdata->comp_id);
716
717 return err;
718}
719EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data);
720
721/*
722 * IPC layer enumeration.
723 */
724
725int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
726 size_t dspbox_size, u32 hostbox,
727 size_t hostbox_size)
728{
729 sdev->dsp_box.offset = dspbox;
730 sdev->dsp_box.size = dspbox_size;
731 sdev->host_box.offset = hostbox;
732 sdev->host_box.size = hostbox_size;
733 return 0;
734}
735EXPORT_SYMBOL(snd_sof_dsp_mailbox_init);
736
737int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
738{
739 struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
740 struct sof_ipc_fw_version *v = &ready->version;
741
742 dev_info(sdev->dev,
743 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor,
744 v->micro, v->tag);
745 dev_info(sdev->dev,
746 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
747 SOF_ABI_VERSION_MAJOR(v->abi_version),
748 SOF_ABI_VERSION_MINOR(v->abi_version),
749 SOF_ABI_VERSION_PATCH(v->abi_version),
750 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
751
752 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
753 dev_err(sdev->dev, "error: incompatible FW ABI version\n");
754 return -EINVAL;
755 }
756
757 if (v->abi_version > SOF_ABI_VERSION) {
758 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) {
759 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n");
760 } else {
761 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n");
762 return -EINVAL;
763 }
764 }
765
766 if (ready->flags & SOF_IPC_INFO_BUILD) {
767 dev_info(sdev->dev,
768 "Firmware debug build %d on %s-%s - options:\n"
769 " GDB: %s\n"
770 " lock debug: %s\n"
771 " lock vdebug: %s\n",
772 v->build, v->date, v->time,
773 ready->flags & SOF_IPC_INFO_GDB ?
774 "enabled" : "disabled",
775 ready->flags & SOF_IPC_INFO_LOCKS ?
776 "enabled" : "disabled",
777 ready->flags & SOF_IPC_INFO_LOCKSV ?
778 "enabled" : "disabled");
779 }
780
781 /* copy the fw_version into debugfs at first boot */
782 memcpy(&sdev->fw_version, v, sizeof(*v));
783
784 return 0;
785}
786EXPORT_SYMBOL(snd_sof_ipc_valid);
787
788struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev)
789{
790 struct snd_sof_ipc *ipc;
791 struct snd_sof_ipc_msg *msg;
792
793 /* check if mandatory ops required for ipc are defined */
794 if (!sof_ops(sdev)->fw_ready) {
795 dev_err(sdev->dev, "error: ipc mandatory ops not defined\n");
796 return NULL;
797 }
798
799 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL);
800 if (!ipc)
801 return NULL;
802
803 mutex_init(&ipc->tx_mutex);
804 ipc->sdev = sdev;
805 msg = &ipc->msg;
806
807 /* indicate that we aren't sending a message ATM */
808 msg->ipc_complete = true;
809
810 /* pre-allocate message data */
811 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
812 GFP_KERNEL);
813 if (!msg->msg_data)
814 return NULL;
815
816 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
817 GFP_KERNEL);
818 if (!msg->reply_data)
819 return NULL;
820
821 init_waitqueue_head(&msg->waitq);
822
823 return ipc;
824}
825EXPORT_SYMBOL(snd_sof_ipc_init);
826
827void snd_sof_ipc_free(struct snd_sof_dev *sdev)
828{
829 struct snd_sof_ipc *ipc = sdev->ipc;
830
831 /* disable sending of ipc's */
832 mutex_lock(&ipc->tx_mutex);
833 ipc->disable_ipc_tx = true;
834 mutex_unlock(&ipc->tx_mutex);
835}
836EXPORT_SYMBOL(snd_sof_ipc_free);