tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1&l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
4 <0x44c00800 0x800>,
5 <0x44c01000 0x400>,
6 <0x44c01400 0x400>;
7 reg-names = "ap", "la", "ia0", "ia1";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
13
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
22 };
23
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <1>;
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
33
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
36 status = "disabled";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 ranges = <0x0 0x0 0x4000>;
40 };
41
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
44 status = "disabled";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges = <0x0 0x80000 0x2000>;
48 };
49
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
52 reg = <0xf0000 0x4>;
53 reg-names = "rev";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges = <0x0 0xf0000 0x10000>;
57
58 prcm: prcm@0 {
59 compatible = "ti,am4-prcm", "simple-bus";
60 reg = <0x0 0x11000>;
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges = <0 0 0x11000>;
65
66 prcm_clocks: clocks {
67 #address-cells = <1>;
68 #size-cells = <0>;
69 };
70
71 prcm_clockdomains: clockdomains {
72 };
73 };
74 };
75 };
76
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <1>;
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
116
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
119 status = "disabled";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
123 };
124
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
127 status = "disabled";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
131 };
132
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
135 ti,hwmods = "gpio1";
136 reg = <0x7000 0x4>,
137 <0x7010 0x4>,
138 <0x7114 0x4>;
139 reg-names = "rev", "sysc", "syss";
140 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
141 SYSC_OMAP2_SOFTRESET |
142 SYSC_OMAP2_AUTOIDLE)>;
143 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
144 <SYSC_IDLE_NO>,
145 <SYSC_IDLE_SMART>,
146 <SYSC_IDLE_SMART_WKUP>;
147 ti,syss-mask = <1>;
148 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
149 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
150 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
151 clock-names = "fck", "dbclk";
152 #address-cells = <1>;
153 #size-cells = <1>;
154 ranges = <0x0 0x7000 0x1000>;
155
156 gpio0: gpio@0 {
157 compatible = "ti,am4372-gpio","ti,omap4-gpio";
158 reg = <0x0 0x1000>;
159 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
160 gpio-controller;
161 #gpio-cells = <2>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
164 status = "disabled";
165 };
166 };
167
168 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
169 compatible = "ti,sysc-omap2", "ti,sysc";
170 ti,hwmods = "uart1";
171 reg = <0x9050 0x4>,
172 <0x9054 0x4>,
173 <0x9058 0x4>;
174 reg-names = "rev", "sysc", "syss";
175 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
176 SYSC_OMAP2_SOFTRESET |
177 SYSC_OMAP2_AUTOIDLE)>;
178 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
179 <SYSC_IDLE_NO>,
180 <SYSC_IDLE_SMART>,
181 <SYSC_IDLE_SMART_WKUP>;
182 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
183 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
184 clock-names = "fck";
185 #address-cells = <1>;
186 #size-cells = <1>;
187 ranges = <0x0 0x9000 0x1000>;
188
189 uart0: serial@0 {
190 compatible = "ti,am4372-uart","ti,omap2-uart";
191 reg = <0x0 0x2000>;
192 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
193 };
194 };
195
196 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
197 compatible = "ti,sysc-omap2", "ti,sysc";
198 ti,hwmods = "i2c1";
199 reg = <0xb000 0x8>,
200 <0xb010 0x8>,
201 <0xb090 0x8>;
202 reg-names = "rev", "sysc", "syss";
203 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
204 SYSC_OMAP2_ENAWAKEUP |
205 SYSC_OMAP2_SOFTRESET |
206 SYSC_OMAP2_AUTOIDLE)>;
207 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
208 <SYSC_IDLE_NO>,
209 <SYSC_IDLE_SMART>,
210 <SYSC_IDLE_SMART_WKUP>;
211 ti,syss-mask = <1>;
212 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
213 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
214 clock-names = "fck";
215 #address-cells = <1>;
216 #size-cells = <1>;
217 ranges = <0x0 0xb000 0x1000>;
218
219 i2c0: i2c@0 {
220 compatible = "ti,am4372-i2c","ti,omap4-i2c";
221 reg = <0x0 0x1000>;
222 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
223 #address-cells = <1>;
224 #size-cells = <0>;
225 status = "disabled";
226 };
227 };
228
229 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
230 compatible = "ti,sysc-omap4", "ti,sysc";
231 ti,hwmods = "adc_tsc";
232 reg = <0xd000 0x4>,
233 <0xd010 0x4>;
234 reg-names = "rev", "sysc";
235 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
236 <SYSC_IDLE_NO>,
237 <SYSC_IDLE_SMART>,
238 <SYSC_IDLE_SMART_WKUP>;
239 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
240 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
241 clock-names = "fck";
242 #address-cells = <1>;
243 #size-cells = <1>;
244 ranges = <0x0 0xd000 0x1000>;
245
246 tscadc: tscadc@0 {
247 compatible = "ti,am3359-tscadc";
248 reg = <0x0 0x1000>;
249 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&adc_tsc_fck>;
251 clock-names = "fck";
252 status = "disabled";
253 dmas = <&edma 53 0>, <&edma 57 0>;
254 dma-names = "fifo0", "fifo1";
255
256 tsc {
257 compatible = "ti,am3359-tsc";
258 };
259
260 adc {
261 #io-channel-cells = <1>;
262 compatible = "ti,am3359-adc";
263 };
264
265 };
266 };
267
268 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
269 compatible = "ti,sysc-omap4", "ti,sysc";
270 reg = <0x10000 0x4>;
271 reg-names = "rev";
272 #address-cells = <1>;
273 #size-cells = <1>;
274 ranges = <0x0 0x10000 0x10000>;
275
276 scm: scm@0 {
277 compatible = "ti,am4-scm", "simple-bus";
278 reg = <0x0 0x4000>;
279 #address-cells = <1>;
280 #size-cells = <1>;
281 ranges = <0 0 0x4000>;
282
283 am43xx_pinmux: pinmux@800 {
284 compatible = "ti,am437-padconf",
285 "pinctrl-single";
286 reg = <0x800 0x31c>;
287 #address-cells = <1>;
288 #size-cells = <0>;
289 #pinctrl-cells = <1>;
290 #interrupt-cells = <1>;
291 interrupt-controller;
292 pinctrl-single,register-width = <32>;
293 pinctrl-single,function-mask = <0xffffffff>;
294 };
295
296 scm_conf: scm_conf@0 {
297 compatible = "syscon", "simple-bus";
298 reg = <0x0 0x800>;
299 #address-cells = <1>;
300 #size-cells = <1>;
301
302 phy_gmii_sel: phy-gmii-sel {
303 compatible = "ti,am43xx-phy-gmii-sel";
304 reg = <0x650 0x4>;
305 #phy-cells = <2>;
306 };
307
308 scm_clocks: clocks {
309 #address-cells = <1>;
310 #size-cells = <0>;
311 };
312 };
313
314 wkup_m3_ipc: wkup_m3_ipc@1324 {
315 compatible = "ti,am4372-wkup-m3-ipc";
316 reg = <0x1324 0x44>;
317 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
318 ti,rproc = <&wkup_m3>;
319 mboxes = <&mailbox &mbox_wkupm3>;
320 };
321
322 edma_xbar: dma-router@f90 {
323 compatible = "ti,am335x-edma-crossbar";
324 reg = <0xf90 0x40>;
325 #dma-cells = <3>;
326 dma-requests = <64>;
327 dma-masters = <&edma>;
328 };
329
330 scm_clockdomains: clockdomains {
331 };
332 };
333 };
334
335 target-module@31000 { /* 0x44e31000, ap 24 40.0 */
336 compatible = "ti,sysc-omap2-timer", "ti,sysc";
337 ti,hwmods = "timer1";
338 reg = <0x31000 0x4>,
339 <0x31010 0x4>,
340 <0x31014 0x4>;
341 reg-names = "rev", "sysc", "syss";
342 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
343 SYSC_OMAP2_SOFTRESET |
344 SYSC_OMAP2_AUTOIDLE)>;
345 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
346 <SYSC_IDLE_NO>,
347 <SYSC_IDLE_SMART>;
348 ti,syss-mask = <1>;
349 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
350 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
351 clock-names = "fck";
352 #address-cells = <1>;
353 #size-cells = <1>;
354 ranges = <0x0 0x31000 0x1000>;
355
356 timer1: timer@0 {
357 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
358 reg = <0x0 0x400>;
359 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
360 ti,timer-alwon;
361 clocks = <&timer1_fck>;
362 clock-names = "fck";
363 };
364 };
365
366 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
367 compatible = "ti,sysc";
368 status = "disabled";
369 #address-cells = <1>;
370 #size-cells = <1>;
371 ranges = <0x0 0x33000 0x1000>;
372 };
373
374 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
375 compatible = "ti,sysc-omap2", "ti,sysc";
376 ti,hwmods = "wd_timer2";
377 reg = <0x35000 0x4>,
378 <0x35010 0x4>,
379 <0x35014 0x4>;
380 reg-names = "rev", "sysc", "syss";
381 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
382 SYSC_OMAP2_SOFTRESET)>;
383 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
384 <SYSC_IDLE_NO>,
385 <SYSC_IDLE_SMART>,
386 <SYSC_IDLE_SMART_WKUP>;
387 ti,syss-mask = <1>;
388 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
389 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
390 clock-names = "fck";
391 #address-cells = <1>;
392 #size-cells = <1>;
393 ranges = <0x0 0x35000 0x1000>;
394
395 wdt: wdt@0 {
396 compatible = "ti,am4372-wdt","ti,omap3-wdt";
397 reg = <0x0 0x1000>;
398 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
399 };
400 };
401
402 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
403 compatible = "ti,sysc";
404 status = "disabled";
405 #address-cells = <1>;
406 #size-cells = <1>;
407 ranges = <0x0 0x37000 0x1000>;
408 };
409
410 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
411 compatible = "ti,sysc";
412 status = "disabled";
413 #address-cells = <1>;
414 #size-cells = <1>;
415 ranges = <0x0 0x39000 0x1000>;
416 };
417
418 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
419 compatible = "ti,sysc-omap4-simple", "ti,sysc";
420 ti,hwmods = "rtc";
421 reg = <0x3e074 0x4>,
422 <0x3e078 0x4>;
423 reg-names = "rev", "sysc";
424 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
425 <SYSC_IDLE_NO>,
426 <SYSC_IDLE_SMART>,
427 <SYSC_IDLE_SMART_WKUP>;
428 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
429 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
430 clock-names = "fck";
431 #address-cells = <1>;
432 #size-cells = <1>;
433 ranges = <0x0 0x3e000 0x1000>;
434
435 rtc: rtc@0 {
436 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
437 "ti,da830-rtc";
438 reg = <0x0 0x1000>;
439 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&clk_32768_ck>;
442 clock-names = "int-clk";
443 system-power-controller;
444 status = "disabled";
445 };
446 };
447
448 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
449 compatible = "ti,sysc";
450 status = "disabled";
451 #address-cells = <1>;
452 #size-cells = <1>;
453 ranges = <0x0 0x40000 0x40000>;
454 };
455
456 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
457 compatible = "ti,sysc-omap2", "ti,sysc";
458 ti,hwmods = "counter_32k";
459 reg = <0x86000 0x4>,
460 <0x86004 0x4>;
461 reg-names = "rev", "sysc";
462 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
463 <SYSC_IDLE_NO>;
464 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
465 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
466 clock-names = "fck";
467 #address-cells = <1>;
468 #size-cells = <1>;
469 ranges = <0x0 0x86000 0x1000>;
470
471 counter32k: counter@0 {
472 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
473 reg = <0x0 0x40>;
474 };
475 };
476
477 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
478 compatible = "ti,sysc";
479 status = "disabled";
480 #address-cells = <1>;
481 #size-cells = <1>;
482 ranges = <0x00000000 0x00088000 0x00008000>,
483 <0x00008000 0x00090000 0x00001000>,
484 <0x00009000 0x00091000 0x00001000>;
485 };
486 };
487};
488
489&l4_fast { /* 0x4a000000 */
490 compatible = "ti,am4-l4-fast", "simple-bus";
491 reg = <0x4a000000 0x800>,
492 <0x4a000800 0x800>,
493 <0x4a001000 0x400>;
494 reg-names = "ap", "la", "ia0";
495 #address-cells = <1>;
496 #size-cells = <1>;
497 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
498
499 segment@0 { /* 0x4a000000 */
500 compatible = "simple-bus";
501 #address-cells = <1>;
502 #size-cells = <1>;
503 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
504 <0x00000800 0x00000800 0x000800>, /* ap 1 */
505 <0x00001000 0x00001000 0x000400>, /* ap 2 */
506 <0x00100000 0x00100000 0x008000>, /* ap 3 */
507 <0x00108000 0x00108000 0x001000>, /* ap 4 */
508 <0x00400000 0x00400000 0x002000>, /* ap 5 */
509 <0x00402000 0x00402000 0x001000>, /* ap 6 */
510 <0x00200000 0x00200000 0x080000>, /* ap 7 */
511 <0x00280000 0x00280000 0x001000>; /* ap 8 */
512
513 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
514 compatible = "ti,sysc-omap4-simple", "ti,sysc";
515 ti,hwmods = "cpgmac0";
516 reg = <0x101200 0x4>,
517 <0x101208 0x4>,
518 <0x101204 0x4>;
519 reg-names = "rev", "sysc", "syss";
520 ti,sysc-mask = <0>;
521 ti,sysc-midle = <SYSC_IDLE_FORCE>,
522 <SYSC_IDLE_NO>;
523 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
524 <SYSC_IDLE_NO>;
525 ti,syss-mask = <1>;
526 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
527 clock-names = "fck";
528 #address-cells = <1>;
529 #size-cells = <1>;
530 ranges = <0x0 0x100000 0x8000>;
531
532 mac: ethernet@0 {
533 compatible = "ti,am4372-cpsw","ti,cpsw";
534 reg = <0x0 0x800
535 0x1200 0x100>;
536 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
537 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
538 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
539 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
540 #address-cells = <1>;
541 #size-cells = <1>;
542 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
543 <&dpll_clksel_mac_clk>;
544 clock-names = "fck", "cpts", "50mclk";
545 assigned-clocks = <&dpll_clksel_mac_clk>;
546 assigned-clock-rates = <50000000>;
547 status = "disabled";
548 cpdma_channels = <8>;
549 ale_entries = <1024>;
550 bd_ram_size = <0x2000>;
551 mac_control = <0x20>;
552 slaves = <2>;
553 active_slave = <0>;
554 cpts_clock_mult = <0x80000000>;
555 cpts_clock_shift = <29>;
556 ranges = <0 0 0x8000>;
557 syscon = <&scm_conf>;
558
559 davinci_mdio: mdio@1000 {
560 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
561 reg = <0x1000 0x100>;
562 #address-cells = <1>;
563 #size-cells = <0>;
564 clocks = <&cpsw_125mhz_gclk>;
565 clock-names = "fck";
566 ti,hwmods = "davinci_mdio";
567 bus_freq = <1000000>;
568 status = "disabled";
569 };
570
571 cpsw_emac0: slave@200 {
572 /* Filled in by U-Boot */
573 mac-address = [ 00 00 00 00 00 00 ];
574 phys = <&phy_gmii_sel 1 0>;
575 };
576
577 cpsw_emac1: slave@300 {
578 /* Filled in by U-Boot */
579 mac-address = [ 00 00 00 00 00 00 ];
580 phys = <&phy_gmii_sel 2 0>;
581 };
582 };
583 };
584
585 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
586 compatible = "ti,sysc";
587 status = "disabled";
588 #address-cells = <1>;
589 #size-cells = <1>;
590 ranges = <0x0 0x200000 0x80000>;
591 };
592
593 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
594 compatible = "ti,sysc";
595 status = "disabled";
596 #address-cells = <1>;
597 #size-cells = <1>;
598 ranges = <0x0 0x400000 0x2000>;
599 };
600 };
601};
602
603&l4_per { /* 0x48000000 */
604 compatible = "ti,am4-l4-per", "simple-bus";
605 reg = <0x48000000 0x800>,
606 <0x48000800 0x800>,
607 <0x48001000 0x400>,
608 <0x48001400 0x400>,
609 <0x48001800 0x400>,
610 <0x48001c00 0x400>;
611 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
612 #address-cells = <1>;
613 #size-cells = <1>;
614 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
615 <0x00100000 0x48100000 0x100000>, /* segment 1 */
616 <0x00200000 0x48200000 0x100000>, /* segment 2 */
617 <0x00300000 0x48300000 0x100000>, /* segment 3 */
618 <0x46000000 0x46000000 0x400000>, /* l3 data port */
619 <0x46400000 0x46400000 0x400000>; /* l3 data port */
620
621 segment@0 { /* 0x48000000 */
622 compatible = "simple-bus";
623 #address-cells = <1>;
624 #size-cells = <1>;
625 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
626 <0x00000800 0x00000800 0x000800>, /* ap 1 */
627 <0x00001000 0x00001000 0x000400>, /* ap 2 */
628 <0x00001400 0x00001400 0x000400>, /* ap 3 */
629 <0x00001800 0x00001800 0x000400>, /* ap 4 */
630 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
631 <0x00008000 0x00008000 0x001000>, /* ap 6 */
632 <0x00009000 0x00009000 0x001000>, /* ap 7 */
633 <0x00022000 0x00022000 0x001000>, /* ap 8 */
634 <0x00023000 0x00023000 0x001000>, /* ap 9 */
635 <0x00024000 0x00024000 0x001000>, /* ap 10 */
636 <0x00025000 0x00025000 0x001000>, /* ap 11 */
637 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
638 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
639 <0x00038000 0x00038000 0x002000>, /* ap 14 */
640 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
641 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
642 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
643 <0x00040000 0x00040000 0x001000>, /* ap 18 */
644 <0x00041000 0x00041000 0x001000>, /* ap 19 */
645 <0x00042000 0x00042000 0x001000>, /* ap 20 */
646 <0x00043000 0x00043000 0x001000>, /* ap 21 */
647 <0x00044000 0x00044000 0x001000>, /* ap 22 */
648 <0x00045000 0x00045000 0x001000>, /* ap 23 */
649 <0x00046000 0x00046000 0x001000>, /* ap 24 */
650 <0x00047000 0x00047000 0x001000>, /* ap 25 */
651 <0x00048000 0x00048000 0x001000>, /* ap 26 */
652 <0x00049000 0x00049000 0x001000>, /* ap 27 */
653 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
654 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
655 <0x00060000 0x00060000 0x001000>, /* ap 30 */
656 <0x00061000 0x00061000 0x001000>, /* ap 31 */
657 <0x00080000 0x00080000 0x010000>, /* ap 32 */
658 <0x00090000 0x00090000 0x001000>, /* ap 33 */
659 <0x00030000 0x00030000 0x001000>, /* ap 65 */
660 <0x00031000 0x00031000 0x001000>, /* ap 66 */
661 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
662 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
663 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
664 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
665 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
666 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
667 <0x00034000 0x00034000 0x001000>, /* ap 80 */
668 <0x00035000 0x00035000 0x001000>, /* ap 81 */
669 <0x00036000 0x00036000 0x001000>, /* ap 84 */
670 <0x00037000 0x00037000 0x001000>, /* ap 85 */
671 <0x46000000 0x46000000 0x400000>, /* l3 data port */
672 <0x46400000 0x46400000 0x400000>; /* l3 data port */
673
674 target-module@8000 { /* 0x48008000, ap 6 10.0 */
675 compatible = "ti,sysc";
676 status = "disabled";
677 #address-cells = <1>;
678 #size-cells = <1>;
679 ranges = <0x0 0x8000 0x1000>;
680 };
681
682 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
683 compatible = "ti,sysc-omap2", "ti,sysc";
684 ti,hwmods = "uart2";
685 reg = <0x22050 0x4>,
686 <0x22054 0x4>,
687 <0x22058 0x4>;
688 reg-names = "rev", "sysc", "syss";
689 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
690 SYSC_OMAP2_SOFTRESET |
691 SYSC_OMAP2_AUTOIDLE)>;
692 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
693 <SYSC_IDLE_NO>,
694 <SYSC_IDLE_SMART>,
695 <SYSC_IDLE_SMART_WKUP>;
696 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
697 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
698 clock-names = "fck";
699 #address-cells = <1>;
700 #size-cells = <1>;
701 ranges = <0x0 0x22000 0x1000>;
702
703 uart1: serial@0 {
704 compatible = "ti,am4372-uart","ti,omap2-uart";
705 reg = <0x0 0x2000>;
706 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
707 status = "disabled";
708 };
709 };
710
711 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
712 compatible = "ti,sysc-omap2", "ti,sysc";
713 ti,hwmods = "uart3";
714 reg = <0x24050 0x4>,
715 <0x24054 0x4>,
716 <0x24058 0x4>;
717 reg-names = "rev", "sysc", "syss";
718 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
719 SYSC_OMAP2_SOFTRESET |
720 SYSC_OMAP2_AUTOIDLE)>;
721 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
722 <SYSC_IDLE_NO>,
723 <SYSC_IDLE_SMART>,
724 <SYSC_IDLE_SMART_WKUP>;
725 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
726 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
727 clock-names = "fck";
728 #address-cells = <1>;
729 #size-cells = <1>;
730 ranges = <0x0 0x24000 0x1000>;
731
732 uart2: serial@0 {
733 compatible = "ti,am4372-uart","ti,omap2-uart";
734 reg = <0x0 0x2000>;
735 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
736 status = "disabled";
737 };
738 };
739
740 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
741 compatible = "ti,sysc-omap2", "ti,sysc";
742 ti,hwmods = "i2c2";
743 reg = <0x2a000 0x8>,
744 <0x2a010 0x8>,
745 <0x2a090 0x8>;
746 reg-names = "rev", "sysc", "syss";
747 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
748 SYSC_OMAP2_ENAWAKEUP |
749 SYSC_OMAP2_SOFTRESET |
750 SYSC_OMAP2_AUTOIDLE)>;
751 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
752 <SYSC_IDLE_NO>,
753 <SYSC_IDLE_SMART>,
754 <SYSC_IDLE_SMART_WKUP>;
755 ti,syss-mask = <1>;
756 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
757 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
758 clock-names = "fck";
759 #address-cells = <1>;
760 #size-cells = <1>;
761 ranges = <0x0 0x2a000 0x1000>;
762
763 i2c1: i2c@0 {
764 compatible = "ti,am4372-i2c","ti,omap4-i2c";
765 reg = <0x0 0x1000>;
766 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
767 #address-cells = <1>;
768 #size-cells = <0>;
769 status = "disabled";
770 };
771 };
772
773 target-module@30000 { /* 0x48030000, ap 65 08.0 */
774 compatible = "ti,sysc-omap2", "ti,sysc";
775 ti,hwmods = "spi0";
776 reg = <0x30000 0x4>,
777 <0x30110 0x4>,
778 <0x30114 0x4>;
779 reg-names = "rev", "sysc", "syss";
780 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
781 SYSC_OMAP2_SOFTRESET |
782 SYSC_OMAP2_AUTOIDLE)>;
783 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
784 <SYSC_IDLE_NO>,
785 <SYSC_IDLE_SMART>;
786 ti,syss-mask = <1>;
787 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
788 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
789 clock-names = "fck";
790 #address-cells = <1>;
791 #size-cells = <1>;
792 ranges = <0x0 0x30000 0x1000>;
793
794 spi0: spi@0 {
795 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
796 reg = <0x0 0x400>;
797 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
798 #address-cells = <1>;
799 #size-cells = <0>;
800 status = "disabled";
801 };
802 };
803
804 target-module@34000 { /* 0x48034000, ap 80 56.0 */
805 compatible = "ti,sysc";
806 status = "disabled";
807 #address-cells = <1>;
808 #size-cells = <1>;
809 ranges = <0x0 0x34000 0x1000>;
810 };
811
812 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
813 compatible = "ti,sysc";
814 status = "disabled";
815 #address-cells = <1>;
816 #size-cells = <1>;
817 ranges = <0x0 0x36000 0x1000>;
818 };
819
820 target-module@38000 { /* 0x48038000, ap 14 04.0 */
821 compatible = "ti,sysc-omap4-simple", "ti,sysc";
822 ti,hwmods = "mcasp0";
823 reg = <0x38000 0x4>,
824 <0x38004 0x4>;
825 reg-names = "rev", "sysc";
826 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
827 <SYSC_IDLE_NO>,
828 <SYSC_IDLE_SMART>;
829 /* Domains (P, C): per_pwrdm, l3s_clkdm */
830 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
831 clock-names = "fck";
832 #address-cells = <1>;
833 #size-cells = <1>;
834 ranges = <0x0 0x38000 0x2000>,
835 <0x46000000 0x46000000 0x400000>;
836
837 mcasp0: mcasp@0 {
838 compatible = "ti,am33xx-mcasp-audio";
839 reg = <0x0 0x2000>,
840 <0x46000000 0x400000>;
841 reg-names = "mpu", "dat";
842 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
843 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
844 interrupt-names = "tx", "rx";
845 status = "disabled";
846 dmas = <&edma 8 2>,
847 <&edma 9 2>;
848 dma-names = "tx", "rx";
849 };
850 };
851
852 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
853 compatible = "ti,sysc-omap4-simple", "ti,sysc";
854 ti,hwmods = "mcasp1";
855 reg = <0x3c000 0x4>,
856 <0x3c004 0x4>;
857 reg-names = "rev", "sysc";
858 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
859 <SYSC_IDLE_NO>,
860 <SYSC_IDLE_SMART>;
861 /* Domains (P, C): per_pwrdm, l3s_clkdm */
862 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
863 clock-names = "fck";
864 #address-cells = <1>;
865 #size-cells = <1>;
866 ranges = <0x0 0x3c000 0x2000>,
867 <0x46400000 0x46400000 0x400000>;
868
869 mcasp1: mcasp@0 {
870 compatible = "ti,am33xx-mcasp-audio";
871 reg = <0x0 0x2000>,
872 <0x46400000 0x400000>;
873 reg-names = "mpu", "dat";
874 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
876 interrupt-names = "tx", "rx";
877 status = "disabled";
878 dmas = <&edma 10 2>,
879 <&edma 11 2>;
880 dma-names = "tx", "rx";
881 };
882 };
883
884 target-module@40000 { /* 0x48040000, ap 18 1e.0 */
885 compatible = "ti,sysc-omap4-timer", "ti,sysc";
886 ti,hwmods = "timer2";
887 reg = <0x40000 0x4>,
888 <0x40010 0x4>,
889 <0x40014 0x4>;
890 reg-names = "rev", "sysc", "syss";
891 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
892 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
893 <SYSC_IDLE_NO>,
894 <SYSC_IDLE_SMART>,
895 <SYSC_IDLE_SMART_WKUP>;
896 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
897 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
898 clock-names = "fck";
899 #address-cells = <1>;
900 #size-cells = <1>;
901 ranges = <0x0 0x40000 0x1000>;
902
903 timer2: timer@0 {
904 compatible = "ti,am4372-timer","ti,am335x-timer";
905 reg = <0x0 0x400>;
906 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&timer2_fck>;
908 clock-names = "fck";
909 };
910 };
911
912 target-module@42000 { /* 0x48042000, ap 20 24.0 */
913 compatible = "ti,sysc-omap4-timer", "ti,sysc";
914 ti,hwmods = "timer3";
915 reg = <0x42000 0x4>,
916 <0x42010 0x4>,
917 <0x42014 0x4>;
918 reg-names = "rev", "sysc", "syss";
919 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
920 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
921 <SYSC_IDLE_NO>,
922 <SYSC_IDLE_SMART>,
923 <SYSC_IDLE_SMART_WKUP>;
924 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
925 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
926 clock-names = "fck";
927 #address-cells = <1>;
928 #size-cells = <1>;
929 ranges = <0x0 0x42000 0x1000>;
930
931 timer3: timer@0 {
932 compatible = "ti,am4372-timer","ti,am335x-timer";
933 reg = <0x0 0x400>;
934 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
935 status = "disabled";
936 };
937 };
938
939 target-module@44000 { /* 0x48044000, ap 22 26.0 */
940 compatible = "ti,sysc-omap4-timer", "ti,sysc";
941 ti,hwmods = "timer4";
942 reg = <0x44000 0x4>,
943 <0x44010 0x4>,
944 <0x44014 0x4>;
945 reg-names = "rev", "sysc", "syss";
946 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
947 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
948 <SYSC_IDLE_NO>,
949 <SYSC_IDLE_SMART>,
950 <SYSC_IDLE_SMART_WKUP>;
951 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
952 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
953 clock-names = "fck";
954 #address-cells = <1>;
955 #size-cells = <1>;
956 ranges = <0x0 0x44000 0x1000>;
957
958 timer4: timer@0 {
959 compatible = "ti,am4372-timer","ti,am335x-timer";
960 reg = <0x0 0x400>;
961 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
962 ti,timer-pwm;
963 status = "disabled";
964 };
965 };
966
967 target-module@46000 { /* 0x48046000, ap 24 28.0 */
968 compatible = "ti,sysc-omap4-timer", "ti,sysc";
969 ti,hwmods = "timer5";
970 reg = <0x46000 0x4>,
971 <0x46010 0x4>,
972 <0x46014 0x4>;
973 reg-names = "rev", "sysc", "syss";
974 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
975 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
976 <SYSC_IDLE_NO>,
977 <SYSC_IDLE_SMART>,
978 <SYSC_IDLE_SMART_WKUP>;
979 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
980 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
981 clock-names = "fck";
982 #address-cells = <1>;
983 #size-cells = <1>;
984 ranges = <0x0 0x46000 0x1000>;
985
986 timer5: timer@0 {
987 compatible = "ti,am4372-timer","ti,am335x-timer";
988 reg = <0x0 0x400>;
989 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
990 ti,timer-pwm;
991 status = "disabled";
992 };
993 };
994
995 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
996 compatible = "ti,sysc-omap4-timer", "ti,sysc";
997 ti,hwmods = "timer6";
998 reg = <0x48000 0x4>,
999 <0x48010 0x4>,
1000 <0x48014 0x4>;
1001 reg-names = "rev", "sysc", "syss";
1002 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1003 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1004 <SYSC_IDLE_NO>,
1005 <SYSC_IDLE_SMART>,
1006 <SYSC_IDLE_SMART_WKUP>;
1007 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1008 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1009 clock-names = "fck";
1010 #address-cells = <1>;
1011 #size-cells = <1>;
1012 ranges = <0x0 0x48000 0x1000>;
1013
1014 timer6: timer@0 {
1015 compatible = "ti,am4372-timer","ti,am335x-timer";
1016 reg = <0x0 0x400>;
1017 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1018 ti,timer-pwm;
1019 status = "disabled";
1020 };
1021 };
1022
1023 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1024 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1025 ti,hwmods = "timer7";
1026 reg = <0x4a000 0x4>,
1027 <0x4a010 0x4>,
1028 <0x4a014 0x4>;
1029 reg-names = "rev", "sysc", "syss";
1030 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1031 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1032 <SYSC_IDLE_NO>,
1033 <SYSC_IDLE_SMART>,
1034 <SYSC_IDLE_SMART_WKUP>;
1035 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1036 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1037 clock-names = "fck";
1038 #address-cells = <1>;
1039 #size-cells = <1>;
1040 ranges = <0x0 0x4a000 0x1000>;
1041
1042 timer7: timer@0 {
1043 compatible = "ti,am4372-timer","ti,am335x-timer";
1044 reg = <0x0 0x400>;
1045 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1046 ti,timer-pwm;
1047 status = "disabled";
1048 };
1049 };
1050
1051 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1052 compatible = "ti,sysc-omap2", "ti,sysc";
1053 ti,hwmods = "gpio2";
1054 reg = <0x4c000 0x4>,
1055 <0x4c010 0x4>,
1056 <0x4c114 0x4>;
1057 reg-names = "rev", "sysc", "syss";
1058 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1059 SYSC_OMAP2_SOFTRESET |
1060 SYSC_OMAP2_AUTOIDLE)>;
1061 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1062 <SYSC_IDLE_NO>,
1063 <SYSC_IDLE_SMART>,
1064 <SYSC_IDLE_SMART_WKUP>;
1065 ti,syss-mask = <1>;
1066 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1067 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1068 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1069 clock-names = "fck", "dbclk";
1070 #address-cells = <1>;
1071 #size-cells = <1>;
1072 ranges = <0x0 0x4c000 0x1000>;
1073
1074 gpio1: gpio@0 {
1075 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1076 reg = <0x0 0x1000>;
1077 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1078 gpio-controller;
1079 #gpio-cells = <2>;
1080 interrupt-controller;
1081 #interrupt-cells = <2>;
1082 status = "disabled";
1083 };
1084 };
1085
1086 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1087 compatible = "ti,sysc-omap2", "ti,sysc";
1088 ti,hwmods = "mmc1";
1089 reg = <0x602fc 0x4>,
1090 <0x60110 0x4>,
1091 <0x60114 0x4>;
1092 reg-names = "rev", "sysc", "syss";
1093 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1094 SYSC_OMAP2_ENAWAKEUP |
1095 SYSC_OMAP2_SOFTRESET |
1096 SYSC_OMAP2_AUTOIDLE)>;
1097 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1098 <SYSC_IDLE_NO>,
1099 <SYSC_IDLE_SMART>;
1100 ti,syss-mask = <1>;
1101 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1102 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1103 clock-names = "fck";
1104 #address-cells = <1>;
1105 #size-cells = <1>;
1106 ranges = <0x0 0x60000 0x1000>;
1107
1108 mmc1: mmc@0 {
1109 compatible = "ti,omap4-hsmmc";
1110 reg = <0x0 0x1000>;
1111 ti,dual-volt;
1112 ti,needs-special-reset;
1113 dmas = <&edma 24 0>,
1114 <&edma 25 0>;
1115 dma-names = "tx", "rx";
1116 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1117 status = "disabled";
1118 };
1119 };
1120
1121 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1122 compatible = "ti,sysc-omap2", "ti,sysc";
1123 ti,hwmods = "elm";
1124 reg = <0x80000 0x4>,
1125 <0x80010 0x4>,
1126 <0x80014 0x4>;
1127 reg-names = "rev", "sysc", "syss";
1128 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1129 SYSC_OMAP2_SOFTRESET |
1130 SYSC_OMAP2_AUTOIDLE)>;
1131 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1132 <SYSC_IDLE_NO>,
1133 <SYSC_IDLE_SMART>;
1134 ti,syss-mask = <1>;
1135 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1136 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1137 clock-names = "fck";
1138 #address-cells = <1>;
1139 #size-cells = <1>;
1140 ranges = <0x0 0x80000 0x10000>;
1141
1142 elm: elm@0 {
1143 compatible = "ti,am3352-elm";
1144 reg = <0x0 0x2000>;
1145 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1146 clocks = <&l4ls_gclk>;
1147 clock-names = "fck";
1148 status = "disabled";
1149 };
1150 };
1151
1152 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1153 compatible = "ti,sysc-omap4", "ti,sysc";
1154 ti,hwmods = "mailbox";
1155 reg = <0xc8000 0x4>,
1156 <0xc8010 0x4>;
1157 reg-names = "rev", "sysc";
1158 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1159 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1160 <SYSC_IDLE_NO>,
1161 <SYSC_IDLE_SMART>;
1162 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1163 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1164 clock-names = "fck";
1165 #address-cells = <1>;
1166 #size-cells = <1>;
1167 ranges = <0x0 0xc8000 0x1000>;
1168
1169 mailbox: mailbox@0 {
1170 compatible = "ti,omap4-mailbox";
1171 reg = <0x0 0x200>;
1172 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1173 #mbox-cells = <1>;
1174 ti,mbox-num-users = <4>;
1175 ti,mbox-num-fifos = <8>;
1176 mbox_wkupm3: wkup_m3 {
1177 ti,mbox-send-noirq;
1178 ti,mbox-tx = <0 0 0>;
1179 ti,mbox-rx = <0 0 3>;
1180 };
1181 };
1182 };
1183
1184 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1185 compatible = "ti,sysc-omap2", "ti,sysc";
1186 ti,hwmods = "spinlock";
1187 reg = <0xca000 0x4>,
1188 <0xca010 0x4>,
1189 <0xca014 0x4>;
1190 reg-names = "rev", "sysc", "syss";
1191 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1192 SYSC_OMAP2_ENAWAKEUP |
1193 SYSC_OMAP2_SOFTRESET |
1194 SYSC_OMAP2_AUTOIDLE)>;
1195 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1196 <SYSC_IDLE_NO>,
1197 <SYSC_IDLE_SMART>;
1198 ti,syss-mask = <1>;
1199 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1200 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1201 clock-names = "fck";
1202 #address-cells = <1>;
1203 #size-cells = <1>;
1204 ranges = <0x0 0xca000 0x1000>;
1205
1206 hwspinlock: spinlock@0 {
1207 compatible = "ti,omap4-hwspinlock";
1208 reg = <0x0 0x1000>;
1209 #hwlock-cells = <1>;
1210 };
1211 };
1212 };
1213
1214 segment@100000 { /* 0x48100000 */
1215 compatible = "simple-bus";
1216 #address-cells = <1>;
1217 #size-cells = <1>;
1218 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1219 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1220 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1221 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1222 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1223 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1224 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1225 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1226 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1227 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1228 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1229 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1230 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1231 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1232 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1233 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1234 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1235 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1236 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1237 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1238 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1239 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1240 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1241 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1242 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1243 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1244 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1245 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1246 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1247 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1248
1249 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1250 compatible = "ti,sysc";
1251 status = "disabled";
1252 #address-cells = <1>;
1253 #size-cells = <1>;
1254 ranges = <0x0 0x8c000 0x1000>;
1255 };
1256
1257 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1258 compatible = "ti,sysc";
1259 status = "disabled";
1260 #address-cells = <1>;
1261 #size-cells = <1>;
1262 ranges = <0x0 0x8e000 0x1000>;
1263 };
1264
1265 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1266 compatible = "ti,sysc-omap2", "ti,sysc";
1267 ti,hwmods = "i2c3";
1268 reg = <0x9c000 0x8>,
1269 <0x9c010 0x8>,
1270 <0x9c090 0x8>;
1271 reg-names = "rev", "sysc", "syss";
1272 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1273 SYSC_OMAP2_ENAWAKEUP |
1274 SYSC_OMAP2_SOFTRESET |
1275 SYSC_OMAP2_AUTOIDLE)>;
1276 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1277 <SYSC_IDLE_NO>,
1278 <SYSC_IDLE_SMART>,
1279 <SYSC_IDLE_SMART_WKUP>;
1280 ti,syss-mask = <1>;
1281 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1282 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1283 clock-names = "fck";
1284 #address-cells = <1>;
1285 #size-cells = <1>;
1286 ranges = <0x0 0x9c000 0x1000>;
1287
1288 i2c2: i2c@0 {
1289 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1290 reg = <0x0 0x1000>;
1291 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1294 status = "disabled";
1295 };
1296 };
1297
1298 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1299 compatible = "ti,sysc-omap2", "ti,sysc";
1300 ti,hwmods = "spi1";
1301 reg = <0xa0000 0x4>,
1302 <0xa0110 0x4>,
1303 <0xa0114 0x4>;
1304 reg-names = "rev", "sysc", "syss";
1305 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1306 SYSC_OMAP2_SOFTRESET |
1307 SYSC_OMAP2_AUTOIDLE)>;
1308 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1309 <SYSC_IDLE_NO>,
1310 <SYSC_IDLE_SMART>;
1311 ti,syss-mask = <1>;
1312 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1313 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1314 clock-names = "fck";
1315 #address-cells = <1>;
1316 #size-cells = <1>;
1317 ranges = <0x0 0xa0000 0x1000>;
1318
1319 spi1: spi@0 {
1320 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1321 reg = <0x0 0x400>;
1322 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1323 #address-cells = <1>;
1324 #size-cells = <0>;
1325 status = "disabled";
1326 };
1327 };
1328
1329 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1330 compatible = "ti,sysc-omap2", "ti,sysc";
1331 ti,hwmods = "spi2";
1332 reg = <0xa2000 0x4>,
1333 <0xa2110 0x4>,
1334 <0xa2114 0x4>;
1335 reg-names = "rev", "sysc", "syss";
1336 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1337 SYSC_OMAP2_SOFTRESET |
1338 SYSC_OMAP2_AUTOIDLE)>;
1339 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1340 <SYSC_IDLE_NO>,
1341 <SYSC_IDLE_SMART>;
1342 ti,syss-mask = <1>;
1343 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1344 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1345 clock-names = "fck";
1346 #address-cells = <1>;
1347 #size-cells = <1>;
1348 ranges = <0x0 0xa2000 0x1000>;
1349
1350 spi2: spi@0 {
1351 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1352 reg = <0x0 0x400>;
1353 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1356 status = "disabled";
1357 };
1358 };
1359
1360 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1361 compatible = "ti,sysc-omap2", "ti,sysc";
1362 ti,hwmods = "spi3";
1363 reg = <0xa4000 0x4>,
1364 <0xa4110 0x4>,
1365 <0xa4114 0x4>;
1366 reg-names = "rev", "sysc", "syss";
1367 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1368 SYSC_OMAP2_SOFTRESET |
1369 SYSC_OMAP2_AUTOIDLE)>;
1370 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1371 <SYSC_IDLE_NO>,
1372 <SYSC_IDLE_SMART>;
1373 ti,syss-mask = <1>;
1374 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1375 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1376 clock-names = "fck";
1377 #address-cells = <1>;
1378 #size-cells = <1>;
1379 ranges = <0x0 0xa4000 0x1000>;
1380
1381 spi3: spi@0 {
1382 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1383 reg = <0x0 0x400>;
1384 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1385 #address-cells = <1>;
1386 #size-cells = <0>;
1387 status = "disabled";
1388 };
1389 };
1390
1391 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1392 compatible = "ti,sysc-omap2", "ti,sysc";
1393 ti,hwmods = "uart4";
1394 reg = <0xa6050 0x4>,
1395 <0xa6054 0x4>,
1396 <0xa6058 0x4>;
1397 reg-names = "rev", "sysc", "syss";
1398 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1399 SYSC_OMAP2_SOFTRESET |
1400 SYSC_OMAP2_AUTOIDLE)>;
1401 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1402 <SYSC_IDLE_NO>,
1403 <SYSC_IDLE_SMART>,
1404 <SYSC_IDLE_SMART_WKUP>;
1405 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1406 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1407 clock-names = "fck";
1408 #address-cells = <1>;
1409 #size-cells = <1>;
1410 ranges = <0x0 0xa6000 0x1000>;
1411
1412 uart3: serial@0 {
1413 compatible = "ti,am4372-uart","ti,omap2-uart";
1414 reg = <0x0 0x2000>;
1415 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1416 status = "disabled";
1417 };
1418 };
1419
1420 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1421 compatible = "ti,sysc-omap2", "ti,sysc";
1422 ti,hwmods = "uart5";
1423 reg = <0xa8050 0x4>,
1424 <0xa8054 0x4>,
1425 <0xa8058 0x4>;
1426 reg-names = "rev", "sysc", "syss";
1427 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1428 SYSC_OMAP2_SOFTRESET |
1429 SYSC_OMAP2_AUTOIDLE)>;
1430 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1431 <SYSC_IDLE_NO>,
1432 <SYSC_IDLE_SMART>,
1433 <SYSC_IDLE_SMART_WKUP>;
1434 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1435 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1436 clock-names = "fck";
1437 #address-cells = <1>;
1438 #size-cells = <1>;
1439 ranges = <0x0 0xa8000 0x1000>;
1440
1441 uart4: serial@0 {
1442 compatible = "ti,am4372-uart","ti,omap2-uart";
1443 reg = <0x0 0x2000>;
1444 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1445 status = "disabled";
1446 };
1447 };
1448
1449 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1450 compatible = "ti,sysc-omap2", "ti,sysc";
1451 ti,hwmods = "uart6";
1452 reg = <0xaa050 0x4>,
1453 <0xaa054 0x4>,
1454 <0xaa058 0x4>;
1455 reg-names = "rev", "sysc", "syss";
1456 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1457 SYSC_OMAP2_SOFTRESET |
1458 SYSC_OMAP2_AUTOIDLE)>;
1459 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1460 <SYSC_IDLE_NO>,
1461 <SYSC_IDLE_SMART>,
1462 <SYSC_IDLE_SMART_WKUP>;
1463 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1464 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1465 clock-names = "fck";
1466 #address-cells = <1>;
1467 #size-cells = <1>;
1468 ranges = <0x0 0xaa000 0x1000>;
1469
1470 uart5: serial@0 {
1471 compatible = "ti,am4372-uart","ti,omap2-uart";
1472 reg = <0x0 0x2000>;
1473 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1474 status = "disabled";
1475 };
1476 };
1477
1478 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1479 compatible = "ti,sysc-omap2", "ti,sysc";
1480 ti,hwmods = "gpio3";
1481 reg = <0xac000 0x4>,
1482 <0xac010 0x4>,
1483 <0xac114 0x4>;
1484 reg-names = "rev", "sysc", "syss";
1485 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1486 SYSC_OMAP2_SOFTRESET |
1487 SYSC_OMAP2_AUTOIDLE)>;
1488 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1489 <SYSC_IDLE_NO>,
1490 <SYSC_IDLE_SMART>,
1491 <SYSC_IDLE_SMART_WKUP>;
1492 ti,syss-mask = <1>;
1493 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1494 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1495 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1496 clock-names = "fck", "dbclk";
1497 #address-cells = <1>;
1498 #size-cells = <1>;
1499 ranges = <0x0 0xac000 0x1000>;
1500
1501 gpio2: gpio@0 {
1502 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1503 reg = <0x0 0x1000>;
1504 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1505 gpio-controller;
1506 #gpio-cells = <2>;
1507 interrupt-controller;
1508 #interrupt-cells = <2>;
1509 status = "disabled";
1510 };
1511 };
1512
1513 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1514 compatible = "ti,sysc-omap2", "ti,sysc";
1515 ti,hwmods = "gpio4";
1516 reg = <0xae000 0x4>,
1517 <0xae010 0x4>,
1518 <0xae114 0x4>;
1519 reg-names = "rev", "sysc", "syss";
1520 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1521 SYSC_OMAP2_SOFTRESET |
1522 SYSC_OMAP2_AUTOIDLE)>;
1523 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1524 <SYSC_IDLE_NO>,
1525 <SYSC_IDLE_SMART>,
1526 <SYSC_IDLE_SMART_WKUP>;
1527 ti,syss-mask = <1>;
1528 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1529 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1530 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1531 clock-names = "fck", "dbclk";
1532 #address-cells = <1>;
1533 #size-cells = <1>;
1534 ranges = <0x0 0xae000 0x1000>;
1535
1536 gpio3: gpio@0 {
1537 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1538 reg = <0x0 0x1000>;
1539 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1540 gpio-controller;
1541 #gpio-cells = <2>;
1542 interrupt-controller;
1543 #interrupt-cells = <2>;
1544 status = "disabled";
1545 };
1546 };
1547
1548 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1549 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1550 ti,hwmods = "timer8";
1551 reg = <0xc1000 0x4>,
1552 <0xc1010 0x4>,
1553 <0xc1014 0x4>;
1554 reg-names = "rev", "sysc", "syss";
1555 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1556 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1557 <SYSC_IDLE_NO>,
1558 <SYSC_IDLE_SMART>,
1559 <SYSC_IDLE_SMART_WKUP>;
1560 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1561 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1562 clock-names = "fck";
1563 #address-cells = <1>;
1564 #size-cells = <1>;
1565 ranges = <0x0 0xc1000 0x1000>;
1566
1567 timer8: timer@0 {
1568 compatible = "ti,am4372-timer","ti,am335x-timer";
1569 reg = <0x0 0x400>;
1570 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1571 status = "disabled";
1572 };
1573 };
1574
1575 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1576 compatible = "ti,sysc-omap4", "ti,sysc";
1577 ti,hwmods = "d_can0";
1578 reg = <0xcc000 0x4>;
1579 reg-names = "rev";
1580 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1581 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
1582 clock-names = "fck";
1583 #address-cells = <1>;
1584 #size-cells = <1>;
1585 ranges = <0x0 0xcc000 0x2000>;
1586
1587 dcan0: can@0 {
1588 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1589 reg = <0x0 0x2000>;
1590 syscon-raminit = <&scm_conf 0x644 0>;
1591 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1592 status = "disabled";
1593 };
1594 };
1595
1596 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1597 compatible = "ti,sysc-omap4", "ti,sysc";
1598 ti,hwmods = "d_can1";
1599 reg = <0xd0000 0x4>;
1600 reg-names = "rev";
1601 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1602 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
1603 clock-names = "fck";
1604 #address-cells = <1>;
1605 #size-cells = <1>;
1606 ranges = <0x0 0xd0000 0x2000>;
1607
1608 dcan1: can@0 {
1609 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1610 reg = <0x0 0x2000>;
1611 syscon-raminit = <&scm_conf 0x644 1>;
1612 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1613 status = "disabled";
1614 };
1615 };
1616
1617 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1618 compatible = "ti,sysc-omap2", "ti,sysc";
1619 ti,hwmods = "mmc2";
1620 reg = <0xd82fc 0x4>,
1621 <0xd8110 0x4>,
1622 <0xd8114 0x4>;
1623 reg-names = "rev", "sysc", "syss";
1624 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1625 SYSC_OMAP2_ENAWAKEUP |
1626 SYSC_OMAP2_SOFTRESET |
1627 SYSC_OMAP2_AUTOIDLE)>;
1628 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1629 <SYSC_IDLE_NO>,
1630 <SYSC_IDLE_SMART>;
1631 ti,syss-mask = <1>;
1632 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1633 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1634 clock-names = "fck";
1635 #address-cells = <1>;
1636 #size-cells = <1>;
1637 ranges = <0x0 0xd8000 0x1000>;
1638
1639 mmc2: mmc@0 {
1640 compatible = "ti,omap4-hsmmc";
1641 reg = <0x0 0x1000>;
1642 ti,needs-special-reset;
1643 dmas = <&edma 2 0>,
1644 <&edma 3 0>;
1645 dma-names = "tx", "rx";
1646 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1647 status = "disabled";
1648 };
1649 };
1650 };
1651
1652 segment@200000 { /* 0x48200000 */
1653 compatible = "simple-bus";
1654 #address-cells = <1>;
1655 #size-cells = <1>;
1656 };
1657
1658 segment@300000 { /* 0x48300000 */
1659 compatible = "simple-bus";
1660 #address-cells = <1>;
1661 #size-cells = <1>;
1662 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1663 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1664 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1665 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1666 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1667 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1668 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1669 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1670 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1671 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1672 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1673 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1674 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1675 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1676 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1677 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1678 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1679 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1680 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1681 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1682 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1683 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1684 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1685 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1686 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1687 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1688 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1689 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1690 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1691 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1692 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1693 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1694 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1695 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1696 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1697 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1698 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1699 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1700 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1701 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1702 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1703 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1704 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1705 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1706 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1707 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1708 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1709 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1710 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1711 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1712 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1713 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1714 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1715 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1716
1717 target-module@0 { /* 0x48300000, ap 56 40.0 */
1718 compatible = "ti,sysc-omap4", "ti,sysc";
1719 ti,hwmods = "epwmss0";
1720 reg = <0x0 0x4>,
1721 <0x4 0x4>;
1722 reg-names = "rev", "sysc";
1723 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1724 <SYSC_IDLE_NO>,
1725 <SYSC_IDLE_SMART>,
1726 <SYSC_IDLE_SMART_WKUP>;
1727 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1728 <SYSC_IDLE_NO>,
1729 <SYSC_IDLE_SMART>,
1730 <SYSC_IDLE_SMART_WKUP>;
1731 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1732 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1733 clock-names = "fck";
1734 #address-cells = <1>;
1735 #size-cells = <1>;
1736 ranges = <0x0 0x0 0x1000>;
1737
1738 epwmss0: epwmss@0 {
1739 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1740 reg = <0x0 0x10>;
1741 #address-cells = <1>;
1742 #size-cells = <1>;
1743 ranges = <0 0 0x1000>;
1744 status = "disabled";
1745
1746 ecap0: ecap@100 {
1747 compatible = "ti,am4372-ecap",
1748 "ti,am3352-ecap",
1749 "ti,am33xx-ecap";
1750 #pwm-cells = <3>;
1751 reg = <0x100 0x80>;
1752 clocks = <&l4ls_gclk>;
1753 clock-names = "fck";
1754 status = "disabled";
1755 };
1756
1757 ehrpwm0: pwm@200 {
1758 compatible = "ti,am4372-ehrpwm",
1759 "ti,am3352-ehrpwm",
1760 "ti,am33xx-ehrpwm";
1761 #pwm-cells = <3>;
1762 reg = <0x200 0x80>;
1763 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1764 clock-names = "tbclk", "fck";
1765 status = "disabled";
1766 };
1767 };
1768 };
1769
1770 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1771 compatible = "ti,sysc-omap4", "ti,sysc";
1772 ti,hwmods = "epwmss1";
1773 reg = <0x2000 0x4>,
1774 <0x2004 0x4>;
1775 reg-names = "rev", "sysc";
1776 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1777 <SYSC_IDLE_NO>,
1778 <SYSC_IDLE_SMART>,
1779 <SYSC_IDLE_SMART_WKUP>;
1780 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1781 <SYSC_IDLE_NO>,
1782 <SYSC_IDLE_SMART>,
1783 <SYSC_IDLE_SMART_WKUP>;
1784 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1785 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1786 clock-names = "fck";
1787 #address-cells = <1>;
1788 #size-cells = <1>;
1789 ranges = <0x0 0x2000 0x1000>;
1790
1791 epwmss1: epwmss@0 {
1792 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1793 reg = <0x0 0x10>;
1794 #address-cells = <1>;
1795 #size-cells = <1>;
1796 ranges = <0 0 0x1000>;
1797 status = "disabled";
1798
1799 ecap1: ecap@100 {
1800 compatible = "ti,am4372-ecap",
1801 "ti,am3352-ecap",
1802 "ti,am33xx-ecap";
1803 #pwm-cells = <3>;
1804 reg = <0x100 0x80>;
1805 clocks = <&l4ls_gclk>;
1806 clock-names = "fck";
1807 status = "disabled";
1808 };
1809
1810 ehrpwm1: pwm@200 {
1811 compatible = "ti,am4372-ehrpwm",
1812 "ti,am3352-ehrpwm",
1813 "ti,am33xx-ehrpwm";
1814 #pwm-cells = <3>;
1815 reg = <0x200 0x80>;
1816 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1817 clock-names = "tbclk", "fck";
1818 status = "disabled";
1819 };
1820 };
1821 };
1822
1823 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1824 compatible = "ti,sysc-omap4", "ti,sysc";
1825 ti,hwmods = "epwmss2";
1826 reg = <0x4000 0x4>,
1827 <0x4004 0x4>;
1828 reg-names = "rev", "sysc";
1829 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1830 <SYSC_IDLE_NO>,
1831 <SYSC_IDLE_SMART>,
1832 <SYSC_IDLE_SMART_WKUP>;
1833 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1834 <SYSC_IDLE_NO>,
1835 <SYSC_IDLE_SMART>,
1836 <SYSC_IDLE_SMART_WKUP>;
1837 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1838 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1839 clock-names = "fck";
1840 #address-cells = <1>;
1841 #size-cells = <1>;
1842 ranges = <0x0 0x4000 0x1000>;
1843
1844 epwmss2: epwmss@0 {
1845 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1846 reg = <0x0 0x10>;
1847 #address-cells = <1>;
1848 #size-cells = <1>;
1849 ranges = <0 0 0x1000>;
1850 status = "disabled";
1851
1852 ecap2: ecap@100 {
1853 compatible = "ti,am4372-ecap",
1854 "ti,am3352-ecap",
1855 "ti,am33xx-ecap";
1856 #pwm-cells = <3>;
1857 reg = <0x100 0x80>;
1858 clocks = <&l4ls_gclk>;
1859 clock-names = "fck";
1860 status = "disabled";
1861 };
1862
1863 ehrpwm2: pwm@200 {
1864 compatible = "ti,am4372-ehrpwm",
1865 "ti,am3352-ehrpwm",
1866 "ti,am33xx-ehrpwm";
1867 #pwm-cells = <3>;
1868 reg = <0x200 0x80>;
1869 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1870 clock-names = "tbclk", "fck";
1871 status = "disabled";
1872 };
1873 };
1874 };
1875
1876 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1877 compatible = "ti,sysc-omap4", "ti,sysc";
1878 ti,hwmods = "epwmss3";
1879 reg = <0x6000 0x4>,
1880 <0x6004 0x4>;
1881 reg-names = "rev", "sysc";
1882 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1883 <SYSC_IDLE_NO>,
1884 <SYSC_IDLE_SMART>,
1885 <SYSC_IDLE_SMART_WKUP>;
1886 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1887 <SYSC_IDLE_NO>,
1888 <SYSC_IDLE_SMART>,
1889 <SYSC_IDLE_SMART_WKUP>;
1890 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1891 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1892 clock-names = "fck";
1893 #address-cells = <1>;
1894 #size-cells = <1>;
1895 ranges = <0x0 0x6000 0x1000>;
1896
1897 epwmss3: epwmss@0 {
1898 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1899 reg = <0x0 0x10>;
1900 #address-cells = <1>;
1901 #size-cells = <1>;
1902 ranges = <0 0 0x1000>;
1903 status = "disabled";
1904
1905 ehrpwm3: pwm@200 {
1906 compatible = "ti,am4372-ehrpwm",
1907 "ti,am3352-ehrpwm",
1908 "ti,am33xx-ehrpwm";
1909 #pwm-cells = <3>;
1910 reg = <0x200 0x80>;
1911 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1912 clock-names = "tbclk", "fck";
1913 status = "disabled";
1914 };
1915 };
1916 };
1917
1918 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1919 compatible = "ti,sysc-omap4", "ti,sysc";
1920 ti,hwmods = "epwmss4";
1921 reg = <0x8000 0x4>,
1922 <0x8004 0x4>;
1923 reg-names = "rev", "sysc";
1924 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1925 <SYSC_IDLE_NO>,
1926 <SYSC_IDLE_SMART>,
1927 <SYSC_IDLE_SMART_WKUP>;
1928 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1929 <SYSC_IDLE_NO>,
1930 <SYSC_IDLE_SMART>,
1931 <SYSC_IDLE_SMART_WKUP>;
1932 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1933 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1934 clock-names = "fck";
1935 #address-cells = <1>;
1936 #size-cells = <1>;
1937 ranges = <0x0 0x8000 0x1000>;
1938
1939 epwmss4: epwmss@0 {
1940 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1941 reg = <0x0 0x10>;
1942 #address-cells = <1>;
1943 #size-cells = <1>;
1944 ranges = <0 0 0x1000>;
1945 status = "disabled";
1946
1947 ehrpwm4: pwm@48308200 {
1948 compatible = "ti,am4372-ehrpwm",
1949 "ti,am3352-ehrpwm",
1950 "ti,am33xx-ehrpwm";
1951 #pwm-cells = <3>;
1952 reg = <0x200 0x80>;
1953 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1954 clock-names = "tbclk", "fck";
1955 status = "disabled";
1956 };
1957 };
1958 };
1959
1960 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1961 compatible = "ti,sysc-omap4", "ti,sysc";
1962 ti,hwmods = "epwmss5";
1963 reg = <0xa000 0x4>,
1964 <0xa004 0x4>;
1965 reg-names = "rev", "sysc";
1966 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1967 <SYSC_IDLE_NO>,
1968 <SYSC_IDLE_SMART>,
1969 <SYSC_IDLE_SMART_WKUP>;
1970 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1971 <SYSC_IDLE_NO>,
1972 <SYSC_IDLE_SMART>,
1973 <SYSC_IDLE_SMART_WKUP>;
1974 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1975 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1976 clock-names = "fck";
1977 #address-cells = <1>;
1978 #size-cells = <1>;
1979 ranges = <0x0 0xa000 0x1000>;
1980
1981 epwmss5: epwmss@0 {
1982 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1983 reg = <0x0 0x10>;
1984 #address-cells = <1>;
1985 #size-cells = <1>;
1986 ranges = <0 0 0x1000>;
1987 status = "disabled";
1988
1989 ehrpwm5: pwm@200 {
1990 compatible = "ti,am4372-ehrpwm",
1991 "ti,am3352-ehrpwm",
1992 "ti,am33xx-ehrpwm";
1993 #pwm-cells = <3>;
1994 reg = <0x200 0x80>;
1995 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
1996 clock-names = "tbclk", "fck";
1997 status = "disabled";
1998 };
1999 };
2000 };
2001
2002 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
2003 compatible = "ti,sysc-omap2", "ti,sysc";
2004 ti,hwmods = "rng";
2005 reg = <0x11fe0 0x4>,
2006 <0x11fe4 0x4>;
2007 reg-names = "rev", "sysc";
2008 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2009 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2010 <SYSC_IDLE_NO>;
2011 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2012 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
2013 clock-names = "fck";
2014 #address-cells = <1>;
2015 #size-cells = <1>;
2016 ranges = <0x0 0x10000 0x2000>;
2017
2018 rng: rng@0 {
2019 compatible = "ti,omap4-rng";
2020 reg = <0x0 0x2000>;
2021 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2022 };
2023 };
2024
2025 target-module@13000 { /* 0x48313000, ap 90 50.0 */
2026 compatible = "ti,sysc";
2027 status = "disabled";
2028 #address-cells = <1>;
2029 #size-cells = <1>;
2030 ranges = <0x0 0x13000 0x1000>;
2031 };
2032
2033 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
2034 compatible = "ti,sysc";
2035 status = "disabled";
2036 #address-cells = <1>;
2037 #size-cells = <1>;
2038 ranges = <0x0 0x18000 0x4000>;
2039 };
2040
2041 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2042 compatible = "ti,sysc-omap2", "ti,sysc";
2043 ti,hwmods = "gpio5";
2044 reg = <0x20000 0x4>,
2045 <0x20010 0x4>,
2046 <0x20114 0x4>;
2047 reg-names = "rev", "sysc", "syss";
2048 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2049 SYSC_OMAP2_SOFTRESET |
2050 SYSC_OMAP2_AUTOIDLE)>;
2051 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2052 <SYSC_IDLE_NO>,
2053 <SYSC_IDLE_SMART>,
2054 <SYSC_IDLE_SMART_WKUP>;
2055 ti,syss-mask = <1>;
2056 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2057 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2058 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2059 clock-names = "fck", "dbclk";
2060 #address-cells = <1>;
2061 #size-cells = <1>;
2062 ranges = <0x0 0x20000 0x1000>;
2063
2064 gpio4: gpio@0 {
2065 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2066 reg = <0x0 0x1000>;
2067 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2068 gpio-controller;
2069 #gpio-cells = <2>;
2070 interrupt-controller;
2071 #interrupt-cells = <2>;
2072 status = "disabled";
2073 };
2074 };
2075
2076 target-module@22000 { /* 0x48322000, ap 116 64.0 */
2077 compatible = "ti,sysc-omap2", "ti,sysc";
2078 ti,hwmods = "gpio6";
2079 reg = <0x22000 0x4>,
2080 <0x22010 0x4>,
2081 <0x22114 0x4>;
2082 reg-names = "rev", "sysc", "syss";
2083 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2084 SYSC_OMAP2_SOFTRESET |
2085 SYSC_OMAP2_AUTOIDLE)>;
2086 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2087 <SYSC_IDLE_NO>,
2088 <SYSC_IDLE_SMART>,
2089 <SYSC_IDLE_SMART_WKUP>;
2090 ti,syss-mask = <1>;
2091 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2092 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2093 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2094 clock-names = "fck", "dbclk";
2095 #address-cells = <1>;
2096 #size-cells = <1>;
2097 ranges = <0x0 0x22000 0x1000>;
2098
2099 gpio5: gpio@0 {
2100 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2101 reg = <0x0 0x1000>;
2102 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2103 gpio-controller;
2104 #gpio-cells = <2>;
2105 interrupt-controller;
2106 #interrupt-cells = <2>;
2107 status = "disabled";
2108 };
2109 };
2110
2111 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2112 compatible = "ti,sysc-omap4", "ti,sysc";
2113 ti,hwmods = "vpfe0";
2114 reg = <0x26000 0x4>,
2115 <0x26104 0x4>;
2116 reg-names = "rev", "sysc";
2117 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2118 <SYSC_IDLE_NO>,
2119 <SYSC_IDLE_SMART>;
2120 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2121 <SYSC_IDLE_NO>,
2122 <SYSC_IDLE_SMART>;
2123 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2124 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2125 clock-names = "fck";
2126 #address-cells = <1>;
2127 #size-cells = <1>;
2128 ranges = <0x0 0x26000 0x1000>;
2129
2130 vpfe0: vpfe@0 {
2131 compatible = "ti,am437x-vpfe";
2132 reg = <0x0 0x2000>;
2133 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2134 status = "disabled";
2135 };
2136 };
2137
2138 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2139 compatible = "ti,sysc-omap4", "ti,sysc";
2140 ti,hwmods = "vpfe1";
2141 reg = <0x28000 0x4>,
2142 <0x28104 0x4>;
2143 reg-names = "rev", "sysc";
2144 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2145 <SYSC_IDLE_NO>,
2146 <SYSC_IDLE_SMART>;
2147 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2148 <SYSC_IDLE_NO>,
2149 <SYSC_IDLE_SMART>;
2150 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2151 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2152 clock-names = "fck";
2153 #address-cells = <1>;
2154 #size-cells = <1>;
2155 ranges = <0x0 0x28000 0x1000>;
2156
2157 vpfe1: vpfe@0 {
2158 compatible = "ti,am437x-vpfe";
2159 reg = <0x0 0x2000>;
2160 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2161 status = "disabled";
2162 };
2163 };
2164
2165 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2166 compatible = "ti,sysc-omap2", "ti,sysc";
2167 ti,hwmods = "dss_core";
2168 reg = <0x2a000 0x4>,
2169 <0x2a010 0x4>,
2170 <0x2a014 0x4>;
2171 reg-names = "rev", "sysc", "syss";
2172 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2173 SYSC_OMAP2_AUTOIDLE)>;
2174 ti,syss-mask = <1>;
2175 /* Domains (P, C): per_pwrdm, dss_clkdm */
2176 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2177 clock-names = "fck";
2178 #address-cells = <1>;
2179 #size-cells = <1>;
2180 ranges = <0x00000000 0x0002a000 0x00000400>,
2181 <0x00000400 0x0002a400 0x00000400>,
2182 <0x00000800 0x0002a800 0x00000400>,
2183 <0x00000c00 0x0002ac00 0x00000400>,
2184 <0x00001000 0x0002b000 0x00001000>;
2185 };
2186
2187 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2188 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2189 ti,hwmods = "timer9";
2190 reg = <0x3d000 0x4>,
2191 <0x3d010 0x4>,
2192 <0x3d014 0x4>;
2193 reg-names = "rev", "sysc", "syss";
2194 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2195 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2196 <SYSC_IDLE_NO>,
2197 <SYSC_IDLE_SMART>,
2198 <SYSC_IDLE_SMART_WKUP>;
2199 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2200 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2201 clock-names = "fck";
2202 #address-cells = <1>;
2203 #size-cells = <1>;
2204 ranges = <0x0 0x3d000 0x1000>;
2205
2206 timer9: timer@0 {
2207 compatible = "ti,am4372-timer","ti,am335x-timer";
2208 reg = <0x0 0x400>;
2209 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2210 status = "disabled";
2211 };
2212 };
2213
2214 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2215 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2216 ti,hwmods = "timer10";
2217 reg = <0x3f000 0x4>,
2218 <0x3f010 0x4>,
2219 <0x3f014 0x4>;
2220 reg-names = "rev", "sysc", "syss";
2221 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2222 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2223 <SYSC_IDLE_NO>,
2224 <SYSC_IDLE_SMART>,
2225 <SYSC_IDLE_SMART_WKUP>;
2226 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2227 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2228 clock-names = "fck";
2229 #address-cells = <1>;
2230 #size-cells = <1>;
2231 ranges = <0x0 0x3f000 0x1000>;
2232
2233 timer10: timer@0 {
2234 compatible = "ti,am4372-timer","ti,am335x-timer";
2235 reg = <0x0 0x400>;
2236 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2237 status = "disabled";
2238 };
2239 };
2240
2241 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2242 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2243 ti,hwmods = "timer11";
2244 reg = <0x41000 0x4>,
2245 <0x41010 0x4>,
2246 <0x41014 0x4>;
2247 reg-names = "rev", "sysc", "syss";
2248 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2249 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2250 <SYSC_IDLE_NO>,
2251 <SYSC_IDLE_SMART>,
2252 <SYSC_IDLE_SMART_WKUP>;
2253 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2254 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2255 clock-names = "fck";
2256 #address-cells = <1>;
2257 #size-cells = <1>;
2258 ranges = <0x0 0x41000 0x1000>;
2259
2260 timer11: timer@0 {
2261 compatible = "ti,am4372-timer","ti,am335x-timer";
2262 reg = <0x0 0x400>;
2263 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2264 status = "disabled";
2265 };
2266 };
2267
2268 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2269 compatible = "ti,sysc-omap2", "ti,sysc";
2270 ti,hwmods = "spi4";
2271 reg = <0x45000 0x4>,
2272 <0x45110 0x4>,
2273 <0x45114 0x4>;
2274 reg-names = "rev", "sysc", "syss";
2275 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2276 SYSC_OMAP2_SOFTRESET |
2277 SYSC_OMAP2_AUTOIDLE)>;
2278 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2279 <SYSC_IDLE_NO>,
2280 <SYSC_IDLE_SMART>;
2281 ti,syss-mask = <1>;
2282 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2283 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2284 clock-names = "fck";
2285 #address-cells = <1>;
2286 #size-cells = <1>;
2287 ranges = <0x0 0x45000 0x1000>;
2288
2289 spi4: spi@0 {
2290 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2291 reg = <0x0 0x400>;
2292 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2293 #address-cells = <1>;
2294 #size-cells = <0>;
2295 status = "disabled";
2296 };
2297 };
2298
2299 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2300 compatible = "ti,sysc-omap2", "ti,sysc";
2301 ti,hwmods = "hdq1w";
2302 reg = <0x47000 0x4>,
2303 <0x47014 0x4>,
2304 <0x47018 0x4>;
2305 reg-names = "rev", "sysc", "syss";
2306 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2307 SYSC_OMAP2_AUTOIDLE)>;
2308 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2309 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2310 clock-names = "fck";
2311 #address-cells = <1>;
2312 #size-cells = <1>;
2313 ranges = <0x0 0x47000 0x1000>;
2314
2315 hdq: hdq@0 {
2316 compatible = "ti,am4372-hdq";
2317 reg = <0x0 0x1000>;
2318 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2319 clocks = <&func_12m_clk>;
2320 clock-names = "fck";
2321 status = "disabled";
2322 };
2323 };
2324
2325 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2326 compatible = "ti,sysc";
2327 status = "disabled";
2328 #address-cells = <1>;
2329 #size-cells = <1>;
2330 ranges = <0x0 0x4c000 0x2000>;
2331 };
2332
2333 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2334 compatible = "ti,sysc-omap4", "ti,sysc";
2335 ti,hwmods = "usb_otg_ss0";
2336 reg = <0x80000 0x4>,
2337 <0x80010 0x4>;
2338 reg-names = "rev", "sysc";
2339 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2340 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2341 <SYSC_IDLE_NO>,
2342 <SYSC_IDLE_SMART>,
2343 <SYSC_IDLE_SMART_WKUP>;
2344 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2345 <SYSC_IDLE_NO>,
2346 <SYSC_IDLE_SMART>,
2347 <SYSC_IDLE_SMART_WKUP>;
2348 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2349 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2350 clock-names = "fck";
2351 #address-cells = <1>;
2352 #size-cells = <1>;
2353 ranges = <0x0 0x80000 0x20000>;
2354
2355 dwc3_1: omap_dwc3@0 {
2356 compatible = "ti,am437x-dwc3";
2357 reg = <0x0 0x10000>;
2358 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2359 #address-cells = <1>;
2360 #size-cells = <1>;
2361 utmi-mode = <1>;
2362 ranges = <0 0 0x20000>;
2363
2364 usb1: usb@10000 {
2365 compatible = "synopsys,dwc3";
2366 reg = <0x10000 0x10000>;
2367 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2368 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2369 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2370 interrupt-names = "peripheral",
2371 "host",
2372 "otg";
2373 phys = <&usb2_phy1>;
2374 phy-names = "usb2-phy";
2375 maximum-speed = "high-speed";
2376 dr_mode = "otg";
2377 status = "disabled";
2378 snps,dis_u3_susphy_quirk;
2379 snps,dis_u2_susphy_quirk;
2380 };
2381 };
2382 };
2383
2384 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2385 compatible = "ti,sysc-omap4", "ti,sysc";
2386 ti,hwmods = "ocp2scp0";
2387 reg = <0xa8000 0x4>;
2388 reg-names = "rev";
2389 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2390 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2391 clock-names = "fck";
2392 #address-cells = <1>;
2393 #size-cells = <1>;
2394 ranges = <0x0 0xa8000 0x8000>;
2395
2396 ocp2scp0: ocp2scp@0 {
2397 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2398 #address-cells = <1>;
2399 #size-cells = <1>;
2400 ranges = <0 0 0x8000>;
2401
2402 usb2_phy1: phy@8000 {
2403 compatible = "ti,am437x-usb2";
2404 reg = <0x0 0x8000>;
2405 syscon-phy-power = <&scm_conf 0x620>;
2406 clocks = <&usb_phy0_always_on_clk32k>,
2407 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2408 clock-names = "wkupclk", "refclk";
2409 #phy-cells = <0>;
2410 status = "disabled";
2411 };
2412 };
2413 };
2414
2415 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2416 compatible = "ti,sysc-omap4", "ti,sysc";
2417 ti,hwmods = "usb_otg_ss1";
2418 reg = <0xc0000 0x4>,
2419 <0xc0010 0x4>;
2420 reg-names = "rev", "sysc";
2421 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2422 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2423 <SYSC_IDLE_NO>,
2424 <SYSC_IDLE_SMART>,
2425 <SYSC_IDLE_SMART_WKUP>;
2426 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2427 <SYSC_IDLE_NO>,
2428 <SYSC_IDLE_SMART>,
2429 <SYSC_IDLE_SMART_WKUP>;
2430 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2431 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2432 clock-names = "fck";
2433 #address-cells = <1>;
2434 #size-cells = <1>;
2435 ranges = <0x0 0xc0000 0x20000>;
2436
2437 dwc3_2: omap_dwc3@0 {
2438 compatible = "ti,am437x-dwc3";
2439 reg = <0x0 0x10000>;
2440 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2441 #address-cells = <1>;
2442 #size-cells = <1>;
2443 utmi-mode = <1>;
2444 ranges = <0 0 0x20000>;
2445
2446 usb2: usb@10000 {
2447 compatible = "synopsys,dwc3";
2448 reg = <0x10000 0x10000>;
2449 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2450 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2452 interrupt-names = "peripheral",
2453 "host",
2454 "otg";
2455 phys = <&usb2_phy2>;
2456 phy-names = "usb2-phy";
2457 maximum-speed = "high-speed";
2458 dr_mode = "otg";
2459 status = "disabled";
2460 snps,dis_u3_susphy_quirk;
2461 snps,dis_u2_susphy_quirk;
2462 };
2463 };
2464 };
2465
2466 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2467 compatible = "ti,sysc-omap4", "ti,sysc";
2468 ti,hwmods = "ocp2scp1";
2469 reg = <0xe8000 0x4>;
2470 reg-names = "rev";
2471 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2472 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2473 clock-names = "fck";
2474 #address-cells = <1>;
2475 #size-cells = <1>;
2476 ranges = <0x0 0xe8000 0x8000>;
2477
2478 ocp2scp1: ocp2scp@0 {
2479 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2480 #address-cells = <1>;
2481 #size-cells = <1>;
2482 ranges = <0 0 0x8000>;
2483
2484 usb2_phy2: phy@8000 {
2485 compatible = "ti,am437x-usb2";
2486 reg = <0x0 0x8000>;
2487 syscon-phy-power = <&scm_conf 0x628>;
2488 clocks = <&usb_phy1_always_on_clk32k>,
2489 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2490 clock-names = "wkupclk", "refclk";
2491 #phy-cells = <0>;
2492 status = "disabled";
2493 };
2494 };
2495 };
2496
2497 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2498 compatible = "ti,sysc";
2499 status = "disabled";
2500 #address-cells = <1>;
2501 #size-cells = <1>;
2502 ranges = <0x0 0xf2000 0x2000>;
2503 };
2504 };
2505};
2506